Update documentation.

Author: Quentin Berthet

docs/advanced/vitis_accelerator.rst

@@ -0,0 +1,93 @@
+========================
+VitisAccelerator Backend
+========================
+
+The ``VitsAccelerator`` backend leverages the `Vitis System Design Flow <https://www.xilinx.com/products/design-tools/vitis.html#design-flows>`_ to automate and simplify the creation of an hls4ml project for `AMD Alveo PCIe accelerators <https://www.amd.com/en/products/accelerators/alveo.html>`_.
+The Vitis accelerator backend has been tested with the following boards:
+
+* `Alveo u50 <https://www.xilinx.com/products/boards-and-kits/alveo/u50.html>`_
+* `Alveo u55c <https://www.xilinx.com/products/boards-and-kits/alveo/u55c.html>`_
+* `Alveo u250 <https://www.xilinx.com/products/boards-and-kits/alveo/u250.html>`_
+* `Versal vck5000 <https://www.xilinx.com/products/boards-and-kits/vck5000.html>`_
+
+Kernel wrapper
+==============
+
+To integrate with the Vitis System Design Flow and run on an accelerator, the generated ``hls4ml`` model must be encapsulated and built as a Vitis kernel (``.xo`` file) and linked into a binary file (``.xclbin``) during the implementation step. On the host side, standard C++ code using either `OpenCL <https://xilinx.github.io/XRT/master/html/opencl_extension.html>`_ or `XRT API <https://xilinx.github.io/XRT/master/html/xrt_native_apis.html>`_ can be used to download the ``.xclbin`` file to the accelerator card and use any kernel it contains.
+
+The ``VitisAccelerator`` backend generates automatically generate a kernel wrapper, an host code example, and a Makefile to build the project.
+
+Options
+=======
+
+As PCIe accelerators are not suitable for ultra-low latency applications, it is assumed that they are used for high-throughput applications. To accommodate this, the backend supports the following options to optimize the kernel for throughput:
+
+    * ``num_kernel``: Number of kernel instances to implement in the hardware architecture.
+    * ``num_thread``: Number of host threads used to exercise the kernels in the host application.
+    * ``batchsize``: Number of samples to be processed in a single kernel execution.
+
+Additionnaly, the backend propose the following options to customize the implementation:
+
+    * ``board``: The target board, must match one entry in ``supported_boards.json``.
+    * ``clock_period``: The target clock period in ns.
+    * ``hw_quant``: Is arbitrary precision quantization performed in hardware or not. If True, the quantization is performed in hardware and float are used at the kernel interface, otherwise it is performed in software and arbitrary precision types are used at the interface. (Defaults to  ``False``).
+    * ``vivado_directives``: A list of strings to be added under the ``[Vivado]`` section of the generated ``accelerator_card.cfg`` link configuration file. Can be used to add custom directives to the Vivado project.
+
+Build workflow
+==============
+
+At the call of the ``build`` method, the following option affect the build process:
+
+    * ``reset``: TBD.
+    * ``csim``: TBD.
+    * ``synth``: TBD.
+    * ``cosim``: TBD.
+    * ``vsynth``: TBD.
+    * ``debug``: TBD.
+
+Once the project is generated, it possible to run manually the build steps by using one of the following ``make`` targets in the generated project directory:
+
+    * ``host``: Compiles the host application.
+    * ``hls``: Produces only the kernel's object file.
+    * ``xclbin``: Produces only the kernel's .xclbin file.
+
+It is also possible to run the full build process by calling ``make`` without any target. Modifications to the ``accelerator_card.cfg`` file can be done manually before running the build process (e.g., to change the clock period, or add addition ``.xo`` kernel to the build).
+
+The generated host code application and the xclbin file can be executed as such:
+
+.. code-block:: Bash
+
+    ./host <myproject>.xclbin
+
+Example
+=======
+
+The following example is a modified version of `hsl4ml example 7 <https://github.com/fastmachinelearning/hls4ml-tutorial/blob/master/part7_deployment.ipynb>`_.
+
+.. code-block:: Python
+
+    import hls4ml
+    hls_model = hls4ml.converters.convert_from_keras_model(
+        model,
+        hls_config=config,
+        output_dir='model_3/hls4ml_prj_vitis_accel',
+        backend='VitisAccelerator',
+        board='alveo-u55c',
+        num_kernel=4,
+        num_thread=8,
+        batchsize=8192
+    )
+    hls_model.compile()
+    hls_model.build()
+
+By default the build method generates all the necessary files to run the kernel on the accelerator board. As this can be a long process, there are three build options that target the generation of specific parts of the project:
+
+* `host`: Compiles the host application
+* `hls`: Produces only the kernel's object file
+* `xclbin`: Produces only the kernel's .xclbin file
+
+The generated host code application and the xclbin file can be executed as such:
+
+.. code-block:: Bash
+
+    ./host <myproject>.xclbin

docs/advanced/accelerator.rst renamed to docs/advanced/vivado_accelerator.rst

@@ -75,50 +75,3 @@ The ``predict`` method will send the input data to the PL and return the output
 
     nn = NeuralNetworkOverlay('hls4ml_nn.bit', X_test.shape, y_test.shape)
     y_hw, latency, throughput = nn.predict(X_test, profile=True)
-
-========================
-VitisAccelerator Backend
-========================
-
-The ``VitsAccelerator`` backned makes use of the vitis kernel flow to and streamlines the generation of an hls4ml project targeting PCIe accelerators.
-Vitis accelerator backend supports the following boards:
-
-* `Alveo u50 <https://www.xilinx.com/products/boards-and-kits/alveo/u50.html>`_
-* `Alveo u55c <https://www.xilinx.com/products/boards-and-kits/alveo/u55c.html>`_
-* `Alveo u250 <https://www.xilinx.com/products/boards-and-kits/alveo/u250.html>`_
-* `Versal vck5000 <https://www.xilinx.com/products/boards-and-kits/vck5000.html>`_
-
-The backend also generates an `OpenCL` host code that uploads and runs the kernel on the accelerator card.
-
-Example
-=======
-
-The following example is a modified version of `hsl4ml example 7 <https://github.com/fastmachinelearning/hls4ml-tutorial/blob/master/part7_deployment.ipynb>`_.
-
-.. code-block:: Python
-
-    import hls4ml
-    hls_model = hls4ml.converters.convert_from_keras_model(
-        model,
-        hls_config=config,
-        output_dir='model_3/hls4ml_prj_vitis_accel',
-        backend='VitisAccelerator',
-        board='alveo-u55c',
-        num_kernel=4,
-        num_thread=8,
-        batchsize=8192
-    )
-    hls_model.compile()
-    hls_model.build()
-
-By default the build method generates all the necessary files to run the kernel on the accelerator board. As this can be a long process, there are three build options that target the generation of specific parts of the project:
-
-* `host`: Compiles the host application
-* `hls`: Produces only the kernel's object file
-* `xclbin`: Produces only the kernel's .xclbin file
-
-The generated host code application and the xclbin file can be executed as such:
-
-.. code-block:: Bash
-
-    ./host <myproject>.xclbin

docs/index.rst

@@ -24,7 +24,8 @@
 
     advanced/fifo_depth
     advanced/extension
-    advanced/accelerator
+    advanced/vivado_accelerator
+    advanced/vitis_accelerator
     advanced/model_optimization
 
 .. toctree::