Bug 1944011 - Part 33: Generate boilerplate for LWasmAtomicStoreI64. r=jandem

Differential Revision: https://phabricator.services.mozilla.com/D235806

Author: anba

js/src/jit/LIROps.yaml

@@ -4964,7 +4964,12 @@
   mir_op: WasmLoad
 
 - name: WasmAtomicStoreI64
-  gen_boilerplate: false
+  operands:
+    memoryBase: WordSized
+    ptr: WordSized
+    value: Int64
+  num_temps64: 1
+  mir_op: WasmStore
 
 - name: WasmCompareExchangeI64
   result_type: Int64
@@ -5078,7 +5083,12 @@
   mir_op: WasmLoad
 
 - name: WasmAtomicStoreI64
-  gen_boilerplate: false
+  operands:
+    ptr: WordSized
+    value: Int64
+    memoryBase: WordSized
+  num_temps64: 1
+  mir_op: WasmStore
 
 - name: WasmCompareExchangeI64
   result_type: Int64
@@ -5193,7 +5203,11 @@
   mir_op: WasmLoad
 
 - name: WasmAtomicStoreI64
-  gen_boilerplate: false
+  operands:
+    ptr: WordSized
+    value: Int64
+  num_temps: 1
+  mir_op: WasmStore
 
 - name: WasmCompareExchangeI64
   result_type: Int64

js/src/jit/arm/CodeGenerator-arm.cpp

@@ -2649,7 +2649,7 @@ void CodeGenerator::visitWasmAtomicStoreI64(LWasmAtomicStoreI64* lir) {
   Register ptr = ToRegister(lir->ptr());
   Register memoryBase = ToRegister(lir->memoryBase());
   Register64 value = ToRegister64(lir->value());
-  Register64 tmp(ToRegister(lir->tmpHigh()), ToRegister(lir->tmpLow()));
+  Register64 tmp = ToRegister64(lir->temp0());
 
   BaseIndex addr(memoryBase, ptr, TimesOne, lir->mir()->access().offset32());
   masm.wasmAtomicExchange64(lir->mir()->access(), addr, value, tmp);

js/src/jit/arm/LIR-arm.h

@@ -267,29 +267,6 @@ class LSoftUDivOrMod : public LBinaryCallInstructionHelper<1, 0> {
   MInstruction* mir() { return mir_->toInstruction(); }
 };
 
-class LWasmAtomicStoreI64 : public LInstructionHelper<0, 2 + INT64_PIECES, 2> {
- public:
-  LIR_HEADER(WasmAtomicStoreI64);
-
-  LWasmAtomicStoreI64(const LAllocation& ptr, const LInt64Allocation& value,
-                      const LAllocation& memoryBase, const LDefinition& tmpLow,
-                      const LDefinition& tmpHigh)
-      : LInstructionHelper(classOpcode) {
-    setOperand(0, ptr);
-    setInt64Operand(1, value);
-    setOperand(3, memoryBase);
-    setTemp(0, tmpLow);
-    setTemp(1, tmpHigh);
-  }
-
-  MWasmStore* mir() const { return mir_->toWasmStore(); }
-  const LAllocation* ptr() { return getOperand(0); }
-  LInt64Allocation value() { return getInt64Operand(1); }
-  const LAllocation* memoryBase() { return getOperand(3); }
-  const LDefinition* tmpLow() { return getTemp(0); }
-  const LDefinition* tmpHigh() { return getTemp(1); }
-};
-
 }  // namespace jit
 }  // namespace js
 

js/src/jit/arm/Lowering-arm.cpp

@@ -711,7 +711,7 @@ void LIRGenerator::visitWasmStore(MWasmStore* ins) {
     auto* lir = new (alloc()) LWasmAtomicStoreI64(
         useRegister(base),
         useInt64Fixed(ins->value(), Register64(IntArgReg1, IntArgReg0)),
-        memoryBase, tempFixed(IntArgReg2), tempFixed(IntArgReg3));
+        memoryBase, tempInt64Fixed(Register64(IntArgReg3, IntArgReg2)));
     add(lir, ins);
     return;
   }

js/src/jit/mips32/CodeGenerator-mips32.cpp

@@ -351,7 +351,7 @@ void CodeGenerator::visitWasmAtomicLoadI64(LWasmAtomicLoadI64* lir) {
 void CodeGenerator::visitWasmAtomicStoreI64(LWasmAtomicStoreI64* lir) {
   Register ptr = ToRegister(lir->ptr());
   Register64 value = ToRegister64(lir->value());
-  Register tmp = ToRegister(lir->tmp());
+  Register tmp = ToRegister(lir->temp0());
   uint32_t offset = lir->mir()->access().offset32();
 
   BaseIndex addr(HeapReg, ptr, TimesOne, offset);

js/src/jit/mips32/LIR-mips32.h

@@ -139,24 +139,6 @@ class LUDivOrModI64
   }
 };
 
-class LWasmAtomicStoreI64 : public LInstructionHelper<0, 1 + INT64_PIECES, 1> {
- public:
-  LIR_HEADER(WasmAtomicStoreI64);
-
-  LWasmAtomicStoreI64(const LAllocation& ptr, const LInt64Allocation& value,
-                      const LDefinition& tmp)
-      : LInstructionHelper(classOpcode) {
-    setOperand(0, ptr);
-    setInt64Operand(1, value);
-    setTemp(0, tmp);
-  }
-
-  const LAllocation* ptr() { return getOperand(0); }
-  LInt64Allocation value() { return getInt64Operand(1); }
-  const LDefinition* tmp() { return getTemp(0); }
-  const MWasmStore* mir() const { return mir_->toWasmStore(); }
-};
-
 }  // namespace jit
 }  // namespace js
 

js/src/jit/x86/CodeGenerator-x86.cpp

@@ -474,9 +474,7 @@ void CodeGeneratorX86::emitWasmStoreOrExchangeAtomicI64(
   Operand srcAddr(ToRegister(memoryBase), ToRegister(ptr), TimesOne,
                   access.offset32());
 
-  DebugOnly<LInt64Allocation> value = ins->value();
-  MOZ_ASSERT(ToRegister64(value).low == ebx);
-  MOZ_ASSERT(ToRegister64(value).high == ecx);
+  MOZ_ASSERT(ToRegister64(ins->value()) == Register64(ecx, ebx));
 
   // eax and edx will be overwritten every time through the loop but
   // memoryBase and ptr must remain live for a possible second iteration.
@@ -493,15 +491,13 @@ void CodeGeneratorX86::emitWasmStoreOrExchangeAtomicI64(
 }
 
 void CodeGenerator::visitWasmAtomicStoreI64(LWasmAtomicStoreI64* ins) {
-  MOZ_ASSERT(ToRegister(ins->t1()) == edx);
-  MOZ_ASSERT(ToRegister(ins->t2()) == eax);
+  MOZ_ASSERT(ToRegister64(ins->temp0()) == Register64(edx, eax));
 
   emitWasmStoreOrExchangeAtomicI64(ins, ins->mir()->access());
 }
 
 void CodeGenerator::visitWasmAtomicExchangeI64(LWasmAtomicExchangeI64* ins) {
-  MOZ_ASSERT(ToOutRegister64(ins).high == edx);
-  MOZ_ASSERT(ToOutRegister64(ins).low == eax);
+  MOZ_ASSERT(ToOutRegister64(ins) == Register64(edx, eax));
 
   emitWasmStoreOrExchangeAtomicI64(ins, ins->access());
 }

js/src/jit/x86/LIR-x86.h

@@ -149,29 +149,6 @@ class LUDivOrModI64
   }
 };
 
-class LWasmAtomicStoreI64 : public LInstructionHelper<0, 2 + INT64_PIECES, 2> {
- public:
-  LIR_HEADER(WasmAtomicStoreI64);
-
-  LWasmAtomicStoreI64(const LAllocation& memoryBase, const LAllocation& ptr,
-                      const LInt64Allocation& value, const LDefinition& t1,
-                      const LDefinition& t2)
-      : LInstructionHelper(classOpcode) {
-    setOperand(0, memoryBase);
-    setOperand(1, ptr);
-    setInt64Operand(2, value);
-    setTemp(0, t1);
-    setTemp(1, t2);
-  }
-
-  MWasmStore* mir() const { return mir_->toWasmStore(); }
-  const LAllocation* memoryBase() { return getOperand(0); }
-  const LAllocation* ptr() { return getOperand(1); }
-  LInt64Allocation value() { return getInt64Operand(2); }
-  const LDefinition* t1() { return getTemp(0); }
-  const LDefinition* t2() { return getTemp(1); }
-};
-
 }  // namespace jit
 }  // namespace js
 

js/src/jit/x86/Lowering-x86.cpp

@@ -431,7 +431,7 @@ void LIRGenerator::visitWasmStore(MWasmStore* ins) {
     auto* lir = new (alloc())
         LWasmAtomicStoreI64(useRegister(memoryBase), useRegister(base),
                             useInt64Fixed(ins->value(), Register64(ecx, ebx)),
-                            tempFixed(edx), tempFixed(eax));
+                            tempInt64Fixed(Register64(edx, eax)));
     add(lir, ins);
     return;
   }