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Merge branch 'embassy-rs:main' into stm32-pwm-pin-config
2 parents 91d8175 + 7c49f48 commit 5e3cfc7

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-19
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12 files changed

+42
-19
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README.md

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Original file line numberDiff line numberDiff line change
@@ -18,6 +18,7 @@ Rust's <a href="https://rust-lang.github.io/async-book/">async/await</a> allows
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- <a href="https://github.com/esp-rs">esp-rs</a>, for the Espressif Systems ESP32 series of chips.
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- Embassy HAL support for Espressif chips, as well as Async WiFi, Bluetooth and ESP-NOW, is being developed in the [esp-rs/esp-hal](https://github.com/esp-rs/esp-hal) repository.
2020
- <a href="https://github.com/ch32-rs/ch32-hal">ch32-hal</a>, for the WCH 32-bit RISC-V(CH32V) series of chips.
21+
- <a href="https://github.com/AlexCharlton/mpfs-hal">mpfs-hal</a>, for the Microchip PolarFire SoC.
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- **Time that Just Works** -
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No more messing with hardware timers. <a href="https://docs.embassy.dev/embassy-time">embassy_time</a> provides Instant, Duration and Timer types that are globally available and never overflow.

cyw43-pio/src/lib.rs

Lines changed: 8 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -169,12 +169,12 @@ where
169169

170170
self.sm.set_enable(true);
171171

172-
self.sm.tx().dma_push(self.dma.reborrow(), write).await;
172+
self.sm.tx().dma_push(self.dma.reborrow(), write, false).await;
173173

174174
let mut status = 0;
175175
self.sm
176176
.rx()
177-
.dma_pull(self.dma.reborrow(), slice::from_mut(&mut status))
177+
.dma_pull(self.dma.reborrow(), slice::from_mut(&mut status), false)
178178
.await;
179179
status
180180
}
@@ -201,13 +201,16 @@ where
201201
// self.cs.set_low();
202202
self.sm.set_enable(true);
203203

204-
self.sm.tx().dma_push(self.dma.reborrow(), slice::from_ref(&cmd)).await;
205-
self.sm.rx().dma_pull(self.dma.reborrow(), read).await;
204+
self.sm
205+
.tx()
206+
.dma_push(self.dma.reborrow(), slice::from_ref(&cmd), false)
207+
.await;
208+
self.sm.rx().dma_pull(self.dma.reborrow(), read, false).await;
206209

207210
let mut status = 0;
208211
self.sm
209212
.rx()
210-
.dma_pull(self.dma.reborrow(), slice::from_mut(&mut status))
213+
.dma_pull(self.dma.reborrow(), slice::from_mut(&mut status), false)
211214
.await;
212215

213216
#[cfg(feature = "defmt")]

docs/pages/hal.adoc

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@@ -12,3 +12,5 @@ async traits in `embedded-hal` and `embedded-hal-async`. You can also use these
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For the ESP32 series, there is an link:https://github.com/esp-rs/esp-hal[esp-hal] which you can use.
1313

1414
For the WCH 32-bit RISC-V series, there is an link:https://github.com/ch32-rs/ch32-hal[ch32-hal], which you can use.
15+
16+
For the Microchip PolarFire SoC, there is link:https://github.com/AlexCharlton/mpfs-hal[mpfs-hal].

docs/pages/overview.adoc

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@@ -31,6 +31,7 @@ The Embassy project maintains HALs for select hardware, but you can still use HA
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* link:https://docs.embassy.dev/embassy-rp/[embassy-rp], for the Raspberry Pi RP2040 microcontroller.
3232
* link:https://github.com/esp-rs[esp-rs], for the Espressif Systems ESP32 series of chips.
3333
* link:https://github.com/ch32-rs/ch32-hal[ch32-hal], for the WCH 32-bit RISC-V(CH32V) series of chips.
34+
* link:https://github.com/AlexCharlton/mpfs-hal[mpfs-hal], for the Microchip PolarFire SoC.
3435

3536
NOTE: A common question is if one can use the Embassy HALs standalone. Yes, it is possible! There are no dependency on the executor within the HALs. You can even use them without async,
3637
as they implement both the link:https://github.com/rust-embedded/embedded-hal[Embedded HAL] blocking and async traits.

embassy-rp/src/pio/mod.rs

Lines changed: 9 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -362,6 +362,7 @@ impl<'d, PIO: Instance, const SM: usize> StateMachineRx<'d, PIO, SM> {
362362
&'a mut self,
363363
ch: PeripheralRef<'a, C>,
364364
data: &'a mut [W],
365+
bswap: bool,
365366
) -> Transfer<'a, C> {
366367
let pio_no = PIO::PIO_NO;
367368
let p = ch.regs();
@@ -379,6 +380,7 @@ impl<'d, PIO: Instance, const SM: usize> StateMachineRx<'d, PIO, SM> {
379380
w.set_chain_to(ch.number());
380381
w.set_incr_read(false);
381382
w.set_incr_write(true);
383+
w.set_bswap(bswap);
382384
w.set_en(true);
383385
});
384386
compiler_fence(Ordering::SeqCst);
@@ -447,7 +449,12 @@ impl<'d, PIO: Instance, const SM: usize> StateMachineTx<'d, PIO, SM> {
447449
}
448450

449451
/// Prepare a DMA transfer to TX FIFO.
450-
pub fn dma_push<'a, C: Channel, W: Word>(&'a mut self, ch: PeripheralRef<'a, C>, data: &'a [W]) -> Transfer<'a, C> {
452+
pub fn dma_push<'a, C: Channel, W: Word>(
453+
&'a mut self,
454+
ch: PeripheralRef<'a, C>,
455+
data: &'a [W],
456+
bswap: bool,
457+
) -> Transfer<'a, C> {
451458
let pio_no = PIO::PIO_NO;
452459
let p = ch.regs();
453460
p.read_addr().write_value(data.as_ptr() as u32);
@@ -464,6 +471,7 @@ impl<'d, PIO: Instance, const SM: usize> StateMachineTx<'d, PIO, SM> {
464471
w.set_chain_to(ch.number());
465472
w.set_incr_read(true);
466473
w.set_incr_write(false);
474+
w.set_bswap(bswap);
467475
w.set_en(true);
468476
});
469477
compiler_fence(Ordering::SeqCst);

embassy-rp/src/pio_programs/hd44780.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -173,7 +173,7 @@ impl<'l, P: Instance, const S: usize> PioHD44780<'l, P, S> {
173173
sm.set_enable(true);
174174

175175
// display on and cursor on and blinking, reset display
176-
sm.tx().dma_push(dma.reborrow(), &[0x81u8, 0x0f, 1]).await;
176+
sm.tx().dma_push(dma.reborrow(), &[0x81u8, 0x0f, 1], false).await;
177177

178178
Self {
179179
dma: dma.map_into(),
@@ -198,6 +198,6 @@ impl<'l, P: Instance, const S: usize> PioHD44780<'l, P, S> {
198198
// set cursor to 1:15
199199
self.buf[38..].copy_from_slice(&[0x80, 0xcf]);
200200

201-
self.sm.tx().dma_push(self.dma.reborrow(), &self.buf).await;
201+
self.sm.tx().dma_push(self.dma.reborrow(), &self.buf, false).await;
202202
}
203203
}

embassy-rp/src/pio_programs/i2s.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -90,6 +90,6 @@ impl<'a, P: Instance, const S: usize> PioI2sOut<'a, P, S> {
9090

9191
/// Return an in-prograss dma transfer future. Awaiting it will guarentee a complete transfer.
9292
pub fn write<'b>(&'b mut self, buff: &'b [u32]) -> Transfer<'b, AnyChannel> {
93-
self.sm.tx().dma_push(self.dma.reborrow(), buff)
93+
self.sm.tx().dma_push(self.dma.reborrow(), buff, false)
9494
}
9595
}

embassy-rp/src/pio_programs/ws2812.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -111,7 +111,7 @@ impl<'d, P: Instance, const S: usize, const N: usize> PioWs2812<'d, P, S, N> {
111111
}
112112

113113
// DMA transfer
114-
self.sm.tx().dma_push(self.dma.reborrow(), &words).await;
114+
self.sm.tx().dma_push(self.dma.reborrow(), &words, false).await;
115115

116116
Timer::after_micros(55).await;
117117
}

embassy-stm32/src/usart/mod.rs

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -85,6 +85,7 @@ unsafe fn on_interrupt(r: Regs, s: &'static State) {
8585

8686
compiler_fence(Ordering::SeqCst);
8787
s.rx_waker.wake();
88+
s.tx_waker.wake();
8889
}
8990

9091
#[derive(Clone, Copy, PartialEq, Eq, Debug)]
@@ -592,7 +593,7 @@ async fn flush(info: &Info, state: &State) -> Result<(), Error> {
592593

593594
// future which completes when Transmission complete is detected
594595
let abort = poll_fn(move |cx| {
595-
state.rx_waker.register(cx.waker());
596+
state.tx_waker.register(cx.waker());
596597

597598
let sr = sr(r).read();
598599
if sr.tc() {
@@ -2019,13 +2020,15 @@ enum Kind {
20192020

20202021
struct State {
20212022
rx_waker: AtomicWaker,
2023+
tx_waker: AtomicWaker,
20222024
tx_rx_refcount: AtomicU8,
20232025
}
20242026

20252027
impl State {
20262028
const fn new() -> Self {
20272029
Self {
20282030
rx_waker: AtomicWaker::new(),
2031+
tx_waker: AtomicWaker::new(),
20292032
tx_rx_refcount: AtomicU8::new(0),
20302033
}
20312034
}

embassy-stm32/src/usart/ringbuffered.rs

Lines changed: 9 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -8,12 +8,12 @@ use embassy_hal_internal::PeripheralRef;
88
use embedded_io_async::ReadReady;
99
use futures_util::future::{select, Either};
1010

11-
use super::{
12-
clear_interrupt_flags, rdr, reconfigure, set_baudrate, sr, Config, ConfigError, Error, Info, State, UartRx,
13-
};
11+
use super::{rdr, reconfigure, set_baudrate, sr, Config, ConfigError, Error, Info, State, UartRx};
1412
use crate::dma::ReadableRingBuffer;
1513
use crate::gpio::{AnyPin, SealedPin as _};
1614
use crate::mode::Async;
15+
#[cfg(any(usart_v3, usart_v4))]
16+
use crate::pac::usart::regs;
1717
use crate::time::Hertz;
1818
use crate::usart::{Regs, Sr};
1919

@@ -254,7 +254,12 @@ fn clear_idle_flag(r: Regs) -> Sr {
254254

255255
// This read also clears the error and idle interrupt flags on v1.
256256
unsafe { rdr(r).read_volatile() };
257-
clear_interrupt_flags(r, sr);
257+
#[cfg(any(usart_v3, usart_v4))]
258+
{
259+
let mut clear_idle = regs::Icr(0);
260+
clear_idle.set_idle(true);
261+
r.icr().write_value(clear_idle);
262+
}
258263

259264
r.cr1().modify(|w| w.set_idleie(true));
260265

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