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ryanwinterryanwinter
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update NXP driver to use unique ID based MAC (#291)
* update driver to use unique ID based MAC * update MIMXRT1060 HAL to latest version
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‎NXP/MIMXRT1060-EVK/app/board_init.c

Lines changed: 207 additions & 1 deletion
Large diffs are not rendered by default.

‎NXP/MIMXRT1060-EVK/lib/MIMXRT1060-evk/CMakeLists.txt

Lines changed: 11 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -10,9 +10,9 @@ set(SOURCES
1010
src/boards/evkmimxrt1060/xip/evkmimxrt1060_flexspi_nor_config.c
1111
src/components/phyksz8081/fsl_phy.c
1212
src/components/phyksz8081/fsl_phy.h
13-
src/components/serial_manager/serial_manager.c
14-
src/components/serial_manager/serial_port_uart.c
15-
src/components/uart/lpuart_adapter.c
13+
src/components/serial_manager/fsl_component_serial_manager.c
14+
src/components/serial_manager/fsl_component_serial_port_uart.c
15+
src/components/uart/fsl_adapter_lpuart.c
1616
src/devices/MIMXRT1062/drivers/fsl_clock.c
1717
src/devices/MIMXRT1062/drivers/fsl_enet.c
1818
src/devices/MIMXRT1062/drivers/fsl_gpio.c
@@ -30,6 +30,11 @@ add_library(${TARGET} OBJECT
3030
${SOURCES}
3131
)
3232

33+
target_compile_options(${TARGET}
34+
PRIVATE
35+
-Wno-error
36+
)
37+
3338
target_compile_definitions(${TARGET}
3439
PUBLIC
3540
CPU_MIMXRT1062DVL6A
@@ -48,8 +53,9 @@ target_include_directories(${TARGET}
4853
src/components/phyksz8081
4954
src/components/serial_manager
5055
src/components/uart
51-
src/CMSIS/Include
52-
src/devices/MIMXRT1062
56+
src/CMSIS/Driver/Include
57+
src/CMSIS/Core/Include
58+
src/devices/MIMXRT1062
5359
src/devices/MIMXRT1062/drivers
5460
src/devices/MIMXRT1062/utilities/debug_console
5561
src/devices/MIMXRT1062/utilities/str

‎NXP/MIMXRT1060-EVK/lib/MIMXRT1060-evk/config/board/board.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -254,7 +254,7 @@ void BOARD_ConfigMPU(void)
254254
uint32_t nonCacheStart = (uint32_t)__NCACHE_REGION_START;
255255
uint32_t size = (uint32_t)__NCACHE_REGION_SIZE;
256256
#endif
257-
uint32_t i = 0;
257+
volatile uint32_t i = 0;
258258

259259
/* Disable I cache and D cache */
260260
if (SCB_CCR_IC_Msk == (SCB_CCR_IC_Msk & SCB->CCR))

‎NXP/MIMXRT1060-EVK/lib/MIMXRT1060-evk/config/board/board.h

Lines changed: 2 additions & 33 deletions
Original file line numberDiff line numberDiff line change
@@ -79,39 +79,6 @@
7979
#define BOARD_ARDUINO_I2C_IRQ (LPI2C1_IRQn)
8080
#define BOARD_ARDUINO_I2C_INDEX (1)
8181

82-
/*! @brief The WIFI-QCA shield pin. */
83-
#define BOARD_INITGT202SHIELD_PWRON_GPIO GPIO1 /*!< GPIO device name: GPIO */
84-
#define BOARD_INITGT202SHIELD_PWRON_PORT 1U /*!< PORT device index: 1 */
85-
#define BOARD_INITGT202SHIELD_PWRON_GPIO_PIN 3U /*!< PIO4 pin index: 3 */
86-
#define BOARD_INITGT202SHIELD_PWRON_PIN_NAME GPIO1_3 /*!< Pin name */
87-
#define BOARD_INITGT202SHIELD_PWRON_LABEL "PWRON" /*!< Label */
88-
#define BOARD_INITGT202SHIELD_PWRON_NAME "PWRON" /*!< Identifier name */
89-
#define BOARD_INITGT202SHIELD_PWRON_DIRECTION kGPIO_DigitalOutput /*!< Direction */
90-
91-
#define BOARD_INITGT202SHIELD_IRQ_GPIO GPIO1 /*!< GPIO device name: GPIO */
92-
#define BOARD_INITGT202SHIELD_IRQ_PORT 1U /*!< PORT device index: 1 */
93-
#define BOARD_INITGT202SHIELD_IRQ_GPIO_PIN 19U /*!< PIO1 pin index: 19 */
94-
#define BOARD_INITGT202SHIELD_IRQ_PIN_NAME GPIO1_19 /*!< Pin name */
95-
#define BOARD_INITGT202SHIELD_IRQ_LABEL "IRQ" /*!< Label */
96-
#define BOARD_INITGT202SHIELD_IRQ_NAME "IRQ" /*!< Identifier name */
97-
#define BOARD_INITGT202SHIELD_IRQ_DIRECTION kGPIO_DigitalInput /*!< Direction */
98-
99-
#define BOARD_INITSILEX2401SHIELD_PWRON_GPIO GPIO1 /*!< GPIO device name: GPIO */
100-
#define BOARD_INITSILEX2401SHIELD_PWRON_PORT 1U /*!< PORT device index: 1 */
101-
#define BOARD_INITSILEX2401SHIELD_PWRON_GPIO_PIN 9U /*!< PIO4 pin index: 9 */
102-
#define BOARD_INITSILEX2401SHIELD_PWRON_PIN_NAME GPIO1_9 /*!< Pin name */
103-
#define BOARD_INITSILEX2401SHIELD_PWRON_LABEL "PWRON" /*!< Label */
104-
#define BOARD_INITSILEX2401SHIELD_PWRON_NAME "PWRON" /*!< Identifier name */
105-
#define BOARD_INITSILEX2401SHIELD_PWRON_DIRECTION kGPIO_DigitalOutput /*!< Direction */
106-
107-
#define BOARD_INITSILEX2401SHIELD_IRQ_GPIO GPIO1 /*!< GPIO device name: GPIO */
108-
#define BOARD_INITSILEX2401SHIELD_IRQ_PORT 1U /*!< PORT device index: 1 */
109-
#define BOARD_INITSILEX2401SHIELD_IRQ_GPIO_PIN 11U /*!< PIO1 pin index: 11 */
110-
#define BOARD_INITSILEX2401SHIELD_IRQ_PIN_NAME GPIO1_11 /*!< Pin name */
111-
#define BOARD_INITSILEX2401SHIELD_IRQ_LABEL "IRQ" /*!< Label */
112-
#define BOARD_INITSILEX2401SHIELD_IRQ_NAME "IRQ" /*!< Identifier name */
113-
#define BOARD_INITSILEX2401SHIELD_IRQ_DIRECTION kGPIO_DigitalInput /*!< Direction */
114-
11582
/* @Brief Board accelerator sensor configuration */
11683
#define BOARD_ACCEL_I2C_BASEADDR LPI2C1
11784
/* Select USB1 PLL (480 MHz) as LPI2C's clock source */
@@ -142,6 +109,8 @@
142109

143110
/* @Brief Board Bluetooth HCI UART configuration */
144111
#define BOARD_BT_UART_BASEADDR LPUART3
112+
#define BOARD_BT_UART_INSTANCE 3
113+
#define BOARD_BT_UART_BAUDRATE 3000000
145114
#define BOARD_BT_UART_CLK_FREQ BOARD_DebugConsoleSrcFreq()
146115
#define BOARD_BT_UART_IRQ LPUART3_IRQn
147116
#define BOARD_BT_UART_IRQ_HANDLER LPUART3_IRQHandler

‎NXP/MIMXRT1060-EVK/lib/MIMXRT1060-evk/config/board/clock_config.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright 2018-2020 NXP
2+
* Copyright 2018-2020 ,2021 NXP
33
* All rights reserved.
44
*
55
* SPDX-License-Identifier: BSD-3-Clause
@@ -26,7 +26,7 @@ product: Clocks v7.0
2626
processor: MIMXRT1062xxxxA
2727
package_id: MIMXRT1062DVL6A
2828
mcu_data: ksdk2_0
29-
processor_version: 0.7.9
29+
processor_version: 9.0.1
3030
board: MIMXRT1060-EVK
3131
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
3232

‎NXP/MIMXRT1060-EVK/lib/MIMXRT1060-evk/config/board/clock_config.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright 2018-2020 NXP
2+
* Copyright 2018-2020 ,2021 NXP
33
* All rights reserved.
44
*
55
* SPDX-License-Identifier: BSD-3-Clause

‎NXP/MIMXRT1060-EVK/lib/MIMXRT1060-evk/config/board/dcd.c

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -20,7 +20,7 @@
2020
#if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1)
2121
#if defined(XIP_BOOT_HEADER_DCD_ENABLE) && (XIP_BOOT_HEADER_DCD_ENABLE == 1)
2222
#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__)
23-
__attribute__((section(".boot_hdr.dcd_data")))
23+
__attribute__((section(".boot_hdr.dcd_data"), used))
2424
#elif defined(__ICCARM__)
2525
#pragma location = ".boot_hdr.dcd_data"
2626
#endif
@@ -232,10 +232,10 @@ const uint8_t dcd_data[] = {
232232
0x40, 0x1F, 0x82, 0xA0, 0x00, 0x01, 0x10, 0xF9,
233233
/* #1.91, command: write_value, address: SEMC_MCR, value: 0x10000004, size: 4 */
234234
0x40, 0x2F, 0x00, 0x00, 0x10, 0x00, 0x00, 0x04,
235-
/* #1.92, command: write_value, address: SEMC_BMCR0, value: 0x30524, size: 4 */
236-
0x40, 0x2F, 0x00, 0x08, 0x00, 0x03, 0x05, 0x24,
237-
/* #1.93, command: write_value, address: SEMC_BMCR1, value: 0x6030524, size: 4 */
238-
0x40, 0x2F, 0x00, 0x0C, 0x06, 0x03, 0x05, 0x24,
235+
/* #1.92, command: write_value, address: SEMC_BMCR0, value: 0x81, size: 4 */
236+
0x40, 0x2F, 0x00, 0x08, 0x00, 0x00, 0x00, 0x81,
237+
/* #1.93, command: write_value, address: SEMC_BMCR1, value: 0x81, size: 4 */
238+
0x40, 0x2F, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x81,
239239
/* #1.94, command: write_value, address: SEMC_BR0, value: 0x8000001B, size: 4 */
240240
0x40, 0x2F, 0x00, 0x10, 0x80, 0x00, 0x00, 0x1B,
241241
/* #1.95, command: write_value, address: SEMC_BR1, value: 0x8200001B, size: 4 */

‎NXP/MIMXRT1060-EVK/lib/MIMXRT1060-evk/config/board/dcd.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -17,8 +17,8 @@
1717

1818
/*! @name Driver version */
1919
/*@{*/
20-
/*! @brief XIP_BOARD driver version 2.0.0. */
21-
#define FSL_XIP_BOARD_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
20+
/*! @brief XIP_BOARD driver version 2.0.1. */
21+
#define FSL_XIP_BOARD_DRIVER_VERSION (MAKE_VERSION(2, 0, 1))
2222
/*@}*/
2323

2424
/*************************************

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