@@ -5,13 +5,13 @@ define void @undef_2phi(ptr%buf) {
5
5
; CHECK-LABEL: @undef_2phi(
6
6
; CHECK-NEXT: entry:
7
7
; CHECK-NEXT: [[TMP0:%.*]] = call x86_amx @llvm.x86.tilezero.internal(i16 8, i16 32)
8
- ; CHECK-NEXT: br i1 undef , label [[L1:%.*]], label [[L2:%.*]]
8
+ ; CHECK-NEXT: br i1 poison , label [[L1:%.*]], label [[L2:%.*]]
9
9
; CHECK: l1:
10
10
; CHECK-NEXT: [[T1:%.*]] = call x86_amx @llvm.x86.tilezero.internal(i16 8, i16 32)
11
- ; CHECK-NEXT: br i1 undef , label [[L2]], label [[L3:%.*]]
11
+ ; CHECK-NEXT: br i1 poison , label [[L2]], label [[L3:%.*]]
12
12
; CHECK: l2:
13
13
; CHECK-NEXT: [[TMP1:%.*]] = phi x86_amx [ [[TMP0]], [[ENTRY:%.*]] ], [ [[T1]], [[L1]] ]
14
- ; CHECK-NEXT: br i1 undef , label [[L3]], label [[EXIT:%.*]]
14
+ ; CHECK-NEXT: br i1 poison , label [[L3]], label [[EXIT:%.*]]
15
15
; CHECK: l3:
16
16
; CHECK-NEXT: [[TMP2:%.*]] = phi x86_amx [ [[TMP1]], [[L2]] ], [ [[T1]], [[L1]] ]
17
17
; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 8, i16 32, ptr [[BUF:%.*]], i64 1024, x86_amx [[TMP2]])
@@ -20,16 +20,16 @@ define void @undef_2phi(ptr%buf) {
20
20
; CHECK-NEXT: ret void
21
21
;
22
22
entry:
23
- br i1 undef , label %l1 , label %l2
23
+ br i1 poison , label %l1 , label %l2
24
24
25
25
l1:
26
26
%t1 = call x86_amx @llvm.x86.tilezero.internal (i16 8 , i16 32 )
27
27
%t2 = call <256 x i32 > @llvm.x86.cast.tile.to.vector.v256i32 (x86_amx %t1 )
28
- br i1 undef , label %l2 , label %l3
28
+ br i1 poison , label %l2 , label %l3
29
29
30
30
l2:
31
- %t3 = phi <256 x i32 > [ undef , %entry ], [ %t2 , %l1 ]
32
- br i1 undef , label %l3 , label %exit
31
+ %t3 = phi <256 x i32 > [ poison , %entry ], [ %t2 , %l1 ]
32
+ br i1 poison , label %l3 , label %exit
33
33
34
34
l3:
35
35
%t4 = phi <256 x i32 > [ %t3 , %l2 ], [ %t2 , %l1 ]
@@ -45,10 +45,10 @@ define void @foo_undef(ptr%buf) {
45
45
; CHECK-LABEL: @foo_undef(
46
46
; CHECK-NEXT: entry:
47
47
; CHECK-NEXT: [[TMP0:%.*]] = call x86_amx @llvm.x86.tilezero.internal(i16 8, i16 32)
48
- ; CHECK-NEXT: br i1 undef , label [[L1:%.*]], label [[L2:%.*]]
48
+ ; CHECK-NEXT: br i1 poison , label [[L1:%.*]], label [[L2:%.*]]
49
49
; CHECK: l1:
50
50
; CHECK-NEXT: [[T1:%.*]] = call x86_amx @llvm.x86.tilezero.internal(i16 8, i16 32)
51
- ; CHECK-NEXT: br i1 undef , label [[L2]], label [[EXIT:%.*]]
51
+ ; CHECK-NEXT: br i1 poison , label [[L2]], label [[EXIT:%.*]]
52
52
; CHECK: l2:
53
53
; CHECK-NEXT: [[TMP1:%.*]] = phi x86_amx [ [[TMP0]], [[ENTRY:%.*]] ], [ [[T1]], [[L1]] ]
54
54
; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 8, i16 32, ptr [[BUF:%.*]], i64 1024, x86_amx [[TMP1]])
@@ -57,15 +57,15 @@ define void @foo_undef(ptr%buf) {
57
57
; CHECK-NEXT: ret void
58
58
;
59
59
entry:
60
- br i1 undef , label %l1 , label %l2
60
+ br i1 poison , label %l1 , label %l2
61
61
62
62
l1:
63
63
%t1 = call x86_amx @llvm.x86.tilezero.internal (i16 8 , i16 32 )
64
64
%t2 = call <256 x i32 > @llvm.x86.cast.tile.to.vector.v256i32 (x86_amx %t1 )
65
- br i1 undef , label %l2 , label %exit
65
+ br i1 poison , label %l2 , label %exit
66
66
67
67
l2:
68
- %t3 = phi <256 x i32 > [ undef , %entry ], [ %t2 , %l1 ]
68
+ %t3 = phi <256 x i32 > [ poison , %entry ], [ %t2 , %l1 ]
69
69
%t4 = call x86_amx @llvm.x86.cast.vector.to.tile.v256i32 (<256 x i32 > %t3 )
70
70
call void @llvm.x86.tilestored64.internal (i16 8 , i16 32 , ptr %buf , i64 1024 , x86_amx %t4 )
71
71
br label %exit
@@ -78,10 +78,10 @@ define void @foo_zero(ptr%buf) {
78
78
; CHECK-LABEL: @foo_zero(
79
79
; CHECK-NEXT: entry:
80
80
; CHECK-NEXT: [[TMP0:%.*]] = call x86_amx @llvm.x86.tilezero.internal(i16 8, i16 32)
81
- ; CHECK-NEXT: br i1 undef , label [[L1:%.*]], label [[L2:%.*]]
81
+ ; CHECK-NEXT: br i1 poison , label [[L1:%.*]], label [[L2:%.*]]
82
82
; CHECK: l1:
83
83
; CHECK-NEXT: [[T1:%.*]] = call x86_amx @llvm.x86.tilezero.internal(i16 8, i16 32)
84
- ; CHECK-NEXT: br i1 undef , label [[L2]], label [[EXIT:%.*]]
84
+ ; CHECK-NEXT: br i1 poison , label [[L2]], label [[EXIT:%.*]]
85
85
; CHECK: l2:
86
86
; CHECK-NEXT: [[TMP1:%.*]] = phi x86_amx [ [[TMP0]], [[ENTRY:%.*]] ], [ [[T1]], [[L1]] ]
87
87
; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 8, i16 32, ptr [[BUF:%.*]], i64 1024, x86_amx [[TMP1]])
@@ -90,12 +90,12 @@ define void @foo_zero(ptr%buf) {
90
90
; CHECK-NEXT: ret void
91
91
;
92
92
entry:
93
- br i1 undef , label %l1 , label %l2
93
+ br i1 poison , label %l1 , label %l2
94
94
95
95
l1:
96
96
%t1 = call x86_amx @llvm.x86.tilezero.internal (i16 8 , i16 32 )
97
97
%t2 = call <256 x i32 > @llvm.x86.cast.tile.to.vector.v256i32 (x86_amx %t1 )
98
- br i1 undef , label %l2 , label %exit
98
+ br i1 poison , label %l2 , label %exit
99
99
100
100
l2:
101
101
%t3 = phi <256 x i32 > [ zeroinitializer , %entry ], [ %t2 , %l1 ]
@@ -112,14 +112,14 @@ define void @foo_vrow(ptr%buf, i16 %row) {
112
112
; CHECK-NEXT: entry:
113
113
; CHECK-NEXT: [[TMP0:%.*]] = alloca <256 x i32>, align 64
114
114
; CHECK-NEXT: [[TMP1:%.*]] = alloca <256 x i32>, align 64
115
- ; CHECK-NEXT: br i1 undef , label [[L1:%.*]], label [[L2:%.*]]
115
+ ; CHECK-NEXT: br i1 poison , label [[L1:%.*]], label [[L2:%.*]]
116
116
; CHECK: l1:
117
117
; CHECK-NEXT: [[T1:%.*]] = call x86_amx @llvm.x86.tilezero.internal(i16 [[ROW:%.*]], i16 32)
118
118
; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 [[ROW]], i16 32, ptr [[TMP1]], i64 32, x86_amx [[T1]])
119
119
; CHECK-NEXT: [[TMP3:%.*]] = load <256 x i32>, ptr [[TMP1]], align 1024
120
- ; CHECK-NEXT: br i1 undef , label [[L2]], label [[EXIT:%.*]]
120
+ ; CHECK-NEXT: br i1 poison , label [[L2]], label [[EXIT:%.*]]
121
121
; CHECK: l2:
122
- ; CHECK-NEXT: [[T3:%.*]] = phi <256 x i32> [ undef , [[ENTRY:%.*]] ], [ [[TMP3]], [[L1]] ]
122
+ ; CHECK-NEXT: [[T3:%.*]] = phi <256 x i32> [ poison , [[ENTRY:%.*]] ], [ [[TMP3]], [[L1]] ]
123
123
; CHECK-NEXT: store <256 x i32> [[T3]], ptr [[TMP0]], align 1024
124
124
; CHECK-NEXT: [[TMP5:%.*]] = call x86_amx @llvm.x86.tileloadd64.internal(i16 [[ROW]], i16 32, ptr [[TMP0]], i64 32)
125
125
; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 [[ROW]], i16 32, ptr [[BUF:%.*]], i64 1024, x86_amx [[TMP5]])
@@ -128,15 +128,15 @@ define void @foo_vrow(ptr%buf, i16 %row) {
128
128
; CHECK-NEXT: ret void
129
129
;
130
130
entry:
131
- br i1 undef , label %l1 , label %l2
131
+ br i1 poison , label %l1 , label %l2
132
132
133
133
l1:
134
134
%t1 = call x86_amx @llvm.x86.tilezero.internal (i16 %row , i16 32 )
135
135
%t2 = call <256 x i32 > @llvm.x86.cast.tile.to.vector.v256i32 (x86_amx %t1 )
136
- br i1 undef , label %l2 , label %exit
136
+ br i1 poison , label %l2 , label %exit
137
137
138
138
l2:
139
- %t3 = phi <256 x i32 > [ undef , %entry ], [ %t2 , %l1 ]
139
+ %t3 = phi <256 x i32 > [ poison , %entry ], [ %t2 , %l1 ]
140
140
%t4 = call x86_amx @llvm.x86.cast.vector.to.tile.v256i32 (<256 x i32 > %t3 )
141
141
call void @llvm.x86.tilestored64.internal (i16 %row , i16 32 , ptr %buf , i64 1024 , x86_amx %t4 )
142
142
br label %exit
@@ -150,13 +150,13 @@ define void @foo_vcol(ptr%buf, i16 %col) {
150
150
; CHECK-NEXT: entry:
151
151
; CHECK-NEXT: [[TMP0:%.*]] = alloca <256 x i32>, align 64
152
152
; CHECK-NEXT: [[TMP1:%.*]] = alloca <256 x i32>, align 64
153
- ; CHECK-NEXT: br i1 undef , label [[L1:%.*]], label [[L2:%.*]]
153
+ ; CHECK-NEXT: br i1 poison , label [[L1:%.*]], label [[L2:%.*]]
154
154
; CHECK: l1:
155
155
; CHECK-NEXT: [[T1:%.*]] = call x86_amx @llvm.x86.tilezero.internal(i16 8, i16 [[COL:%.*]])
156
156
; CHECK-NEXT: [[TMP3:%.*]] = sext i16 [[COL]] to i64
157
157
; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 8, i16 [[COL]], ptr [[TMP1]], i64 [[TMP3]], x86_amx [[T1]])
158
158
; CHECK-NEXT: [[TMP4:%.*]] = load <256 x i32>, ptr [[TMP1]], align 1024
159
- ; CHECK-NEXT: br i1 undef , label [[L2]], label [[EXIT:%.*]]
159
+ ; CHECK-NEXT: br i1 poison , label [[L2]], label [[EXIT:%.*]]
160
160
; CHECK: l2:
161
161
; CHECK-NEXT: [[T3:%.*]] = phi <256 x i32> [ zeroinitializer, [[ENTRY:%.*]] ], [ [[TMP4]], [[L1]] ]
162
162
; CHECK-NEXT: store <256 x i32> [[T3]], ptr [[TMP0]], align 1024
@@ -168,12 +168,12 @@ define void @foo_vcol(ptr%buf, i16 %col) {
168
168
; CHECK-NEXT: ret void
169
169
;
170
170
entry:
171
- br i1 undef , label %l1 , label %l2
171
+ br i1 poison , label %l1 , label %l2
172
172
173
173
l1:
174
174
%t1 = call x86_amx @llvm.x86.tilezero.internal (i16 8 , i16 %col )
175
175
%t2 = call <256 x i32 > @llvm.x86.cast.tile.to.vector.v256i32 (x86_amx %t1 )
176
- br i1 undef , label %l2 , label %exit
176
+ br i1 poison , label %l2 , label %exit
177
177
178
178
l2:
179
179
%t3 = phi <256 x i32 > [ zeroinitializer , %entry ], [ %t2 , %l1 ]
@@ -189,29 +189,29 @@ define void @noshape(ptr%buf) {
189
189
; CHECK-LABEL: @noshape(
190
190
; CHECK-NEXT: entry:
191
191
; CHECK-NEXT: [[TMP0:%.*]] = alloca <256 x i32>, align 64
192
- ; CHECK-NEXT: br i1 undef , label [[L1:%.*]], label [[L2:%.*]]
192
+ ; CHECK-NEXT: br i1 poison , label [[L1:%.*]], label [[L2:%.*]]
193
193
; CHECK: l1:
194
194
; CHECK-NEXT: [[T1:%.*]] = call x86_amx @llvm.x86.tilezero.internal(i16 8, i16 32)
195
195
; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 8, i16 32, ptr [[TMP0]], i64 32, x86_amx [[T1]])
196
196
; CHECK-NEXT: [[TMP2:%.*]] = load <256 x i32>, ptr [[TMP0]], align 1024
197
- ; CHECK-NEXT: br i1 undef , label [[L2]], label [[EXIT:%.*]]
197
+ ; CHECK-NEXT: br i1 poison , label [[L2]], label [[EXIT:%.*]]
198
198
; CHECK: l2:
199
- ; CHECK-NEXT: [[T3:%.*]] = phi <256 x i32> [ undef , [[ENTRY:%.*]] ], [ [[TMP2]], [[L1]] ]
199
+ ; CHECK-NEXT: [[T3:%.*]] = phi <256 x i32> [ poison , [[ENTRY:%.*]] ], [ [[TMP2]], [[L1]] ]
200
200
; CHECK-NEXT: store <256 x i32> [[T3]], ptr [[BUF:%.*]], align 1024
201
201
; CHECK-NEXT: br label [[EXIT]]
202
202
; CHECK: exit:
203
203
; CHECK-NEXT: ret void
204
204
;
205
205
entry:
206
- br i1 undef , label %l1 , label %l2
206
+ br i1 poison , label %l1 , label %l2
207
207
208
208
l1:
209
209
%t1 = call x86_amx @llvm.x86.tilezero.internal (i16 8 , i16 32 )
210
210
%t2 = call <256 x i32 > @llvm.x86.cast.tile.to.vector.v256i32 (x86_amx %t1 )
211
- br i1 undef , label %l2 , label %exit
211
+ br i1 poison , label %l2 , label %exit
212
212
213
213
l2:
214
- %t3 = phi <256 x i32 > [ undef , %entry ], [ %t2 , %l1 ]
214
+ %t3 = phi <256 x i32 > [ poison , %entry ], [ %t2 , %l1 ]
215
215
%t4 = call x86_amx @llvm.x86.cast.vector.to.tile.v256i32 (<256 x i32 > %t3 )
216
216
%t5 = call <256 x i32 > @llvm.x86.cast.tile.to.vector.v256i32 (x86_amx %t4 )
217
217
store <256 x i32 > %t5 , ptr %buf
@@ -225,30 +225,30 @@ define void @noshape2(ptr%buf) {
225
225
; CHECK-LABEL: @noshape2(
226
226
; CHECK-NEXT: entry:
227
227
; CHECK-NEXT: [[TMP0:%.*]] = alloca <256 x i32>, align 64
228
- ; CHECK-NEXT: br i1 undef , label [[L1:%.*]], label [[L2:%.*]]
228
+ ; CHECK-NEXT: br i1 poison , label [[L1:%.*]], label [[L2:%.*]]
229
229
; CHECK: l1:
230
230
; CHECK-NEXT: [[T1:%.*]] = call x86_amx @llvm.x86.tilezero.internal(i16 8, i16 32)
231
231
; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 8, i16 32, ptr [[TMP0]], i64 32, x86_amx [[T1]])
232
232
; CHECK-NEXT: [[TMP2:%.*]] = load <256 x i32>, ptr [[TMP0]], align 1024
233
- ; CHECK-NEXT: br i1 undef , label [[L2]], label [[EXIT:%.*]]
233
+ ; CHECK-NEXT: br i1 poison , label [[L2]], label [[EXIT:%.*]]
234
234
; CHECK: l2:
235
- ; CHECK-NEXT: [[T3:%.*]] = phi <256 x i32> [ undef , [[ENTRY:%.*]] ], [ [[TMP2]], [[L1]] ]
235
+ ; CHECK-NEXT: [[T3:%.*]] = phi <256 x i32> [ poison , [[ENTRY:%.*]] ], [ [[TMP2]], [[L1]] ]
236
236
; CHECK-NEXT: [[T6:%.*]] = call <256 x i32> @llvm.abs.v256i32(<256 x i32> [[T3]], i1 true)
237
237
; CHECK-NEXT: store <256 x i32> [[T6]], ptr [[BUF:%.*]], align 1024
238
238
; CHECK-NEXT: br label [[EXIT]]
239
239
; CHECK: exit:
240
240
; CHECK-NEXT: ret void
241
241
;
242
242
entry:
243
- br i1 undef , label %l1 , label %l2
243
+ br i1 poison , label %l1 , label %l2
244
244
245
245
l1:
246
246
%t1 = call x86_amx @llvm.x86.tilezero.internal (i16 8 , i16 32 )
247
247
%t2 = call <256 x i32 > @llvm.x86.cast.tile.to.vector.v256i32 (x86_amx %t1 )
248
- br i1 undef , label %l2 , label %exit
248
+ br i1 poison , label %l2 , label %exit
249
249
250
250
l2:
251
- %t3 = phi <256 x i32 > [ undef , %entry ], [ %t2 , %l1 ]
251
+ %t3 = phi <256 x i32 > [ poison , %entry ], [ %t2 , %l1 ]
252
252
%t4 = call x86_amx @llvm.x86.cast.vector.to.tile.v256i32 (<256 x i32 > %t3 )
253
253
%t5 = call <256 x i32 > @llvm.x86.cast.tile.to.vector.v256i32 (x86_amx %t4 )
254
254
%t6 = call <256 x i32 > @llvm.abs.v256i32 (<256 x i32 > %t5 , i1 1 )
0 commit comments