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[InstCombine] Dropping redundant masking before left-shift [3/5] (PR42563)
Summary: If we have some pattern that leaves only some low bits set, and then performs left-shift of those bits, if none of the bits that are left after the final shift are modified by the mask, we can omit the mask. There are many variants to this pattern: d. `(x & ((-1 << MaskShAmt) >> MaskShAmt)) << ShiftShAmt` All these patterns can be simplified to just: `x << ShiftShAmt` iff: d. `(ShiftShAmt-MaskShAmt) s>= 0` (i.e. `ShiftShAmt u>= MaskShAmt`) alive proofs: d: https://rise4fun.com/Alive/I5Y For now let's start with patterns where both shift amounts are variable, with trivial constant "offset" between them, since i believe this is both simplest to handle and i think this is most common. But again, there are likely other variants where we could use ValueTracking/ConstantRange to handle more cases. https://bugs.llvm.org/show_bug.cgi?id=42563 Differential Revision: https://reviews.llvm.org/D64519 llvm-svn: 366538
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‎llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -73,11 +73,12 @@ reassociateShiftAmtsOfTwoSameDirectionShifts(BinaryOperator *Sh0,
7373
// a) (x & ((1 << MaskShAmt) - 1)) << ShiftShAmt
7474
// b) (x & (~(-1 << MaskShAmt))) << ShiftShAmt
7575
// c) (x & (-1 >> MaskShAmt)) << ShiftShAmt
76+
// d) (x & ((-1 << MaskShAmt) >> MaskShAmt)) << ShiftShAmt
7677
// All these patterns can be simplified to just:
7778
// x << ShiftShAmt
7879
// iff:
7980
// a,b) (MaskShAmt+ShiftShAmt) u>= bitwidth(x)
80-
// c) (ShiftShAmt-MaskShAmt) s>= 0 (i.e. ShiftShAmt u>= MaskShAmt)
81+
// c,d) (ShiftShAmt-MaskShAmt) s>= 0 (i.e. ShiftShAmt u>= MaskShAmt)
8182
static Instruction *
8283
dropRedundantMaskingOfLeftShiftInput(BinaryOperator *OuterShift,
8384
const SimplifyQuery &SQ) {
@@ -95,6 +96,9 @@ dropRedundantMaskingOfLeftShiftInput(BinaryOperator *OuterShift,
9596
auto MaskB = m_Xor(m_Shl(m_AllOnes(), m_Value(MaskShAmt)), m_AllOnes());
9697
// (-1 >> MaskShAmt)
9798
auto MaskC = m_Shr(m_AllOnes(), m_Value(MaskShAmt));
99+
// ((-1 << MaskShAmt) >> MaskShAmt)
100+
auto MaskD =
101+
m_Shr(m_Shl(m_AllOnes(), m_Value(MaskShAmt)), m_Deferred(MaskShAmt));
98102

99103
Value *X;
100104
if (match(Masked, m_c_And(m_CombineOr(MaskA, MaskB), m_Value(X)))) {
@@ -111,7 +115,7 @@ dropRedundantMaskingOfLeftShiftInput(BinaryOperator *OuterShift,
111115
APInt(BitWidth, BitWidth))))
112116
return nullptr;
113117
// All good, we can do this fold.
114-
} else if (match(Masked, m_c_And(MaskC, m_Value(X)))) {
118+
} else if (match(Masked, m_c_And(m_CombineOr(MaskC, MaskD), m_Value(X)))) {
115119
// Can we simplify (ShiftShAmt-MaskShAmt) ?
116120
Value *ShAmtsDiff =
117121
SimplifySubInst(ShiftShAmt, MaskShAmt, /*IsNSW=*/false, /*IsNUW=*/false,

‎llvm/test/Transforms/InstCombine/redundant-left-shift-input-masking-variant-d.ll

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -23,7 +23,7 @@ define i32 @t0_basic(i32 %x, i32 %nbits) {
2323
; CHECK-NEXT: call void @use32(i32 [[T0]])
2424
; CHECK-NEXT: call void @use32(i32 [[T1]])
2525
; CHECK-NEXT: call void @use32(i32 [[T2]])
26-
; CHECK-NEXT: [[T4:%.*]] = shl i32 [[T2]], [[NBITS]]
26+
; CHECK-NEXT: [[T4:%.*]] = shl i32 [[X]], [[NBITS]]
2727
; CHECK-NEXT: ret i32 [[T4]]
2828
;
2929
%t0 = shl i32 -1, %nbits
@@ -46,7 +46,7 @@ define i32 @t1_bigger_shift(i32 %x, i32 %nbits) {
4646
; CHECK-NEXT: call void @use32(i32 [[T1]])
4747
; CHECK-NEXT: call void @use32(i32 [[T2]])
4848
; CHECK-NEXT: call void @use32(i32 [[T3]])
49-
; CHECK-NEXT: [[T4:%.*]] = shl i32 [[T2]], [[T3]]
49+
; CHECK-NEXT: [[T4:%.*]] = shl i32 [[X]], [[T3]]
5050
; CHECK-NEXT: ret i32 [[T4]]
5151
;
5252
%t0 = shl i32 -1, %nbits
@@ -75,7 +75,7 @@ define <3 x i32> @t2_vec_splat(<3 x i32> %x, <3 x i32> %nbits) {
7575
; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T1]])
7676
; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T2]])
7777
; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T3]])
78-
; CHECK-NEXT: [[T4:%.*]] = shl <3 x i32> [[T2]], [[T3]]
78+
; CHECK-NEXT: [[T4:%.*]] = shl <3 x i32> [[X]], [[T3]]
7979
; CHECK-NEXT: ret <3 x i32> [[T4]]
8080
;
8181
%t0 = shl <3 x i32> <i32 -1, i32 -1, i32 -1>, %nbits
@@ -100,7 +100,7 @@ define <3 x i32> @t3_vec_nonsplat(<3 x i32> %x, <3 x i32> %nbits) {
100100
; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T1]])
101101
; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T2]])
102102
; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T3]])
103-
; CHECK-NEXT: [[T4:%.*]] = shl <3 x i32> [[T2]], [[T3]]
103+
; CHECK-NEXT: [[T4:%.*]] = shl <3 x i32> [[X]], [[T3]]
104104
; CHECK-NEXT: ret <3 x i32> [[T4]]
105105
;
106106
%t0 = shl <3 x i32> <i32 -1, i32 -1, i32 -1>, %nbits
@@ -124,7 +124,7 @@ define <3 x i32> @t4_vec_undef(<3 x i32> %x, <3 x i32> %nbits) {
124124
; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T1]])
125125
; CHECK-NEXT: call void @use3xi32(<3 x i32> [[T2]])
126126
; CHECK-NEXT: call void @use3xi32(<3 x i32> [[NBITS]])
127-
; CHECK-NEXT: [[T4:%.*]] = shl <3 x i32> [[T2]], [[NBITS]]
127+
; CHECK-NEXT: [[T4:%.*]] = shl <3 x i32> [[X]], [[NBITS]]
128128
; CHECK-NEXT: ret <3 x i32> [[T4]]
129129
;
130130
%t0 = shl <3 x i32> <i32 -1, i32 undef, i32 -1>, %nbits
@@ -152,7 +152,7 @@ define i32 @t5_commutativity0(i32 %nbits) {
152152
; CHECK-NEXT: call void @use32(i32 [[T0]])
153153
; CHECK-NEXT: call void @use32(i32 [[T1]])
154154
; CHECK-NEXT: call void @use32(i32 [[T2]])
155-
; CHECK-NEXT: [[T3:%.*]] = shl i32 [[T2]], [[NBITS]]
155+
; CHECK-NEXT: [[T3:%.*]] = shl i32 [[X]], [[NBITS]]
156156
; CHECK-NEXT: ret i32 [[T3]]
157157
;
158158
%x = call i32 @gen32()
@@ -178,7 +178,7 @@ define i32 @t6_commutativity1(i32 %nbits0, i32 %nbits1) {
178178
; CHECK-NEXT: call void @use32(i32 [[T2]])
179179
; CHECK-NEXT: call void @use32(i32 [[T3]])
180180
; CHECK-NEXT: call void @use32(i32 [[T4]])
181-
; CHECK-NEXT: [[T5:%.*]] = shl i32 [[T4]], [[NBITS0]]
181+
; CHECK-NEXT: [[T5:%.*]] = shl i32 [[T3]], [[NBITS0]]
182182
; CHECK-NEXT: ret i32 [[T5]]
183183
;
184184
%t0 = shl i32 -1, %nbits0
@@ -233,7 +233,7 @@ define i32 @t8_nuw(i32 %x, i32 %nbits) {
233233
; CHECK-NEXT: call void @use32(i32 [[T0]])
234234
; CHECK-NEXT: call void @use32(i32 [[T1]])
235235
; CHECK-NEXT: call void @use32(i32 [[T2]])
236-
; CHECK-NEXT: [[T3:%.*]] = shl nuw i32 [[T2]], [[NBITS]]
236+
; CHECK-NEXT: [[T3:%.*]] = shl i32 [[X]], [[NBITS]]
237237
; CHECK-NEXT: ret i32 [[T3]]
238238
;
239239
%t0 = shl i32 -1, %nbits
@@ -254,7 +254,7 @@ define i32 @t9_nsw(i32 %x, i32 %nbits) {
254254
; CHECK-NEXT: call void @use32(i32 [[T0]])
255255
; CHECK-NEXT: call void @use32(i32 [[T1]])
256256
; CHECK-NEXT: call void @use32(i32 [[T2]])
257-
; CHECK-NEXT: [[T3:%.*]] = shl nsw i32 [[T2]], [[NBITS]]
257+
; CHECK-NEXT: [[T3:%.*]] = shl i32 [[X]], [[NBITS]]
258258
; CHECK-NEXT: ret i32 [[T3]]
259259
;
260260
%t0 = shl i32 -1, %nbits
@@ -275,7 +275,7 @@ define i32 @t10_nuw_nsw(i32 %x, i32 %nbits) {
275275
; CHECK-NEXT: call void @use32(i32 [[T0]])
276276
; CHECK-NEXT: call void @use32(i32 [[T1]])
277277
; CHECK-NEXT: call void @use32(i32 [[T2]])
278-
; CHECK-NEXT: [[T3:%.*]] = shl nuw nsw i32 [[T2]], [[NBITS]]
278+
; CHECK-NEXT: [[T3:%.*]] = shl i32 [[X]], [[NBITS]]
279279
; CHECK-NEXT: ret i32 [[T3]]
280280
;
281281
%t0 = shl i32 -1, %nbits

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