@@ -213,7 +213,6 @@ template <endianness E> static uint32_t readShuffle(const uint8_t *loc) {
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return v;
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}
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- template <endianness E>
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static void writeValue (uint8_t *loc, uint64_t v, uint8_t bitsSize,
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uint8_t shift) {
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uint32_t instr = read32 (loc);
@@ -230,7 +229,7 @@ static void writeShuffleValue(uint8_t *loc, uint64_t v, uint8_t bitsSize,
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if (E == support::little)
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std::swap (words[0 ], words[1 ]);
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- writeValue<E> (loc, v, bitsSize, shift);
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+ writeValue (loc, v, bitsSize, shift);
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if (E == support::little)
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std::swap (words[0 ], words[1 ]);
@@ -246,7 +245,6 @@ static void writeMicroRelocation16(uint8_t *loc, uint64_t v, uint8_t bitsSize,
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}
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template <class ELFT > void MIPS<ELFT>::writePltHeader(uint8_t *buf) const {
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- const endianness e = ELFT::TargetEndianness;
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if (isMicroMips ()) {
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uint64_t gotPlt = in.gotPlt ->getVA ();
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uint64_t plt = in.plt ->getVA ();
@@ -302,16 +300,15 @@ template <class ELFT> void MIPS<ELFT>::writePltHeader(uint8_t *buf) const {
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write32 (buf + 28 , 0x2718fffe ); // subu $24, $24, 2
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uint64_t gotPlt = in.gotPlt ->getVA ();
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- writeValue<e> (buf, gotPlt + 0x8000 , 16 , 16 );
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- writeValue<e> (buf + 4 , gotPlt, 16 , 0 );
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- writeValue<e> (buf + 8 , gotPlt, 16 , 0 );
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+ writeValue (buf, gotPlt + 0x8000 , 16 , 16 );
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+ writeValue (buf + 4 , gotPlt, 16 , 0 );
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+ writeValue (buf + 8 , gotPlt, 16 , 0 );
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}
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template <class ELFT >
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void MIPS<ELFT>::writePlt(uint8_t *buf, uint64_t gotPltEntryAddr,
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uint64_t pltEntryAddr, int32_t index,
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unsigned relOff) const {
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- const endianness e = ELFT::TargetEndianness;
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if (isMicroMips ()) {
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// Overwrite trap instructions written by Writer::writeTrapInstr.
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memset (buf, 0 , pltEntrySize);
@@ -341,9 +338,9 @@ void MIPS<ELFT>::writePlt(uint8_t *buf, uint64_t gotPltEntryAddr,
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write32 (buf + 4 , loadInst); // l[wd] $25, %lo(.got.plt entry)($15)
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write32 (buf + 8 , jrInst); // jr $25 / jr.hb $25
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write32 (buf + 12 , addInst); // [d]addiu $24, $15, %lo(.got.plt entry)
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- writeValue<e> (buf, gotPltEntryAddr + 0x8000 , 16 , 16 );
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- writeValue<e> (buf + 4 , gotPltEntryAddr, 16 , 0 );
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- writeValue<e> (buf + 12 , gotPltEntryAddr, 16 , 0 );
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+ writeValue (buf, gotPltEntryAddr + 0x8000 , 16 , 16 );
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+ writeValue (buf + 4 , gotPltEntryAddr, 16 , 0 );
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+ writeValue (buf + 12 , gotPltEntryAddr, 16 , 0 );
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}
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template <class ELFT >
@@ -494,7 +491,7 @@ static uint64_t fixupCrossModeJump(uint8_t *loc, RelType type, uint64_t val) {
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case R_MIPS_26: {
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uint32_t inst = read32 (loc) >> 26 ;
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if (inst == 0x3 || inst == 0x1d ) { // JAL or JALX
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- writeValue<e> (loc, 0x1d << 26 , 32 , 0 );
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+ writeValue (loc, 0x1d << 26 , 32 , 0 );
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return val;
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}
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break ;
@@ -558,17 +555,17 @@ void MIPS<ELFT>::relocateOne(uint8_t *loc, RelType type, uint64_t val) const {
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write64 (loc, val);
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break ;
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case R_MIPS_26:
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- writeValue<e> (loc, val, 26 , 2 );
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+ writeValue (loc, val, 26 , 2 );
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break ;
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case R_MIPS_GOT16:
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// The R_MIPS_GOT16 relocation's value in "relocatable" linking mode
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// is updated addend (not a GOT index). In that case write high 16 bits
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// to store a correct addend value.
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if (config->relocatable ) {
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- writeValue<e> (loc, val + 0x8000 , 16 , 16 );
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+ writeValue (loc, val + 0x8000 , 16 , 16 );
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} else {
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checkInt (loc, val, 16 , type);
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- writeValue<e> (loc, val, 16 , 0 );
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+ writeValue (loc, val, 16 , 0 );
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}
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break ;
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case R_MICROMIPS_GOT16:
@@ -595,7 +592,7 @@ void MIPS<ELFT>::relocateOne(uint8_t *loc, RelType type, uint64_t val) const {
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case R_MIPS_PCLO16:
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case R_MIPS_TLS_DTPREL_LO16:
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case R_MIPS_TLS_TPREL_LO16:
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- writeValue<e> (loc, val, 16 , 0 );
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+ writeValue (loc, val, 16 , 0 );
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break ;
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case R_MICROMIPS_GPREL16:
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case R_MICROMIPS_TLS_GD:
@@ -621,7 +618,7 @@ void MIPS<ELFT>::relocateOne(uint8_t *loc, RelType type, uint64_t val) const {
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case R_MIPS_PCHI16:
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case R_MIPS_TLS_DTPREL_HI16:
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case R_MIPS_TLS_TPREL_HI16:
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- writeValue<e> (loc, val + 0x8000 , 16 , 16 );
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+ writeValue (loc, val + 0x8000 , 16 , 16 );
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break ;
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case R_MICROMIPS_CALL_HI16:
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case R_MICROMIPS_GOT_HI16:
@@ -631,10 +628,10 @@ void MIPS<ELFT>::relocateOne(uint8_t *loc, RelType type, uint64_t val) const {
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writeShuffleValue<e>(loc, val + 0x8000 , 16 , 16 );
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break ;
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case R_MIPS_HIGHER:
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- writeValue<e> (loc, val + 0x80008000 , 16 , 32 );
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+ writeValue (loc, val + 0x80008000 , 16 , 32 );
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break ;
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case R_MIPS_HIGHEST:
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- writeValue<e> (loc, val + 0x800080008000 , 16 , 48 );
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+ writeValue (loc, val + 0x800080008000 , 16 , 48 );
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break ;
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case R_MIPS_JALR:
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val -= 4 ;
@@ -657,25 +654,25 @@ void MIPS<ELFT>::relocateOne(uint8_t *loc, RelType type, uint64_t val) const {
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case R_MIPS_PC16:
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checkAlignment (loc, val, 4 , type);
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checkInt (loc, val, 18 , type);
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- writeValue<e> (loc, val, 16 , 2 );
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+ writeValue (loc, val, 16 , 2 );
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break ;
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case R_MIPS_PC19_S2:
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checkAlignment (loc, val, 4 , type);
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checkInt (loc, val, 21 , type);
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- writeValue<e> (loc, val, 19 , 2 );
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+ writeValue (loc, val, 19 , 2 );
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break ;
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case R_MIPS_PC21_S2:
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checkAlignment (loc, val, 4 , type);
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checkInt (loc, val, 23 , type);
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- writeValue<e> (loc, val, 21 , 2 );
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+ writeValue (loc, val, 21 , 2 );
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break ;
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case R_MIPS_PC26_S2:
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checkAlignment (loc, val, 4 , type);
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checkInt (loc, val, 28 , type);
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- writeValue<e> (loc, val, 26 , 2 );
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+ writeValue (loc, val, 26 , 2 );
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break ;
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case R_MIPS_PC32:
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- writeValue<e> (loc, val, 32 , 0 );
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+ writeValue (loc, val, 32 , 0 );
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break ;
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case R_MICROMIPS_26_S1:
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case R_MICROMIPS_PC26_S1:
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