@@ -28,20 +28,18 @@ extern (C):
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nothrow :
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@nogc :
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- version (PPC )
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- version = PPC_Any;
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- else version (PPC64 )
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- version = PPC_Any;
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-
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- version (SPARC )
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- version = SPARC_Any;
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- version (SPARC64 )
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- version = SPARC_Any;
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-
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- version (X86 )
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- version = X86_Any;
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- version (X86_64 )
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- version = X86_Any;
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+ version (ARM ) version = ARM_Any;
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+ version (AArch64 ) version = ARM_Any;
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+ version (MIPS32 ) version = MIPS_Any;
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+ version (MIPS64 ) version = MIPS_Any;
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+ version (PPC ) version = PPC_Any;
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+ version (PPC64 ) version = PPC_Any;
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+ version (S390 ) version = IBMZ_Any;
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+ version (SPARC ) version = SPARC_Any;
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+ version (SPARC64 ) version = SPARC_Any;
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+ version (SystemZ ) version = IBMZ_Any;
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+ version (X86 ) version = X86_Any;
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+ version (X86_64 ) version = X86_Any;
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version (MinGW )
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version = GNUFP ;
@@ -94,17 +92,7 @@ version (GNUFP)
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alias fexcept_t = ushort ;
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}
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// https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/mips/bits/fenv.h
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- else version (MIPS32 )
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- {
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- struct fenv_t
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- {
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- uint __fp_control_register;
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- }
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-
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- alias fexcept_t = ushort ;
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- }
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- // https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/mips/bits/fenv.h
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- else version (MIPS64 )
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+ else version (MIPS_Any)
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{
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struct fenv_t
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{
@@ -147,7 +135,7 @@ version (GNUFP)
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alias fexcept_t = ulong ;
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}
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// https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/s390/fpu/bits/fenv.h
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- else version (SystemZ )
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+ else version (IBMZ_Any )
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{
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struct fenv_t
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{
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FE_TOWARDZERO = 0xC00 , // /
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}
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}
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- else version (ARM )
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+ else version (ARM_Any )
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{
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// Define bits representing exceptions in the FPU status word.
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enum
@@ -597,29 +585,7 @@ else
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FE_TOWARDZERO = 0xC00000 , // /
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}
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}
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- else version (AArch64 )
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- {
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- // Define bits representing exceptions in the FPSR status word.
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- enum
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- {
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- FE_INVALID = 1 , // /
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- FE_DIVBYZERO = 2 , // /
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- FE_OVERFLOW = 4 , // /
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- FE_UNDERFLOW = 8 , // /
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- FE_INEXACT = 16 , // /
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- FE_ALL_EXCEPT = 31 , // /
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- }
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-
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- // Define bits representing rounding modes in the FPCR Rmode field.
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- enum
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- {
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- FE_TONEAREST = 0x000000 , // /
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- FE_UPWARD = 0x400000 , // /
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- FE_DOWNWARD = 0x800000 , // /
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- FE_TOWARDZERO = 0xC00000 , // /
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- }
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- }
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- else version (MIPS32 )
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+ else version (MIPS_Any)
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{
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// Define bits representing the exception.
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enum
@@ -641,61 +607,7 @@ else
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FE_DOWNWARD = 0x3 , // /
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}
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}
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- else version (MIPS64 )
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- {
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- // Define bits representing the exception.
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- enum
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- {
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- FE_INEXACT = 0x04 , // /
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- FE_UNDERFLOW = 0x08 , // /
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- FE_OVERFLOW = 0x10 , // /
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- FE_DIVBYZERO = 0x20 , // /
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- FE_INVALID = 0x40 , // /
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- FE_ALL_EXCEPT = 0x7C , // /
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- }
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-
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- // The MIPS FPU supports all of the four defined rounding modes.
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- enum
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- {
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- FE_TONEAREST = 0x0 , // /
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- FE_TOWARDZERO = 0x1 , // /
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- FE_UPWARD = 0x2 , // /
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- FE_DOWNWARD = 0x3 , // /
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- }
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- }
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- else version (PPC )
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- {
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- // Define bits representing the exception.
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- enum
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- {
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- FE_INEXACT = 0x2000000 , // /
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- FE_DIVBYZERO = 0x4000000 , // /
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- FE_UNDERFLOW = 0x8000000 , // /
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- FE_OVERFLOW = 0x10000000 , // /
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- FE_INVALID = 0x20000000 , // /
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- FE_INVALID_SNAN = 0x1000000 , // / non-standard
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- FE_INVALID_ISI = 0x800000 , // / non-standard
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- FE_INVALID_IDI = 0x400000 , // / non-standard
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- FE_INVALID_ZDZ = 0x200000 , // / non-standard
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- FE_INVALID_IMZ = 0x100000 , // / non-standard
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- FE_INVALID_COMPARE = 0x80000 , // / non-standard
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- FE_INVALID_SOFTWARE = 0x400 , // / non-standard
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- FE_INVALID_SQRT = 0x200 , // / non-standard
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- FE_INVALID_INTEGER_CONVERSION = 0x100 , // / non-standard
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- FE_ALL_INVALID = 0x1F80700 , // / non-standard
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- FE_ALL_EXCEPT = 0x3E000000 , // /
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- }
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-
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- // PowerPC chips support all of the four defined rounding modes.
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- enum
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- {
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- FE_TONEAREST = 0 , // /
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- FE_TOWARDZERO = 1 , // /
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- FE_UPWARD = 2 , // /
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- FE_DOWNWARD = 3 , // /
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- }
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- }
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- else version (PPC64 )
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+ else version (PPC_Any)
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{
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// Define bits representing the exception.
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enum
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FE_DOWNWARD = 3 , // /
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}
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}
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- else version (SPARC64 )
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+ else version (SPARC_Any )
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{
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// Define bits representing the exception.
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enum
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FE_DOWNWARD = 0xc0000000 , // /
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}
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}
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- else version (SystemZ )
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+ else version (IBMZ_Any )
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{
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// Define bits representing the exception.
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enum
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