winch(aarch64): Revisit the shadow stack pointer approach (bytecodealliance#10146)

This commit marks another step toward finalizing AArch64 support in
Winch.

While enabling spec tests, I experienced some unexpected failures
related to Wasm loads/stores and traps. The observed
symptoms are as follows:

* Under normal conditions, Wasm loads/stores work as expected.
* In out-of-bounds scenarios, loads/stores result in a segmentation
  fault, whereas the expected behavior is to trigger an out-of-bounds trap.
* When out-of-bounds access can be determined statically, the program
  still results in a segmentation fault instead of the anticipated
  out-of-bounds trap.

Debugging revealed the following issues:

* The stack pointer was not correctly aligned to 16 bytes when entering
  signal handlers, which caused the segmentation fault.
* Wasm loads and stores were not flagged as untrusted, leading to
  segmentation faults even when the stack pointer was properly aligned.

This commit fixes the previous issues by:

* Correctly flagging wasm loads and stores as untrusted.
* Reworking the shadow stack pointer approach such that it allows
  aligning the stack pointer at arbitrary points in the program,
  particularly where signal handling might be needed. This rework
  involves changing some principles introduced in
  bytecodealliance#5652; namely:
  changing the primary stack pointer register to be the shadow stack
  pointer. See the updates comments in the code for more details.

Note that this change doesn't enable spectests. To try this change, run:

  cargo run -- wast -Ccompiler=winch tests/spec_testsuite/address.wast

Author: saulecabrera

tests/disas/winch/aarch64/br/as_br_if_cond.wat

@@ -10,11 +10,11 @@
 ;;       mov     x29, sp
 ;;       mov     x28, sp
 ;;       mov     x9, x0
-;;       sub     sp, sp, #0x10
-;;       mov     x28, sp
+;;       sub     x28, x28, #0x10
+;;       mov     sp, x28
 ;;       stur    x0, [x28, #8]
 ;;       stur    x1, [x28]
-;;       add     sp, sp, #0x10
-;;       mov     x28, sp
+;;       add     x28, x28, #0x10
+;;       mov     sp, x28
 ;;       ldp     x29, x30, [sp], #0x10
 ;;       ret

tests/disas/winch/aarch64/br/as_br_value.wat

@@ -10,13 +10,13 @@
 ;;       mov     x29, sp
 ;;       mov     x28, sp
 ;;       mov     x9, x0
-;;       sub     sp, sp, #0x10
-;;       mov     x28, sp
+;;       sub     x28, x28, #0x10
+;;       mov     sp, x28
 ;;       stur    x0, [x28, #8]
 ;;       stur    x1, [x28]
 ;;       mov     x16, #9
 ;;       mov     w0, w16
-;;       add     sp, sp, #0x10
-;;       mov     x28, sp
+;;       add     x28, x28, #0x10
+;;       mov     sp, x28
 ;;       ldp     x29, x30, [sp], #0x10
 ;;       ret

tests/disas/winch/aarch64/br/as_if_cond.wat

@@ -15,13 +15,13 @@
 ;;       mov     x29, sp
 ;;       mov     x28, sp
 ;;       mov     x9, x0
-;;       sub     sp, sp, #0x10
-;;       mov     x28, sp
+;;       sub     x28, x28, #0x10
+;;       mov     sp, x28
 ;;       stur    x0, [x28, #8]
 ;;       stur    x1, [x28]
 ;;       mov     x16, #2
 ;;       mov     w0, w16
-;;       add     sp, sp, #0x10
-;;       mov     x28, sp
+;;       add     x28, x28, #0x10
+;;       mov     sp, x28
 ;;       ldp     x29, x30, [sp], #0x10
 ;;       ret

tests/disas/winch/aarch64/br/as_if_else.wat

@@ -15,8 +15,8 @@
 ;;       mov     x29, sp
 ;;       mov     x28, sp
 ;;       mov     x9, x0
-;;       sub     sp, sp, #0x18
-;;       mov     x28, sp
+;;       sub     x28, x28, #0x18
+;;       mov     sp, x28
 ;;       stur    x0, [x28, #0x10]
 ;;       stur    x1, [x28, #8]
 ;;       stur    w2, [x28, #4]
@@ -29,7 +29,7 @@
 ;;       b       #0x48
 ;;   40: mov     x16, #4
 ;;       mov     w0, w16
-;;       add     sp, sp, #0x18
-;;       mov     x28, sp
+;;       add     x28, x28, #0x18
+;;       mov     sp, x28
 ;;       ldp     x29, x30, [sp], #0x10
 ;;       ret

tests/disas/winch/aarch64/br/as_if_then.wat

@@ -15,8 +15,8 @@
 ;;       mov     x29, sp
 ;;       mov     x28, sp
 ;;       mov     x9, x0
-;;       sub     sp, sp, #0x18
-;;       mov     x28, sp
+;;       sub     x28, x28, #0x18
+;;       mov     sp, x28
 ;;       stur    x0, [x28, #0x10]
 ;;       stur    x1, [x28, #8]
 ;;       stur    w2, [x28, #4]
@@ -29,7 +29,7 @@
 ;;       mov     w0, w16
 ;;       b       #0x48
 ;;   44: ldur    w0, [x28]
-;;       add     sp, sp, #0x18
-;;       mov     x28, sp
+;;       add     x28, x28, #0x18
+;;       mov     sp, x28
 ;;       ldp     x29, x30, [sp], #0x10
 ;;       ret

tests/disas/winch/aarch64/br/as_loop_first.wat

@@ -11,13 +11,13 @@
 ;;       mov     x29, sp
 ;;       mov     x28, sp
 ;;       mov     x9, x0
-;;       sub     sp, sp, #0x10
-;;       mov     x28, sp
+;;       sub     x28, x28, #0x10
+;;       mov     sp, x28
 ;;       stur    x0, [x28, #8]
 ;;       stur    x1, [x28]
 ;;       mov     x16, #3
 ;;       mov     w0, w16
-;;       add     sp, sp, #0x10
-;;       mov     x28, sp
+;;       add     x28, x28, #0x10
+;;       mov     sp, x28
 ;;       ldp     x29, x30, [sp], #0x10
 ;;       ret

tests/disas/winch/aarch64/br/br_jump.wat

@@ -18,24 +18,23 @@
 ;;       mov     x29, sp
 ;;       mov     x28, sp
 ;;       mov     x9, x0
-;;       sub     sp, sp, #0x18
-;;       mov     x28, sp
+;;       sub     x28, x28, #0x18
+;;       mov     sp, x28
 ;;       stur    x0, [x28, #0x10]
 ;;       stur    x1, [x28, #8]
 ;;       mov     x16, #0
 ;;       stur    x16, [x28]
 ;;       ldur    w16, [x28, #4]
-;;       sub     sp, sp, #4
-;;       mov     x28, sp
+;;       sub     x28, x28, #4
+;;       mov     sp, x28
 ;;       stur    w16, [x28]
 ;;       ldur    w16, [x28, #8]
-;;       sub     sp, sp, #4
-;;       mov     x28, sp
+;;       sub     x28, x28, #4
+;;       mov     sp, x28
 ;;       stur    w16, [x28]
-;;       add     sp, sp, #4
-;;       mov     x28, sp
+;;       add     x28, x28, #4
 ;;       b       #0x38
-;;   54: add     sp, sp, #0x18
-;;       mov     x28, sp
+;;   50: add     x28, x28, #0x18
+;;       mov     sp, x28
 ;;       ldp     x29, x30, [sp], #0x10
 ;;       ret

tests/disas/winch/aarch64/br_if/as_br_if_cond.wat

@@ -10,8 +10,8 @@
 ;;       mov     x29, sp
 ;;       mov     x28, sp
 ;;       mov     x9, x0
-;;       sub     sp, sp, #0x10
-;;       mov     x28, sp
+;;       sub     x28, x28, #0x10
+;;       mov     sp, x28
 ;;       stur    x0, [x28, #8]
 ;;       stur    x1, [x28]
 ;;       mov     x16, #1
@@ -24,7 +24,7 @@
 ;;       tst     w0, w0
 ;;       b.ne    #0x48
 ;;       b       #0x48
-;;   48: add     sp, sp, #0x10
-;;       mov     x28, sp
+;;   48: add     x28, x28, #0x10
+;;       mov     sp, x28
 ;;       ldp     x29, x30, [sp], #0x10
 ;;       ret

tests/disas/winch/aarch64/br_if/as_br_value.wat

@@ -10,8 +10,8 @@
 ;;       mov     x29, sp
 ;;       mov     x28, sp
 ;;       mov     x9, x0
-;;       sub     sp, sp, #0x10
-;;       mov     x28, sp
+;;       sub     x28, x28, #0x10
+;;       mov     sp, x28
 ;;       stur    x0, [x28, #8]
 ;;       stur    x1, [x28]
 ;;       mov     x16, #2
@@ -21,7 +21,7 @@
 ;;       tst     w1, w1
 ;;       b.ne    #0x3c
 ;;       b       #0x3c
-;;   3c: add     sp, sp, #0x10
-;;       mov     x28, sp
+;;   3c: add     x28, x28, #0x10
+;;       mov     sp, x28
 ;;       ldp     x29, x30, [sp], #0x10
 ;;       ret

tests/disas/winch/aarch64/br_if/as_if_cond.wat

@@ -16,8 +16,8 @@
 ;;       mov     x29, sp
 ;;       mov     x28, sp
 ;;       mov     x9, x0
-;;       sub     sp, sp, #0x18
-;;       mov     x28, sp
+;;       sub     x28, x28, #0x18
+;;       mov     sp, x28
 ;;       stur    x0, [x28, #0x10]
 ;;       stur    x1, [x28, #8]
 ;;       stur    w2, [x28, #4]
@@ -35,7 +35,7 @@
 ;;       b       #0x5c
 ;;   54: mov     x16, #3
 ;;       mov     w0, w16
-;;       add     sp, sp, #0x18
-;;       mov     x28, sp
+;;       add     x28, x28, #0x18
+;;       mov     sp, x28
 ;;       ldp     x29, x30, [sp], #0x10
 ;;       ret