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boards: silabs: xg24_rb4187c: Add SPI and I2C buses
Add DTS configuration for SPI and I2C buses on the board. Make use of the new zephyr:board-supported-hw Sphinx directive to automate the list of supported features in the board documentation. Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
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boards/silabs/radio_boards/xg24_rb4187c/doc/index.rst

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@@ -34,71 +34,13 @@ documents:
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Supported Features
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==================
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The board configuration supports the following hardware features:
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+-----------+------------+-------------------------------------+
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| Interface | Controller | Driver/Component |
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+===========+============+=====================================+
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| MPU | on-chip | memory protection unit |
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+-----------+------------+-------------------------------------+
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| NVIC | on-chip | nested vector interrupt controller |
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+-----------+------------+-------------------------------------+
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| SYSTICK | on-chip | systick |
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+-----------+------------+-------------------------------------+
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| COUNTER | on-chip | stimer |
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+-----------+------------+-------------------------------------+
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| FLASH | on-chip | flash memory |
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+-----------+------------+-------------------------------------+
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| GPIO | on-chip | gpio |
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+-----------+------------+-------------------------------------+
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| UART | on-chip | serial |
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+-----------+------------+-------------------------------------+
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| DMA | on-chip | ldma |
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+-----------+------------+-------------------------------------+
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| I2C | on-chip | i2c |
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+-----------+------------+-------------------------------------+
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| TRNG | on-chip | semailbox |
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+-----------+------------+-------------------------------------+
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| WATCHDOG | on-chip | watchdog |
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+-----------+------------+-------------------------------------+
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| ACMP | on-chip | comparator |
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+-----------+------------+-------------------------------------+
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Other hardware features are currently not supported by the port.
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Connections and IOs
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===================
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In the following table, the column **Name** contains Pin names. For example, PA2
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means Pin number 2 on PORTA, as used in the board's datasheets and manuals.
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+-------+-------------+-------------------------------------+
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| Name | Function | Usage |
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+=======+=============+=====================================+
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| PB2 | GPIO | LED0 |
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+-------+-------------+-------------------------------------+
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| PB4 | GPIO | LED1 |
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+-------+-------------+-------------------------------------+
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| PB1 | GPIO | Push Button 0 |
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+-------+-------------+-------------------------------------+
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| PB3 | GPIO | Push Button 1 |
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+-------+-------------+-------------------------------------+
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| PB0 | GPIO | Board Controller Enable |
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| | | VCOM_ENABLE |
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+-------+-------------+-------------------------------------+
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| PA8 | USART0_TX | UART Console VCOM_TX US0_TX |
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+-------+-------------+-------------------------------------+
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| PA9 | USART0_RX | UART Console VCOM_RX US0_RX |
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+-------+-------------+-------------------------------------+
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The default configuration can be found in
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:zephyr_file:`boards/silabs/radio_boards/xg24_rb4187c/xg24_rb4187c_defconfig`
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.. zephyr:board-supported-hw::
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System Clock
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============
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The EFR32MG24 SoC is configured to use the 39 MHz external oscillator on the
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board.
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The EFR32MG24 SoC is configured to use the HFRCODPLL oscillator at 78 MHz as the system clock,
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locked to the 39 MHz external crystal oscillator on the board.
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Serial Port
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===========

boards/silabs/radio_boards/xg24_rb4187c/xg24_rb4187c-pinctrl.dtsi

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Original file line numberDiff line numberDiff line change
@@ -1,5 +1,6 @@
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/*
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* Copyright (c) 2023 Antmicro <www.antmicro.com>
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* Copyright (c) 2025 Silicon Laboratories Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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silabs,input-filter;
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};
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};
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eusart1_default: eusart1_default {
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group0 {
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pins = <EUSART1_TX_PC1>, <EUSART1_SCLK_PC3>;
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drive-push-pull;
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output-high;
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};
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group1 {
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pins = <EUSART1_RX_PC2>;
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input-enable;
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silabs,input-filter;
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};
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};
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i2c0_default: i2c0_default {
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group0 {
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pins = <I2C0_SCL_PC5>, <I2C0_SDA_PC7>;
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drive-open-drain;
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bias-pull-up;
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};
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};
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};

boards/silabs/radio_boards/xg24_rb4187c/xg24_rb4187c.dts

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zephyr,flash = &flash0;
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zephyr,code-partition = &slot0_partition;
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zephyr,bt-hci = &bt_hci_silabs;
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zephyr,display = &ls0xx_ls013b7dh03;
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};
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/* These aliases are provided for compatibility with samples */
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sw0 = &button0;
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sw1 = &button1;
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watchdog0 = &wdog0;
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dht0 = &si7021;
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};
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leds {
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};
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};
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sensor_enable: sensor_enable {
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compatible = "regulator-fixed";
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regulator-name = "sensor_enable";
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enable-gpios = <&gpiod 3 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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};
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&cpu0 {
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status = "okay";
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};
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&eusart1 {
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compatible = "silabs,eusart-spi";
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pinctrl-0 = <&eusart1_default>;
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pinctrl-names = "default";
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clock-frequency = <DT_FREQ_M(10)>;
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cs-gpios = <&gpioc 8 GPIO_ACTIVE_HIGH>, <&gpioc 4 GPIO_ACTIVE_LOW>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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ls0xx_ls013b7dh03: ls0xx@0 {
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compatible = "sharp,ls0xx";
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spi-max-frequency = <DT_FREQ_K(1100)>;
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reg = <0>;
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width = <128>;
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height = <128>;
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extcomin-gpios = <&gpioc 6 GPIO_ACTIVE_HIGH>;
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extcomin-frequency = <60>;
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disp-en-gpios = <&gpioc 9 GPIO_ACTIVE_HIGH>;
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};
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mx25r80: mx25r8035f@1 {
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compatible = "jedec,spi-nor";
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reg = <1>;
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spi-max-frequency = <DT_FREQ_M(33)>;
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size = <DT_SIZE_M(8)>;
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jedec-id = [c2 28 14];
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has-dpd;
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dpd-wakeup-sequence = <30000 20 35000>;
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mxicy,mx25r-power-mode = "low-power";
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zephyr,pm-device-runtime-auto;
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};
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};
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&i2c0 {
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pinctrl-0 = <&i2c0_default>;
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pinctrl-names = "default";
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status = "okay";
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si7021: si7021@40 {
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compatible = "silabs,si7006";
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reg = <0x40>;
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vin-supply = <&sensor_enable>;
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status = "okay";
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};
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};
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&gpio {
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location-swo = <0>;
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status = "okay";

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