-
Notifications
You must be signed in to change notification settings - Fork 1.2k
Description
Summary:
In the DCache module, the io.cpu.resp.bits.store_data field incorrectly returns the original store input data for Atomic Memory Operations (AMOs), instead of returning the computed result from the AMOALU.
Technical Details:
When an AMO instruction executes (e.g., amoadd, amoswap), the AMOALU computes the result and stores it in pstore1_storegen_data. However, the response field store_data was unconditionally assigned from pstore1_data (the original input from the CPU register), ignoring the AMO computation.
Location:
- File:
src/main/scala/rocket/DCache.scala - Line: ~975 (in unfixed version)
Impact:
This bug is latent in the current codebase because store_data is not actively used by downstream logic. However, it becomes visible when:
- Logging or tracing AMO operations that read this field
- Future features that rely on
store_datato retrieve the actual stored value
Root Cause:
Missing runtime multiplexer to distinguish between AMO operations (which need the computed result) and regular STORE operations (which use the input data).
Fix:
Replace the unconditional assignment:
io.cpu.resp.bits.store_data := pstore1_dataWith a conditional assignment based on operation type:
io.cpu.resp.bits.store_data := Mux(isAMO(pstore1_cmd), pstore1_storegen_data, pstore1_data)This ensures AMO operations return the computed result while regular stores continue to return the input data.