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I am working on setting up different page tables for different cores in a multi-hart RISC-V system. Currently, all harts use the same page table initialized by hart 0. However, I need to generate a separate page table for the starting hart (hart 0) of the second core because it starts from different pc. I have modified the base address in page_table_list.sv, but I need help in properly generating the page table for the second core’s first hart. Any guidance on this would be greatly appreciated.
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