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Deomid Ryabkovcesantabot
Deomid Ryabkov
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cesantabot
committed
OTA support for STM32
For now, boot loader is configured for only one very specific board. More configurations and board support will come later. CL: OTA support for STM32 PUBLISHED_FROM=ebd0549a80653b2c915665adf391bf37e3d38a0b
1 parent 8247522 commit 9f8a3e1

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12 files changed

+66
-40
lines changed

12 files changed

+66
-40
lines changed

‎fw/platforms/esp8266/Makefile.build

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -57,6 +57,9 @@ MGOS_ENABLE_HEAP_LOG ?= 0
5757
MGOS_ENABLE_CALL_TRACE ?= 0
5858
MGOS_ESP8266_RTOS ?= 0
5959

60+
# Normally boot loader is not updated during OTA update.
61+
# The firmware built with this flag set to true will, when used for OTA,
62+
# will reflash the boot loader as well.
6063
MGOS_UPDATE_BOOT_LOADER ?= false
6164

6265
FLASH_SIZE ?= 4194304

‎fw/platforms/stm32/Makefile.build

Lines changed: 26 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -25,7 +25,11 @@ APP_BIN_LIBS ?=
2525
# Extra parts to include in firmware
2626
APP_EXTRA_FW_PARTS ?=
2727
# Bootloader path
28-
BL_BIN ?=
28+
MGOS_BL_BIN ?=
29+
# Normally boot loader is not updated during OTA update.
30+
# The firmware built with this flag set to true will, when used for OTA,
31+
# will reflash the boot loader as well.
32+
MGOS_UPDATE_BOOT_LOADER ?= false
2933

3034
BUILD_LIB_NAME ?= lib.a
3135

@@ -87,7 +91,7 @@ override FW_STAGING_DIR := $(abspath $(FW_STAGING_DIR))
8791
override FW_DIR := $(abspath $(FW_DIR))
8892
override GEN_DIR := $(abspath $(GEN_DIR))
8993
override BUILD_DIR := $(abspath $(BUILD_DIR))
90-
override BL_BIN := $(abspath $(BL_BIN))
94+
override MGOS_BL_BIN := $(abspath $(MGOS_BL_BIN))
9195

9296
# Platform support files
9397
MGOS_SRCS += arm_exc.c arm_nsleep100.c \
@@ -96,21 +100,21 @@ MGOS_SRCS += arm_exc.c arm_nsleep100.c \
96100
stm32_libc.c \
97101
stm32_main.c stm32_uart.c
98102

99-
APP_ELF = $(BUILD_DIR)/$(APP).elf
100-
APP_BIN = $(BUILD_DIR)/$(APP).bin
103+
APP0_ELF = $(BUILD_DIR)/$(APP).elf
104+
APP0_BIN = $(BUILD_DIR)/$(APP).bin
101105
FLASH_SIZE ?= 0
102106
SRAM_BASE_ADDR ?= 0x20000000
103107
FLASH_BASE_ADDR ?= 0x8000000
104108

105-
ifneq "$(BL_BIN)" ""
106-
FLASH_FS_OFFSET = $(shell echo $$(($(FLASH_BL_SIZE) + $(FLASH_BLC_SIZE))))
109+
ifneq "$(MGOS_BL_BIN)" ""
110+
FLASH_FS_OFFSET = $(shell echo $$(($(FLASH_BL_SIZE) + $(FLASH_BL_CFG_SIZE))))
107111
LD_SCRIPT ?= $(MGOS_PLATFORM_PATH)/ld/stm32_ota_0.ld
108112
else
109113
FLASH_FS_OFFSET = $(FLASH_S0_SIZE)
110114
LD_SCRIPT ?= $(MGOS_PLATFORM_PATH)/ld/stm32_no_ota.ld
111115
endif
112-
FLASH_BL_SIZE ?= $(FLASH_S0_SIZE)
113-
FLASH_BLC_SIZE ?= $(FLASH_S0_SIZE)
116+
FLASH_BL_SIZE ?= 32768
117+
FLASH_BL_CFG_SIZE ?= $(FLASH_S0_SIZE)
114118
MGOS_ROOT_DEVTAB ?= fs0 stm32flash {"offset": $(FLASH_FS_OFFSET), "size": $(MGOS_ROOT_FS_SIZE), "ese": true}
115119
MGOS_ROOT_FS_TYPE ?= SPIFFS
116120
MGOS_ROOT_FS_SIZE ?= $(shell echo $$(($(FLASH_S0_SIZE) * 4 - $(FLASH_FS_OFFSET))))
@@ -246,7 +250,7 @@ LDFLAGS += -Wl,--defsym=SRAM_BASE_ADDR=$(SRAM_BASE_ADDR) -Wl,--defsym=SRAM_SIZE=
246250
-Wl,--defsym=FLASH_BASE_ADDR=$(FLASH_BASE_ADDR) -Wl,--defsym=FLASH_SIZE=$(FLASH_SIZE) \
247251
-Wl,--defsym=FLASH_S0_SIZE=$(FLASH_S0_SIZE) \
248252
-Wl,--defsym=FLASH_BL_SIZE=$(FLASH_BL_SIZE) \
249-
-Wl,--defsym=FLASH_BLC_SIZE=$(FLASH_BLC_SIZE) \
253+
-Wl,--defsym=FLASH_BL_CFG_SIZE=$(FLASH_BL_CFG_SIZE) \
250254
-Wl,--defsym=FLASH_FS_SIZE=$(FLASH_FS_SIZE) \
251255
-Wl,--defsym=NOCACHE_SIZE=0x400
252256

@@ -255,8 +259,11 @@ LDFLAGS += -Wl,--gc-sections
255259
CFLAGS += -DMG_NET_IF=3 -D__CPU_H__ -DMG_LWIP=1 -DLWIP_TIMEVAL_PRIVATE=0 \
256260
-DLWIP_TCP_KEEPALIVE=1 -DMGOS_APP=\"$(APP)\"
257261

258-
FW_PARTS = app:type=app,src=$(APP_BIN),addr=$(FLASH_BASE_ADDR) \
259-
$(APP_EXTRA_FW_PARTS)
262+
FW_PARTS = app:type=app0,src=$(APP0_BIN),bl_size=$(FLASH_BL_SIZE),bl_cfg_size=$(FLASH_BL_CFG_SIZE),fs_size=$(FLASH_FS_SIZE),update_bl=$(MGOS_UPDATE_BOOT_LOADER)
263+
ifeq "$(FLASH_FS_SIZE)$(MGOS_ROOT_FS_EXTRACT)" "01-1"
264+
FW_PARTS += fs:type=fs,src=$(FS_IMG)
265+
endif
266+
FW_PARTS += $(APP_EXTRA_FW_PARTS)
260267

261268
MGOS_OBJS = $(addprefix $(BUILD_DIR)/,$(MGOS_SRCS:=.o))
262269
SDK_OBJS = $(addprefix $(BUILD_DIR)/,$(SDK_SRCS:=.o))
@@ -268,9 +275,9 @@ FFI_EXPORTS_O = $(addprefix $(BUILD_DIR)/,$(notdir $(FFI_EXPORTS_C:=.o)))
268275

269276
include $(MGOS_PATH)/common/scripts/fw_meta.mk
270277

271-
all: $(BUILD_DIR) $(FW_STAGING_DIR) $(FW_DIR) $(GEN_DIR) $(APP_BIN) $(FW_ZIP)
278+
all: $(BUILD_DIR) $(FW_STAGING_DIR) $(FW_DIR) $(GEN_DIR) $(APP0_BIN) $(FW_ZIP)
272279

273-
$(FW_MANIFEST): $(APP_BIN) $(MGOS_CONFIG_C) $(BUILD_INFO_C) $(MG_BUILD_INFO_C)
280+
$(FW_MANIFEST): $(APP0_BIN) $(MGOS_CONFIG_C) $(BUILD_INFO_C) $(MG_BUILD_INFO_C)
274281

275282
$(BUILD_DIR) $(FW_STAGING_DIR) $(FW_DIR) $(GEN_DIR):
276283
$(vecho) "MKDIR $@"
@@ -302,17 +309,17 @@ ifeq "$(MGOS_ROOT_FS_ON_SYS_FLASH)" "1"
302309
else
303310
BIN_PARTS += $(FS_ZIP_O)
304311
endif
305-
ifneq "$(BL_BIN)" ""
312+
ifneq "$(MGOS_BL_BIN)" ""
306313
BIN_PARTS += $(BL_BIN_O)
307314
endif
308315

309-
$(APP_ELF): $(BIN_PARTS) $(LD_SCRIPT)
310-
$(vecho) "LD $@ (BL=$(notdir $(BL_BIN)) LDS=$(notdir $(LD_SCRIPT)))"
316+
$(APP0_ELF): $(BIN_PARTS) $(LD_SCRIPT)
317+
$(vecho) "LD $@ (BL=$(notdir $(MGOS_BL_BIN)) LDS=$(notdir $(LD_SCRIPT)))"
311318
$(Q) $(CC) $(CFLAGS) $(LDFLAGS) \
312319
-Wl,-Map=$@.map -Wl,--start-group $(BIN_PARTS) $(STM32_LIBC) -lgcc -lnosys -Wl,--end-group \
313320
-T$(LD_SCRIPT) -o $@
314321

315-
$(APP_BIN): $(APP_ELF)
322+
$(APP0_BIN): $(APP0_ELF)
316323
$(vecho) "BIN $@"
317324
$(Q) $(OC) -Obinary $^ $@
318325
$(vecho) " Code: $$($(OC) -Obinary -j .text $^ /dev/fd/1 | wc -c)"
@@ -351,9 +358,9 @@ $(FS_IMG_C): $(FS_IMG)
351358
$(vecho) "GEN $@"
352359
$(Q) $(FW_META_CMD) xxd --var_name fs_img --const --section .fs_img $(FS_IMG) > $@
353360

354-
$(BL_BIN_C): $(BL_BIN)
361+
$(BL_BIN_C): $(MGOS_BL_BIN)
355362
$(vecho) "GEN $@"
356-
$(Q) $(FW_META_CMD) xxd --var_name bl_bin --const --section .bl_bin $(BL_BIN) > $@
363+
$(Q) $(FW_META_CMD) xxd --var_name bl_bin --const --section .bl_bin $(MGOS_BL_BIN) > $@
357364

358365
$(FFI_EXPORTS_C): $(FS_FILES)
359366
$(call gen_ffi_exports,$@,$(FFI_SYMBOLS),$(filter %.js,$(FS_FILES)))

‎fw/platforms/stm32/ld/stm32_ota_0.ld

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -10,17 +10,17 @@ _stack = SRAM_BASE_ADDR + SRAM_SIZE;
1010
_stack_size = 0x400;
1111

1212
MEMORY {
13-
FLASH_BL (rx) : ORIGIN = FLASH_BASE_ADDR, LENGTH = FLASH_BL_SIZE
14-
FLASH_BLC (rx) : ORIGIN = FLASH_BASE_ADDR + FLASH_BL_SIZE, LENGTH = FLASH_S0_SIZE
15-
FLASH_FS (r) : ORIGIN = FLASH_BASE_ADDR + FLASH_BL_SIZE + FLASH_BLC_SIZE, LENGTH = FLASH_FS_SIZE
16-
FLASH_CS (rx) : ORIGIN = FLASH_BASE_ADDR + FLASH_BL_SIZE + FLASH_BLC_SIZE + FLASH_FS_SIZE,
17-
LENGTH = FLASH_SIZE - (FLASH_BL_SIZE + FLASH_BLC_SIZE + FLASH_FS_SIZE)
18-
SRAM (rwx) : ORIGIN = SRAM_BASE_ADDR, LENGTH = SRAM_SIZE
13+
FLASH_BL (rx) : ORIGIN = FLASH_BASE_ADDR, LENGTH = FLASH_BL_SIZE
14+
FLASH_BL_CFG (rx) : ORIGIN = FLASH_BASE_ADDR + FLASH_BL_SIZE, LENGTH = FLASH_S0_SIZE
15+
FLASH_FS (r) : ORIGIN = FLASH_BASE_ADDR + FLASH_BL_SIZE + FLASH_BL_CFG_SIZE, LENGTH = FLASH_FS_SIZE
16+
FLASH_CS (rx) : ORIGIN = FLASH_BASE_ADDR + FLASH_BL_SIZE + FLASH_BL_CFG_SIZE + FLASH_FS_SIZE,
17+
LENGTH = FLASH_SIZE - (FLASH_BL_SIZE + FLASH_BL_CFG_SIZE + FLASH_FS_SIZE)
18+
SRAM (rwx) : ORIGIN = SRAM_BASE_ADDR, LENGTH = SRAM_SIZE
1919
}
2020

2121
/* Define output sections */
2222
SECTIONS {
23-
.bool_loader : {
23+
.boot_loader : {
2424
KEEP(*(.bl_bin))
2525
} > FLASH_BL
2626

‎fw/platforms/stm32/src/stm32_gpio.c

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -194,24 +194,30 @@ bool mgos_gpio_set_pull(int pin, enum mgos_gpio_pull_type pull) {
194194

195195
void mgos_gpio_hal_int_clr(int pin) {
196196
/* TODO(rojer) */
197+
(void) pin;
197198
}
198199

199200
void mgos_gpio_hal_int_done(int pin) {
200201
/* TODO(rojer) */
202+
(void) pin;
201203
}
202204

203205
bool mgos_gpio_hal_set_int_mode(int pin, enum mgos_gpio_int_mode mode) {
204206
/* TODO(rojer) */
207+
(void) pin;
208+
(void) mode;
205209
return false;
206210
}
207211

208212
bool mgos_gpio_enable_int(int pin) {
209213
/* TODO(rojer) */
214+
(void) pin;
210215
return false;
211216
}
212217

213218
bool mgos_gpio_disable_int(int pin) {
214219
/* TODO(rojer) */
220+
(void) pin;
215221
return false;
216222
}
217223

‎fw/platforms/stm32/src/stm32_hal.c

Lines changed: 7 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -71,15 +71,17 @@ void mgos_msleep(uint32_t msecs) {
7171

7272
void HAL_Delay(__IO uint32_t ms) __attribute__((alias("mgos_msleep")));
7373

74-
static void __attribute__((naked)) delay_cycles(unsigned long ulCount) {
74+
static void delay_cycles(unsigned long n) {
7575
__asm(
76-
" subs r0, #1\n"
76+
" subs %0, #1\n"
7777
" bne delay_cycles\n"
78-
" bx lr");
78+
: /* output */
79+
: /* input */ "r"(n)
80+
: /* scratch */);
7981
}
8082

8183
void mgos_usleep(uint32_t usecs) {
82-
#ifndef MGOS_NO_MAIN
84+
#ifndef MGOS_BOOT_BUILD
8385
int ticks = usecs / (1000000 / configTICK_RATE_HZ);
8486
int remainder = usecs % (1000000 / configTICK_RATE_HZ);
8587
if (ticks > 0) vTaskDelay(ticks);
@@ -93,7 +95,7 @@ void mgos_usleep(uint32_t usecs) {
9395
int mg_ssl_if_mbed_random(void *ctx, unsigned char *buf, size_t len) {
9496
RCC->AHB2ENR |= RCC_AHB2ENR_RNGEN;
9597
RNG->CR = RNG_CR_RNGEN;
96-
int i = 0;
98+
size_t i = 0;
9799
do {
98100
if (RNG->SR & RNG_SR_DRDY) {
99101
uint32_t rnd = RNG->DR;

‎fw/platforms/stm32/src/stm32_libc.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -80,7 +80,7 @@ void abort(void) {
8080
__builtin_trap(); // Executes an illegal instruction.
8181
}
8282

83-
#ifdef MGOS_NO_MAIN
83+
#ifdef MGOS_BOOT_BUILD
8484
#undef portENTER_CRITICAL
8585
#define portENTER_CRITICAL()
8686
#undef portEXIT_CRITICAL

‎fw/platforms/stm32/src/stm32_main.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -105,7 +105,7 @@ void SystemCoreClockUpdate(void) {
105105
mgos_nsleep100_cal();
106106
}
107107

108-
#ifndef MGOS_NO_MAIN
108+
#ifndef MGOS_BOOT_BUILD
109109
void (*stm32_int_vectors[256])(void)
110110
__attribute__((section(".ram_int_vectors")));
111111
extern const void *stm32_flash_int_vectors[2];
@@ -124,7 +124,7 @@ void stm32_set_int_handler(int irqn, void (*handler)(void)) {
124124

125125
int main(void) {
126126
/* Move int vectors to RAM. */
127-
for (int i = 0; i < ARRAY_SIZE(stm32_int_vectors); i++) {
127+
for (int i = 0; i < (int) ARRAY_SIZE(stm32_int_vectors); i++) {
128128
stm32_int_vectors[i] = arm_exc_handler_top;
129129
}
130130
memcpy(stm32_int_vectors, stm32_flash_int_vectors,

‎fw/platforms/stm32/src/stm32_uart.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -45,7 +45,7 @@ extern struct stm32_uart_def const s_uart_defs[MGOS_MAX_NUM_UARTS];
4545

4646
static inline uint8_t stm32_uart_rx_byte(struct stm32_uart_state *uds);
4747

48-
#ifdef MGOS_NO_MAIN
48+
#ifdef MGOS_BOOT_BUILD
4949
#define stm32_set_int_handler(irqn, handler)
5050
#endif
5151

‎fw/platforms/stm32/src/stm32f412.c

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -49,11 +49,19 @@ struct stm32_uart_def const
4949
.regs = USART3,
5050
.default_pins =
5151
{
52+
#ifndef STM32F4_USART3_ALT_PINS
5253
.tx = STM32_PIN_DEF('D', 8, 7),
5354
.rx = STM32_PIN_DEF('D', 9, 7),
5455
.ck = STM32_PIN_DEF('D', 10, 7),
5556
.cts = STM32_PIN_DEF('D', 11, 7),
5657
.rts = STM32_PIN_DEF('D', 12, 7),
58+
#else
59+
.tx = STM32_PIN_DEF('C', 10, 7),
60+
.rx = STM32_PIN_DEF('C', 11, 7),
61+
.ck = STM32_PIN_DEF('B', 12, 8),
62+
.cts = STM32_PIN_DEF('B', 13, 8),
63+
.rts = STM32_PIN_DEF('B', 14, 7),
64+
#endif
5765
},
5866
},
5967
{.regs = NULL},

‎fw/src/mgos_hal_freertos.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -253,7 +253,7 @@ void mgos_hal_freertos_run_mgos_task(bool start_scheduler) {
253253
}
254254
}
255255

256-
#ifndef MGOS_NO_MAIN
256+
#ifndef MGOS_BOOT_BUILD
257257
IRAM void mgos_ints_disable(void) {
258258
ENTER_CRITICAL();
259259
}
@@ -285,4 +285,4 @@ IRAM void mgos_runlock(struct mgos_rlock_type *l) {
285285
IRAM void mgos_rlock_destroy(struct mgos_rlock_type *l) {
286286
vSemaphoreDelete((SemaphoreHandle_t) l);
287287
}
288-
#endif /* MGOS_NO_MAIN */
288+
#endif /* MGOS_BOOT_BUILD */

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