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| 1 | +From 50b0b3c9ff71ffd7ebbd74ae46844c3566478123 Mon Sep 17 00:00:00 2001 |
| 2 | +From: "Gabriel F. T. Gomes" <gabrielftg@linux.ibm.com> |
| 3 | +Date: Mon, 27 May 2019 15:21:22 -0300 |
| 4 | +Subject: [PATCH] powerpc: Fix build failures with current GCC |
| 5 | + |
| 6 | +Since GCC commit 271500 (svn), also known as the following commit on the |
| 7 | +git mirror: |
| 8 | + |
| 9 | +commit e154242724b084380e3221df7c08fcdbd8460674 |
| 10 | +Author: amodra <amodra@138bc75d-0d04-0410-961f-82ee72b054a4> |
| 11 | +Date: Wed May 22 04:34:26 2019 +0000 |
| 12 | + |
| 13 | + [RS6000] Don't pass -many to the assembler |
| 14 | + |
| 15 | +glibc builds are failing when an assembly implementation does not |
| 16 | +declare the correct '.machine' directive, or when no such directive is |
| 17 | +declared at all. For example, when a POWER6 instruction is used, but |
| 18 | +'.machine power6' is not declared, the assembler will fail with an error |
| 19 | +similar to the following: |
| 20 | + |
| 21 | + ../sysdeps/powerpc/powerpc64/power8/strcmp.S: Assembler messages: |
| 22 | + 24 ../sysdeps/powerpc/powerpc64/power8/strcmp.S:55: Error: unrecognized opcode: `cmpb' |
| 23 | + |
| 24 | +This patch adds '.machine powerN' directives where none existed, as well |
| 25 | +as it updates '.machine power7' directives on POWER8 files, because the |
| 26 | +minimum binutils version required to build glibc (binutils 2.25) now |
| 27 | +provides this machine version. It also adds '-many' to the assembler |
| 28 | +command used to build tst-set_ppr.c. |
| 29 | + |
| 30 | +Tested for powerpc, powerpc64, and powerpc64le, as well as with |
| 31 | +build-many-glibcs.py for powerpc targets. |
| 32 | + |
| 33 | +Reviewed-by: Tulio Magno Quites Machado Filho <tuliom@linux.ibm.com> |
| 34 | +--- |
| 35 | + sysdeps/powerpc/Makefile | 5 +++ |
| 36 | + sysdeps/powerpc/powerpc64/power4/memcmp.S | 7 ++++ |
| 37 | + sysdeps/powerpc/powerpc64/power7/strncmp.S | 1 + |
| 38 | + .../powerpc/powerpc64/power8/fpu/s_llround.S | 1 + |
| 39 | + sysdeps/powerpc/powerpc64/power8/strcasecmp.S | 36 ++++++------------- |
| 40 | + sysdeps/powerpc/powerpc64/power8/strcasestr.S | 14 ++------ |
| 41 | + sysdeps/powerpc/powerpc64/power8/strcmp.S | 1 + |
| 42 | + 7 files changed, 28 insertions(+), 37 deletions(-) |
| 43 | + |
| 44 | +diff --git a/sysdeps/powerpc/Makefile b/sysdeps/powerpc/Makefile |
| 45 | +index 6aa683b03f..23126147df 100644 |
| 46 | +--- a/sysdeps/powerpc/Makefile |
| 47 | ++++ b/sysdeps/powerpc/Makefile |
| 48 | +@@ -45,6 +45,11 @@ ifeq ($(subdir),misc) |
| 49 | + sysdep_headers += sys/platform/ppc.h |
| 50 | + tests += test-gettimebase |
| 51 | + tests += tst-set_ppr |
| 52 | ++ |
| 53 | ++# This test is expected to run and exit with EXIT_UNSUPPORTED on |
| 54 | ++# processors that do not implement the Power ISA 2.06 or greater. |
| 55 | ++# But the test makes use of instructions from Power ISA 2.06 and 2.07. |
| 56 | ++CFLAGS-tst-set_ppr.c += -Wa,-many |
| 57 | + endif |
| 58 | + |
| 59 | + ifneq (,$(filter %le,$(config-machine))) |
| 60 | +diff --git a/sysdeps/powerpc/powerpc64/power4/memcmp.S b/sysdeps/powerpc/powerpc64/power4/memcmp.S |
| 61 | +index e5319f101f..38dcf4c9a1 100644 |
| 62 | +--- a/sysdeps/powerpc/powerpc64/power4/memcmp.S |
| 63 | ++++ b/sysdeps/powerpc/powerpc64/power4/memcmp.S |
| 64 | +@@ -26,7 +26,14 @@ |
| 65 | + # define MEMCMP memcmp |
| 66 | + #endif |
| 67 | + |
| 68 | ++#ifndef __LITTLE_ENDIAN__ |
| 69 | + .machine power4 |
| 70 | ++#else |
| 71 | ++/* Little endian is only available since POWER8, so it's safe to |
| 72 | ++ specify .machine as power8 (or older), even though this is a POWER4 |
| 73 | ++ file. Since the little-endian code uses 'ldbrx', power7 is enough. */ |
| 74 | ++ .machine power7 |
| 75 | ++#endif |
| 76 | + ENTRY_TOCLESS (MEMCMP, 4) |
| 77 | + CALL_MCOUNT 3 |
| 78 | + |
| 79 | +diff --git a/sysdeps/powerpc/powerpc64/power7/strncmp.S b/sysdeps/powerpc/powerpc64/power7/strncmp.S |
| 80 | +index 0c7429d19f..10f898c5a3 100644 |
| 81 | +--- a/sysdeps/powerpc/powerpc64/power7/strncmp.S |
| 82 | ++++ b/sysdeps/powerpc/powerpc64/power7/strncmp.S |
| 83 | +@@ -28,6 +28,7 @@ |
| 84 | + const char *s2 [r4], |
| 85 | + size_t size [r5]) */ |
| 86 | + |
| 87 | ++ .machine power7 |
| 88 | + ENTRY_TOCLESS (STRNCMP, 5) |
| 89 | + CALL_MCOUNT 3 |
| 90 | + |
| 91 | +diff --git a/sysdeps/powerpc/powerpc64/power8/fpu/s_llround.S b/sysdeps/powerpc/powerpc64/power8/fpu/s_llround.S |
| 92 | +index a22fc63bb3..84c76ba0f9 100644 |
| 93 | +--- a/sysdeps/powerpc/powerpc64/power8/fpu/s_llround.S |
| 94 | ++++ b/sysdeps/powerpc/powerpc64/power8/fpu/s_llround.S |
| 95 | +@@ -26,6 +26,7 @@ |
| 96 | + |
| 97 | + /* long long [r3] llround (float x [fp1]) */ |
| 98 | + |
| 99 | ++ .machine power8 |
| 100 | + ENTRY_TOCLESS (__llround) |
| 101 | + CALL_MCOUNT 0 |
| 102 | + frin fp1,fp1 /* Round to nearest +-0.5. */ |
| 103 | +diff --git a/sysdeps/powerpc/powerpc64/power8/strcasecmp.S b/sysdeps/powerpc/powerpc64/power8/strcasecmp.S |
| 104 | +index 3a2efe2a64..eeacd40c7f 100644 |
| 105 | +--- a/sysdeps/powerpc/powerpc64/power8/strcasecmp.S |
| 106 | ++++ b/sysdeps/powerpc/powerpc64/power8/strcasecmp.S |
| 107 | +@@ -91,21 +91,7 @@ |
| 108 | + 3: \ |
| 109 | + TOLOWER() |
| 110 | + |
| 111 | +-#ifdef _ARCH_PWR8 |
| 112 | +-# define VCLZD_V8_v7 vclzd v8, v7; |
| 113 | +-# define MFVRD_R3_V1 mfvrd r3, v1; |
| 114 | +-# define VSUBUDM_V9_V8 vsubudm v9, v9, v8; |
| 115 | +-# define VPOPCNTD_V8_V8 vpopcntd v8, v8; |
| 116 | +-# define VADDUQM_V7_V8 vadduqm v9, v7, v8; |
| 117 | +-#else |
| 118 | +-# define VCLZD_V8_v7 .long 0x11003fc2 |
| 119 | +-# define MFVRD_R3_V1 .long 0x7c230067 |
| 120 | +-# define VSUBUDM_V9_V8 .long 0x112944c0 |
| 121 | +-# define VPOPCNTD_V8_V8 .long 0x110047c3 |
| 122 | +-# define VADDUQM_V7_V8 .long 0x11274100 |
| 123 | +-#endif |
| 124 | +- |
| 125 | +- .machine power7 |
| 126 | ++ .machine power8 |
| 127 | + |
| 128 | + ENTRY (__STRCASECMP) |
| 129 | + #ifdef USE_AS_STRNCASECMP |
| 130 | +@@ -265,15 +251,15 @@ L(different): |
| 131 | + #ifdef __LITTLE_ENDIAN__ |
| 132 | + /* Count trailing zero. */ |
| 133 | + vspltisb v8, -1 |
| 134 | +- VADDUQM_V7_V8 |
| 135 | ++ vadduqm v9, v7, v8 |
| 136 | + vandc v8, v9, v7 |
| 137 | +- VPOPCNTD_V8_V8 |
| 138 | ++ vpopcntd v8, v8 |
| 139 | + vspltb v6, v8, 15 |
| 140 | + vcmpequb. v6, v6, v1 |
| 141 | + blt cr6, L(shift8) |
| 142 | + #else |
| 143 | + /* Count leading zero. */ |
| 144 | +- VCLZD_V8_v7 |
| 145 | ++ vclzd v8, v7 |
| 146 | + vspltb v6, v8, 7 |
| 147 | + vcmpequb. v6, v6, v1 |
| 148 | + blt cr6, L(shift8) |
| 149 | +@@ -291,7 +277,7 @@ L(skipsum): |
| 150 | + /* Merge and move to GPR. */ |
| 151 | + vmrglb v6, v6, v7 |
| 152 | + vslo v1, v6, v1 |
| 153 | +- MFVRD_R3_V1 |
| 154 | ++ mfvrd r3, v1 |
| 155 | + /* Place the characters that are different in first position. */ |
| 156 | + sldi rSTR2, rRTN, 56 |
| 157 | + srdi rSTR2, rSTR2, 56 |
| 158 | +@@ -301,7 +287,7 @@ L(skipsum): |
| 159 | + vslo v6, v5, v8 |
| 160 | + vslo v7, v4, v8 |
| 161 | + vmrghb v1, v6, v7 |
| 162 | +- MFVRD_R3_V1 |
| 163 | ++ mfvrd r3, v1 |
| 164 | + srdi rSTR2, rRTN, 48 |
| 165 | + sldi rSTR2, rSTR2, 56 |
| 166 | + srdi rSTR2, rSTR2, 56 |
| 167 | +@@ -320,15 +306,15 @@ L(null_found): |
| 168 | + #ifdef __LITTLE_ENDIAN__ |
| 169 | + /* Count trailing zero. */ |
| 170 | + vspltisb v8, -1 |
| 171 | +- VADDUQM_V7_V8 |
| 172 | ++ vadduqm v9, v7, v8 |
| 173 | + vandc v8, v9, v7 |
| 174 | +- VPOPCNTD_V8_V8 |
| 175 | ++ vpopcntd v8, v8 |
| 176 | + vspltb v6, v8, 15 |
| 177 | + vcmpequb. v6, v6, v10 |
| 178 | + blt cr6, L(shift_8) |
| 179 | + #else |
| 180 | + /* Count leading zero. */ |
| 181 | +- VCLZD_V8_v7 |
| 182 | ++ vclzd v8, v7 |
| 183 | + vspltb v6, v8, 7 |
| 184 | + vcmpequb. v6, v6, v10 |
| 185 | + blt cr6, L(shift_8) |
| 186 | +@@ -343,10 +329,10 @@ L(skipsum1): |
| 187 | + vspltisb v10, 7 |
| 188 | + vslb v10, v10, v10 |
| 189 | + vsldoi v9, v0, v10, 1 |
| 190 | +- VSUBUDM_V9_V8 |
| 191 | ++ vsubudm v9, v9, v8 |
| 192 | + vspltisb v8, 8 |
| 193 | + vsldoi v8, v0, v8, 1 |
| 194 | +- VSUBUDM_V9_V8 |
| 195 | ++ vsubudm v9, v9, v8 |
| 196 | + /* Shift and remove junk after null character. */ |
| 197 | + #ifdef __LITTLE_ENDIAN__ |
| 198 | + vslo v5, v5, v9 |
| 199 | +diff --git a/sysdeps/powerpc/powerpc64/power8/strcasestr.S b/sysdeps/powerpc/powerpc64/power8/strcasestr.S |
| 200 | +index 9fc24c29f9..e10f06fd86 100644 |
| 201 | +--- a/sysdeps/powerpc/powerpc64/power8/strcasestr.S |
| 202 | ++++ b/sysdeps/powerpc/powerpc64/power8/strcasestr.S |
| 203 | +@@ -73,18 +73,8 @@ |
| 204 | + vor reg, v8, reg; \ |
| 205 | + vcmpequb. v6, reg, v4; |
| 206 | + |
| 207 | +-/* TODO: change these to the actual instructions when the minimum required |
| 208 | +- binutils allows it. */ |
| 209 | +-#ifdef _ARCH_PWR8 |
| 210 | +-#define VCLZD_V8_v7 vclzd v8, v7; |
| 211 | +-#else |
| 212 | +-#define VCLZD_V8_v7 .long 0x11003fc2 |
| 213 | +-#endif |
| 214 | +- |
| 215 | + #define FRAMESIZE (FRAME_MIN_SIZE+48) |
| 216 | +-/* TODO: change this to .machine power8 when the minimum required binutils |
| 217 | +- allows it. */ |
| 218 | +- .machine power7 |
| 219 | ++ .machine power8 |
| 220 | + ENTRY (STRCASESTR, 4) |
| 221 | + CALL_MCOUNT 2 |
| 222 | + mflr r0 /* Load link register LR to r0. */ |
| 223 | +@@ -291,7 +281,7 @@ L(nullchk1): |
| 224 | + vcmpequb. v6, v0, v7 |
| 225 | + /* Shift r3 by 16 bytes and proceed. */ |
| 226 | + blt cr6, L(shift16) |
| 227 | +- VCLZD_V8_v7 |
| 228 | ++ vclzd v8, v7 |
| 229 | + #ifdef __LITTLE_ENDIAN__ |
| 230 | + vspltb v6, v8, 15 |
| 231 | + #else |
| 232 | +diff --git a/sysdeps/powerpc/powerpc64/power8/strcmp.S b/sysdeps/powerpc/powerpc64/power8/strcmp.S |
| 233 | +index 15e7351d1b..d592266d1d 100644 |
| 234 | +--- a/sysdeps/powerpc/powerpc64/power8/strcmp.S |
| 235 | ++++ b/sysdeps/powerpc/powerpc64/power8/strcmp.S |
| 236 | +@@ -31,6 +31,7 @@ |
| 237 | + 64K as default, the page cross handling assumes minimum page size of |
| 238 | + 4k. */ |
| 239 | + |
| 240 | ++ .machine power8 |
| 241 | + ENTRY_TOCLESS (STRCMP, 4) |
| 242 | + li r0,0 |
| 243 | + |
| 244 | +-- |
| 245 | +2.41.0 |
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