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Commit b50788f

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Merge tag 'kvm-riscv-fixes-6.10-1' of https://github.com/kvm-riscv/linux into HEAD
KVM/riscv fixes for 6.10, take #1 - No need to use mask when hart-index-bits is 0 - Fix incorrect reg_subtype labels in kvm_riscv_vcpu_set_reg_isa_ext()
2 parents b3233c7 + c66f3b4 commit b50788f

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2 files changed

+6
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lines changed

arch/riscv/kvm/aia_device.c

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -237,10 +237,11 @@ static gpa_t aia_imsic_ppn(struct kvm_aia *aia, gpa_t addr)
237237

238238
static u32 aia_imsic_hart_index(struct kvm_aia *aia, gpa_t addr)
239239
{
240-
u32 hart, group = 0;
240+
u32 hart = 0, group = 0;
241241

242-
hart = (addr >> (aia->nr_guest_bits + IMSIC_MMIO_PAGE_SHIFT)) &
243-
GENMASK_ULL(aia->nr_hart_bits - 1, 0);
242+
if (aia->nr_hart_bits)
243+
hart = (addr >> (aia->nr_guest_bits + IMSIC_MMIO_PAGE_SHIFT)) &
244+
GENMASK_ULL(aia->nr_hart_bits - 1, 0);
244245
if (aia->nr_group_bits)
245246
group = (addr >> aia->nr_group_shift) &
246247
GENMASK_ULL(aia->nr_group_bits - 1, 0);

arch/riscv/kvm/vcpu_onereg.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -724,9 +724,9 @@ static int kvm_riscv_vcpu_set_reg_isa_ext(struct kvm_vcpu *vcpu,
724724
switch (reg_subtype) {
725725
case KVM_REG_RISCV_ISA_SINGLE:
726726
return riscv_vcpu_set_isa_ext_single(vcpu, reg_num, reg_val);
727-
case KVM_REG_RISCV_SBI_MULTI_EN:
727+
case KVM_REG_RISCV_ISA_MULTI_EN:
728728
return riscv_vcpu_set_isa_ext_multi(vcpu, reg_num, reg_val, true);
729-
case KVM_REG_RISCV_SBI_MULTI_DIS:
729+
case KVM_REG_RISCV_ISA_MULTI_DIS:
730730
return riscv_vcpu_set_isa_ext_multi(vcpu, reg_num, reg_val, false);
731731
default:
732732
return -ENOENT;

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