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Commit 9fbb303

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aeglbp3tk0v
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x86/resctrl: Make __mon_event_count() handle sum domains
Legacy resctrl monitor files must provide the sum of event values across all Sub-NUMA Cluster (SNC) domains that share an L3 cache instance. There are now two cases: 1) A specific domain is provided in struct rmid_read This is either a non-SNC system, or the request is to read data from just one SNC node. 2) Domain pointer is NULL. In this case the cacheinfo field in struct rmid_read indicates that all SNC nodes that share that L3 cache instance should have the event read and return the sum of all values. Update the CPU sanity check. The existing check that an event is read from a CPU in the requested domain still applies when reading a single domain. But when summing across domains a more relaxed check that the current CPU is in the scope of the L3 cache instance is appropriate since the MSRs to read events are scoped at L3 cache level. Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Reinette Chatre <reinette.chatre@intel.com> Tested-by: Babu Moger <babu.moger@amd.com> Link: https://lore.kernel.org/r/20240628215619.76401-17-tony.luck@intel.com
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arch/x86/kernel/cpu/resctrl/monitor.c

Lines changed: 42 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -324,9 +324,6 @@ int resctrl_arch_rmid_read(struct rdt_resource *r, struct rdt_mon_domain *d,
324324

325325
resctrl_arch_rmid_read_context_check();
326326

327-
if (!cpumask_test_cpu(smp_processor_id(), &d->hdr.cpu_mask))
328-
return -EINVAL;
329-
330327
prmid = logical_rmid_to_physical_rmid(cpu, rmid);
331328
ret = __rmid_read_phys(prmid, eventid, &msr_val);
332329
if (ret)
@@ -592,7 +589,10 @@ static struct mbm_state *get_mbm_state(struct rdt_mon_domain *d, u32 closid,
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593590
static int __mon_event_count(u32 closid, u32 rmid, struct rmid_read *rr)
594591
{
592+
int cpu = smp_processor_id();
593+
struct rdt_mon_domain *d;
595594
struct mbm_state *m;
595+
int err, ret;
596596
u64 tval = 0;
597597

598598
if (rr->first) {
@@ -603,14 +603,47 @@ static int __mon_event_count(u32 closid, u32 rmid, struct rmid_read *rr)
603603
return 0;
604604
}
605605

606-
rr->err = resctrl_arch_rmid_read(rr->r, rr->d, closid, rmid, rr->evtid,
607-
&tval, rr->arch_mon_ctx);
608-
if (rr->err)
609-
return rr->err;
606+
if (rr->d) {
607+
/* Reading a single domain, must be on a CPU in that domain. */
608+
if (!cpumask_test_cpu(cpu, &rr->d->hdr.cpu_mask))
609+
return -EINVAL;
610+
rr->err = resctrl_arch_rmid_read(rr->r, rr->d, closid, rmid,
611+
rr->evtid, &tval, rr->arch_mon_ctx);
612+
if (rr->err)
613+
return rr->err;
610614

611-
rr->val += tval;
615+
rr->val += tval;
612616

613-
return 0;
617+
return 0;
618+
}
619+
620+
/* Summing domains that share a cache, must be on a CPU for that cache. */
621+
if (!cpumask_test_cpu(cpu, &rr->ci->shared_cpu_map))
622+
return -EINVAL;
623+
624+
/*
625+
* Legacy files must report the sum of an event across all
626+
* domains that share the same L3 cache instance.
627+
* Report success if a read from any domain succeeds, -EINVAL
628+
* (translated to "Unavailable" for user space) if reading from
629+
* all domains fail for any reason.
630+
*/
631+
ret = -EINVAL;
632+
list_for_each_entry(d, &rr->r->mon_domains, hdr.list) {
633+
if (d->ci->id != rr->ci->id)
634+
continue;
635+
err = resctrl_arch_rmid_read(rr->r, d, closid, rmid,
636+
rr->evtid, &tval, rr->arch_mon_ctx);
637+
if (!err) {
638+
rr->val += tval;
639+
ret = 0;
640+
}
641+
}
642+
643+
if (ret)
644+
rr->err = ret;
645+
646+
return ret;
614647
}
615648

616649
/*

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