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Commit 659a306

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nirmoyjnikula
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drm/i915/selftests: Set always_coherent to false when reading from CPU
Commit 8d4ba9f ("drm/i915/selftests: Pick correct caching mode.") was not complete as for non LLC sharing platforms cpu read can happen from LLC which probably doesn't have the latest changes made by GPU. Cc: Andi Shyti <andi.shyti@linux.intel.com> Cc: Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com> Cc: Jonathan Cavitt <jonathan.cavitt@intel.com> Fixes: 8d4ba9f ("drm/i915/selftests: Pick correct caching mode.") Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com> Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240516151403.2875-1-nirmoy.das@intel.com Signed-off-by: Nirmoy Das <nirmoy.das@intel.com> (cherry picked from commit 007ed70) Signed-off-by: Jani Nikula <jani.nikula@intel.com>
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drivers/gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -196,7 +196,7 @@ static int verify_access(struct drm_i915_private *i915,
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if (err)
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goto out_file;
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199-
mode = intel_gt_coherent_map_type(to_gt(i915), native_obj, true);
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mode = intel_gt_coherent_map_type(to_gt(i915), native_obj, false);
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vaddr = i915_gem_object_pin_map_unlocked(native_obj, mode);
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if (IS_ERR(vaddr)) {
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err = PTR_ERR(vaddr);

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