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Merge tag 'v6.11-rockchip-dts64-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt
One new board, the pretty interesting Rock 5 ITX, some improvements for the Lunzn Fastrhino R6xS boards, allowing dma on uarts connected to bluetooth modules and an update for the gpu operating points on rk356x. As well as some minor fixes for missing power-dmains and ethernet phy binding adherence. * tag 'v6.11-rockchip-dts64-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: arm64: dts: rockchip: add ROCK 5 ITX board dt-bindings: arm: rockchip: Add ROCK 5 ITX board arm64: dts: rockchip: Add dma-names to uart1 on Pine64 rk3566 devices arm64: dts: rockchip: Add avdd supplies to hdmi on rock64 arm64: dts: rockchip: fixes PHY reset for Lunzn Fastrhino R68S arm64: dts: rockchip: disable display subsystem for Lunzn Fastrhino R6xS arm64: dts: rockchip: remove unused usb2 nodes for Lunzn Fastrhino R6xS arm64: dts: rockchip: fix pmu_io supply for Lunzn Fastrhino R6xS arm64: dts: rockchip: fix usb regulator for Lunzn Fastrhino R6xS arm64: dts: rockchip: fix regulator name for Lunzn Fastrhino R6xS arm64: dts: rockchip: Add dma-names to uart1 on quartz64-b arm64: dts: rockchip: Update GPU OPP voltages in RK356x SoC dtsi arm64: dts: rockchip: Add GPU OPP voltage ranges to RK356x SoC dtsi arm64: dts: rockchip: Drop ethernet-phy-ieee802.3-c22 from PHY compatible string on all RK3588 boards arm64: dts: rockchip: Add missing power-domains for rk356x vop_mmu Link: https://lore.kernel.org/r/1998182.CrzyxZ31qj@diego Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 parents 31f6b5a + 31390eb commit 6355edb

14 files changed

+1227
-52
lines changed

‎Documentation/devicetree/bindings/arm/rockchip.yaml

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Original file line numberDiff line numberDiff line change
@@ -816,6 +816,11 @@ properties:
816816
- const: radxa,rock-3c
817817
- const: rockchip,rk3566
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819+
- description: Radxa ROCK 5 ITX
820+
items:
821+
- const: radxa,rock-5-itx
822+
- const: rockchip,rk3588
823+
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- description: Radxa ROCK 5A
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items:
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- const: radxa,rock-5a

‎arch/arm64/boot/dts/rockchip/Makefile

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Original file line numberDiff line numberDiff line change
@@ -128,6 +128,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-nanopc-t6.dtb
128128
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-ok3588-c.dtb
129129
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-orangepi-5-plus.dtb
130130
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-quartzpro64.dtb
131+
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5-itx.dtb
131132
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b.dtb
132133
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b-pcie-ep.dtbo
133134
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b-pcie-srns.dtbo

‎arch/arm64/boot/dts/rockchip/rk3328-rock64.dts

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@@ -154,6 +154,8 @@
154154
};
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156156
&hdmi {
157+
avdd-0v9-supply = <&vdd_10>;
158+
avdd-1v8-supply = <&vcc_18>;
157159
status = "okay";
158160
};
159161

‎arch/arm64/boot/dts/rockchip/rk3566-pinenote.dtsi

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@@ -674,6 +674,7 @@
674674
};
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676676
&uart1 {
677+
dma-names = "tx", "rx";
677678
pinctrl-0 = <&uart1m0_ctsn>, <&uart1m0_rtsn>, <&uart1m0_xfer>;
678679
pinctrl-names = "default";
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uart-has-rtscts;

‎arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts

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@@ -738,6 +738,7 @@
738738
};
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740740
&uart1 {
741+
dma-names = "tx", "rx";
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pinctrl-names = "default";
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pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>;
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status = "okay";

‎arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts

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@@ -652,6 +652,7 @@
652652
};
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654654
&uart1 {
655+
dma-names = "tx", "rx";
655656
pinctrl-names = "default";
656657
pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>;
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status = "okay";

‎arch/arm64/boot/dts/rockchip/rk3566-soquartz.dtsi

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@@ -614,6 +614,7 @@
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};
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616616
&uart1 {
617+
dma-names = "tx", "rx";
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pinctrl-names = "default";
618619
pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>;
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uart-has-rtscts;

‎arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dts

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Original file line numberDiff line numberDiff line change
@@ -11,6 +11,10 @@
1111
};
1212
};
1313

14+
&pmu_io_domains {
15+
vccio3-supply = <&vccio_sd>;
16+
};
17+
1418
&sdmmc0 {
1519
bus-width = <4>;
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cap-mmc-highspeed;

‎arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dtsi

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Original file line numberDiff line numberDiff line change
@@ -39,9 +39,9 @@
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};
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};
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42-
dc_12v: dc-12v-regulator {
42+
vcc12v_dcin: vcc12v-dcin-regulator {
4343
compatible = "regulator-fixed";
44-
regulator-name = "dc_12v";
44+
regulator-name = "vcc12v_dcin";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <12000000>;
@@ -65,7 +65,7 @@
6565
regulator-boot-on;
6666
regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
68-
vin-supply = <&dc_12v>;
68+
vin-supply = <&vcc12v_dcin>;
6969
};
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7171
vcc5v0_sys: vcc5v0-sys-regulator {
@@ -75,16 +75,7 @@
7575
regulator-boot-on;
7676
regulator-min-microvolt = <5000000>;
7777
regulator-max-microvolt = <5000000>;
78-
vin-supply = <&dc_12v>;
79-
};
80-
81-
vcc5v0_usb_host: vcc5v0-usb-host-regulator {
82-
compatible = "regulator-fixed";
83-
regulator-name = "vcc5v0_usb_host";
84-
regulator-always-on;
85-
regulator-boot-on;
86-
regulator-min-microvolt = <5000000>;
87-
regulator-max-microvolt = <5000000>;
78+
vin-supply = <&vcc12v_dcin>;
8879
};
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9081
vcc5v0_usb_otg: vcc5v0-usb-otg-regulator {
@@ -94,8 +85,9 @@
9485
pinctrl-names = "default";
9586
pinctrl-0 = <&vcc5v0_usb_otg_en>;
9687
regulator-name = "vcc5v0_usb_otg";
97-
regulator-always-on;
98-
regulator-boot-on;
88+
regulator-min-microvolt = <5000000>;
89+
regulator-max-microvolt = <5000000>;
90+
vin-supply = <&vcc5v0_sys>;
9991
};
10092
};
10193

@@ -123,6 +115,10 @@
123115
cpu-supply = <&vdd_cpu>;
124116
};
125117

118+
&display_subsystem {
119+
status = "disabled";
120+
};
121+
126122
&gpu {
127123
mali-supply = <&vdd_gpu>;
128124
status = "okay";
@@ -405,8 +401,8 @@
405401
&pmu_io_domains {
406402
pmuio1-supply = <&vcc3v3_pmu>;
407403
pmuio2-supply = <&vcc3v3_pmu>;
408-
vccio1-supply = <&vccio_acodec>;
409-
vccio3-supply = <&vccio_sd>;
404+
vccio1-supply = <&vcc_3v3>;
405+
vccio2-supply = <&vcc_1v8>;
410406
vccio4-supply = <&vcc_1v8>;
411407
vccio5-supply = <&vcc_3v3>;
412408
vccio6-supply = <&vcc_1v8>;
@@ -429,28 +425,12 @@
429425
status = "okay";
430426
};
431427

432-
&usb_host0_ehci {
433-
status = "okay";
434-
};
435-
436-
&usb_host0_ohci {
437-
status = "okay";
438-
};
439-
440428
&usb_host0_xhci {
441429
dr_mode = "host";
442430
extcon = <&usb2phy0>;
443431
status = "okay";
444432
};
445433

446-
&usb_host1_ehci {
447-
status = "okay";
448-
};
449-
450-
&usb_host1_ohci {
451-
status = "okay";
452-
};
453-
454434
&usb_host1_xhci {
455435
status = "okay";
456436
};
@@ -460,7 +440,7 @@
460440
};
461441

462442
&usb2phy0_host {
463-
phy-supply = <&vcc5v0_usb_host>;
443+
phy-supply = <&vcc5v0_sys>;
464444
status = "okay";
465445
};
466446

‎arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r68s.dts

Lines changed: 10 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -39,7 +39,7 @@
3939
&gmac0_rx_bus2
4040
&gmac0_rgmii_clk
4141
&gmac0_rgmii_bus>;
42-
snps,reset-gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_LOW>;
42+
snps,reset-gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>;
4343
snps,reset-active-low;
4444
/* Reset time is 15ms, 50ms for rtl8211f */
4545
snps,reset-delays-us = <0 15000 50000>;
@@ -61,7 +61,7 @@
6161
&gmac1m1_rx_bus2
6262
&gmac1m1_rgmii_clk
6363
&gmac1m1_rgmii_bus>;
64-
snps,reset-gpio = <&gpio0 RK_PB1 GPIO_ACTIVE_LOW>;
64+
snps,reset-gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_LOW>;
6565
snps,reset-active-low;
6666
/* Reset time is 15ms, 50ms for rtl8211f */
6767
snps,reset-delays-us = <0 15000 50000>;
@@ -71,18 +71,18 @@
7171
};
7272

7373
&mdio0 {
74-
rgmii_phy0: ethernet-phy@0 {
74+
rgmii_phy0: ethernet-phy@1 {
7575
compatible = "ethernet-phy-ieee802.3-c22";
76-
reg = <0>;
76+
reg = <0x1>;
7777
pinctrl-0 = <&eth_phy0_reset_pin>;
7878
pinctrl-names = "default";
7979
};
8080
};
8181

8282
&mdio1 {
83-
rgmii_phy1: ethernet-phy@0 {
83+
rgmii_phy1: ethernet-phy@1 {
8484
compatible = "ethernet-phy-ieee802.3-c22";
85-
reg = <0>;
85+
reg = <0x1>;
8686
pinctrl-0 = <&eth_phy1_reset_pin>;
8787
pinctrl-names = "default";
8888
};
@@ -102,6 +102,10 @@
102102
};
103103
};
104104

105+
&pmu_io_domains {
106+
vccio3-supply = <&vcc_3v3>;
107+
};
108+
105109
&sdhci {
106110
bus-width = <8>;
107111
max-frequency = <200000000>;

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