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scripts/adi_sim.tcl: Updated scripts
- Changed the interconnect cascading option to automatically cascade in testbenches Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
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scripts/adi_sim.tcl

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@@ -30,7 +30,11 @@ proc adi_sim_project_xilinx {project_name {part "xc7vx485tffg1157-1"}} {
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create_bd_design $design_name
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global sys_zynq
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global sys_cpu_interconnect_cascade
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set sys_zynq -1
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set sys_cpu_interconnect_cascade 1
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if { ![info exists ad_project_params(CUSTOM_HARNESS)] || !$ad_project_params(CUSTOM_HARNESS) } {
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source ../common/test_harness/test_harness_system_bd.tcl
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}

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