iio: adc: ad7944: revert ADI tree changed

Revert all ADI tree changes to the ad7944 driver compared to the
mainline kernel as of commit 6020ca4 ("iio: adc: ad7944: use
spi_optimize_message()").

This will allow us to cherry-pick mainline changes on top of the driver
to be able to use the mainline version of SPI offload support.

Signed-off-by: David Lechner <dlechner@baylibre.com>

Author: dlech

drivers/iio/adc/ad7944.c

@@ -14,36 +14,22 @@
 #include <linux/gpio/consumer.h>
 #include <linux/module.h>
 #include <linux/property.h>
-#include <linux/pwm.h>
 #include <linux/regulator/consumer.h>
-#include <linux/spi/spi-engine-ex.h>
 #include <linux/spi/spi.h>
 #include <linux/string_helpers.h>
 
 #include <linux/iio/iio.h>
 #include <linux/iio/sysfs.h>
-#include <linux/iio/buffer-dmaengine.h>
 #include <linux/iio/trigger_consumer.h>
 #include <linux/iio/triggered_buffer.h>
 
-/*
- * Older SPI Engine HDL versions have a bug where the offload is level triggered
- * instead of edge triggered, so we use a small duty cycle to allow sampling
- * at lower rates without spurious triggers.
- */
-#define AD7944_PWM_TRIGGER_DUTY_CYCLE_NS	20
-#define AD7944_DEFAULT_SAMPLE_FREQ_HZ		10000 /* arbitrary */
 #define AD7944_INTERNAL_REF_MV		4096
 
 struct ad7944_timing_spec {
 	/* Normal mode max conversion time (t_{CONV}). */
 	unsigned int conv_ns;
 	/* TURBO mode max conversion time (t_{CONV}). */
 	unsigned int turbo_conv_ns;
-	/* Normal mode data read during conversion time (t_{DATA}). */
-	unsigned int data_ns;
-	/* TURBO mode data read during conversion time (t_{DATA}). */
-	unsigned int turbo_data_ns;
 };
 
 enum ad7944_spi_mode {
@@ -67,8 +53,6 @@ struct ad7944_adc {
 	enum ad7944_spi_mode spi_mode;
 	struct spi_transfer xfers[3];
 	struct spi_message msg;
-	struct spi_transfer turbo_xfers[3];
-	struct spi_message turbo_msg;
 	/* Chip-specific timing specifications. */
 	const struct ad7944_timing_spec *timing_spec;
 	/* GPIO connected to CNV pin. */
@@ -79,8 +63,6 @@ struct ad7944_adc {
 	bool always_turbo;
 	/* Reference voltage (millivolts). */
 	unsigned int ref_mv;
-	/* SPI offload trigger. */
-	struct pwm_device *pwm;
 
 	/*
 	 * DMA (thus cache coherency maintenance) requires the
@@ -95,32 +77,23 @@ struct ad7944_adc {
 	 } sample __aligned(IIO_DMA_MINALIGN);
 };
 
-/* minimum CNV high time */
-#define T_CNVH_NS	10
-/* CS low to data valid time */
-#define T_EN_NS		5
 /* quite time before CNV rising edge */
 #define T_QUIET_NS	20
 
 static const struct ad7944_timing_spec ad7944_timing_spec = {
 	.conv_ns = 420,
 	.turbo_conv_ns = 320,
-	.data_ns = 290,
-	.turbo_data_ns = 190,
 };
 
 static const struct ad7944_timing_spec ad7986_timing_spec = {
 	.conv_ns = 500,
 	.turbo_conv_ns = 400,
-	.data_ns = 300,
-	.turbo_data_ns = 200,
 };
 
 struct ad7944_chip_info {
 	const char *name;
 	const struct ad7944_timing_spec *timing_spec;
 	const struct iio_chan_spec channels[2];
-	const struct iio_chan_spec offload_channels[1];
 };
 
 /*
@@ -151,23 +124,6 @@ static const struct ad7944_chip_info _name##_chip_info = {		\
 		},							\
 		IIO_CHAN_SOFT_TIMESTAMP(1),				\
 	},								\
-	.offload_channels = {						\
-		{							\
-			.type = IIO_VOLTAGE,				\
-			.indexed = 1,					\
-			.differential = _diff,				\
-			.channel = 0,					\
-			.channel2 = _diff ? 1 : 0,			\
-			.scan_index = 0,				\
-			.scan_type.sign = _diff ? 's' : 'u',		\
-			.scan_type.realbits = _bits,			\
-			.scan_type.storagebits = 32,			\
-			.scan_type.endianness = IIO_CPU,		\
-			.info_mask_separate = BIT(IIO_CHAN_INFO_RAW)	\
-					| BIT(IIO_CHAN_INFO_SCALE)	\
-					| BIT(IIO_CHAN_INFO_SAMP_FREQ),	\
-		},							\
-	},								\
 }
 
 /* pseudo-differential with ground sense */
@@ -208,11 +164,11 @@ static int ad7944_3wire_cs_mode_init_msg(struct device *dev, struct ad7944_adc *
 	xfers[1].cs_off = 1;
 	xfers[1].delay.value = t_conv_ns;
 	xfers[1].delay.unit = SPI_DELAY_UNIT_NSECS;
-	xfers[0].bits_per_word = chan->scan_type.realbits;
+	xfers[1].bits_per_word = chan->scan_type.realbits;
 
 	/* Then we can read the data during the acquisition phase */
 	xfers[2].rx_buf = &adc->sample.raw;
-	xfers[2].len = chan->scan_type.realbits > 16 ? 4 : 2;
+	xfers[2].len = BITS_TO_BYTES(chan->scan_type.storagebits);
 	xfers[2].bits_per_word = chan->scan_type.realbits;
 
 	spi_message_init_with_transfers(&adc->msg, xfers, 3);
@@ -224,57 +180,6 @@ static int ad7944_3wire_cs_mode_init_msg(struct device *dev, struct ad7944_adc *
 	return devm_add_action_or_reset(dev, ad7944_unoptimize_msg, &adc->msg);
 }
 
-static int ad7944_3wire_cs_mode_init_turbo_msg(struct device *dev,
-					       struct ad7944_adc *adc,
-					       const struct iio_chan_spec *chan)
-{
-	struct spi_transfer *xfers = adc->turbo_xfers;
-	int ret;
-
-	/*
-	 * This sequence of xfers performs a read during conversion in 3-wire CS
-	 * mode with timings for when TURBO mode is enabled. Using this msg will
-	 * only work with SPI offloads since the timing needs to be precise to
-	 * actually be able to read during the conversion time.
-	 */
-
-	/* change CNV to high to trigger conversion */
-	xfers[0].cs_off = 1;
-	xfers[0].bits_per_word = chan->scan_type.realbits;
-	xfers[0].delay.value = T_CNVH_NS;
-	xfers[0].delay.unit = SPI_DELAY_UNIT_NSECS;
-
-	/* read sample data from previous conversion */
-	xfers[1].rx_buf = &adc->sample.raw;
-	xfers[1].len = chan->scan_type.realbits > 16 ? 4 : 2;
-	xfers[1].bits_per_word = chan->scan_type.realbits;
-	/*
-	 * CNV has to be high at end of conversion to avoid triggering the busy
-	 * signal on the SDO line.
-	 */
-	xfers[1].cs_change = 1;
-	/* t[CONV] - t[CNVH] - t[EN] - t[DATA] */
-	xfers[1].cs_change_delay.value = adc->timing_spec->turbo_conv_ns -
-					 T_CNVH_NS - T_EN_NS -
-					 adc->timing_spec->turbo_data_ns;
-	xfers[1].cs_change_delay.unit = SPI_DELAY_UNIT_NSECS;
-
-	/*
-	 * Since this is the last xfer, this changes CNV to low and keeps it
-	 * there until the next xfer.
-	 */
-	xfers[2].cs_change = 1;
-	xfers[2].bits_per_word = chan->scan_type.realbits;
-
-	spi_message_init_with_transfers(&adc->turbo_msg, xfers, 3);
-
-	ret = spi_optimize_message(adc->spi, &adc->turbo_msg);
-	if (ret)
-		return ret;
-
-	return devm_add_action_or_reset(dev, ad7944_unoptimize_msg, &adc->turbo_msg);
-}
-
 static int ad7944_4wire_mode_init_msg(struct device *dev, struct ad7944_adc *adc,
 				      const struct iio_chan_spec *chan)
 {
@@ -297,10 +202,10 @@ static int ad7944_4wire_mode_init_msg(struct device *dev, struct ad7944_adc *adc
 	xfers[0].delay.unit = SPI_DELAY_UNIT_NSECS;
 
 	xfers[1].rx_buf = &adc->sample.raw;
-	xfers[1].len = chan->scan_type.realbits > 16 ? 4 : 2;
+	xfers[1].len = BITS_TO_BYTES(chan->scan_type.storagebits);
 	xfers[1].bits_per_word = chan->scan_type.realbits;
 
-	spi_message_init_with_transfers(&adc->msg, xfers, 3);
+	spi_message_init_with_transfers(&adc->msg, xfers, 2);
 
 	ret = spi_optimize_message(adc->spi, &adc->msg);
 	if (ret)
@@ -374,7 +279,7 @@ static int ad7944_single_conversion(struct ad7944_adc *adc,
 		return -EOPNOTSUPP;
 	}
 
-	if (chan->scan_type.realbits > 16)
+	if (chan->scan_type.storagebits > 16)
 		*val = adc->sample.raw.u32;
 	else
 		*val = adc->sample.raw.u16;
@@ -417,110 +322,13 @@ static int ad7944_read_raw(struct iio_dev *indio_dev,
 			return -EINVAL;
 		}
 
-	case IIO_CHAN_INFO_SAMP_FREQ: {
-		/* TODO: get actual hw period */
-		u64 period_ns = pwm_get_period(adc->pwm);
-
-		*val = DIV_ROUND_UP_ULL(NSEC_PER_SEC, period_ns);
-		return IIO_VAL_INT;
-	}
-
-	default:
-		return -EINVAL;
-	}
-}
-
-static int ad7944_write_raw(struct iio_dev *indio_dev,
-			    const struct iio_chan_spec *chan,
-			    int val, int val2, long info)
-{
-	struct ad7944_adc *adc = iio_priv(indio_dev);
-
-	switch (info) {
-	case IIO_CHAN_INFO_SAMP_FREQ: {
-		struct pwm_state state;
-
-		if (val < 0)
-			return -EINVAL;
-
-		pwm_init_state(adc->pwm, &state);
-		state.period = DIV_ROUND_UP(NSEC_PER_SEC, val);
-		state.duty_cycle = AD7944_PWM_TRIGGER_DUTY_CYCLE_NS;
-		state.enabled = true;
-
-		return pwm_apply_state(adc->pwm, &state);
-	}
 	default:
 		return -EINVAL;
 	}
 }
 
-static int ad7944_write_raw_get_fmt(struct iio_dev *indio_dev,
-				    const struct iio_chan_spec *chan,
-				    long info)
-{
-	switch (info) {
-	case IIO_CHAN_INFO_SAMP_FREQ:
-		return IIO_VAL_INT;
-	default:
-		return IIO_VAL_INT_PLUS_MICRO;
-	}
-}
-
 static const struct iio_info ad7944_iio_info = {
 	.read_raw = &ad7944_read_raw,
-	.write_raw = &ad7944_write_raw,
-	.write_raw_get_fmt = &ad7944_write_raw_get_fmt,
-};
-
-static int ad7944_offload_ex_buffer_preenable(struct iio_dev *indio_dev)
-{
-	struct ad7944_adc *adc = iio_priv(indio_dev);
-
-	switch (adc->spi_mode) {
-	case AD7944_SPI_MODE_DEFAULT:
-		return spi_engine_ex_offload_load_msg(adc->spi, &adc->msg);
-	case AD7944_SPI_MODE_SINGLE:
-		/* REVISIT: could do non-turbo for lower sample rates */
-		gpiod_set_value_cansleep(adc->turbo, 1);
-		return spi_engine_ex_offload_load_msg(adc->spi, &adc->turbo_msg);
-	default:
-		return -EOPNOTSUPP;
-	}
-}
-
-static int ad7944_offload_ex_buffer_postenable(struct iio_dev *indio_dev)
-{
-	struct ad7944_adc *adc = iio_priv(indio_dev);
-
-	spi_engine_ex_offload_enable(adc->spi, true);
-
-	return 0;
-}
-
-static int ad7944_offload_ex_buffer_predisable(struct iio_dev *indio_dev)
-{
-	struct ad7944_adc *adc = iio_priv(indio_dev);
-
-	spi_engine_ex_offload_enable(adc->spi, false);
-
-	return 0;
-}
-
-static int ad7944_offload_ex_buffer_postdisable(struct iio_dev *indio_dev)
-{
-	struct ad7944_adc *adc = iio_priv(indio_dev);
-
-	gpiod_set_value_cansleep(adc->turbo, 0);
-
-	return 0;
-}
-
-static const struct iio_buffer_setup_ops ad7944_offload_ex_buffer_setup_ops = {
-	.preenable = &ad7944_offload_ex_buffer_preenable,
-	.postenable = &ad7944_offload_ex_buffer_postenable,
-	.predisable = &ad7944_offload_ex_buffer_predisable,
-	.postdisable = &ad7944_offload_ex_buffer_postdisable,
 };
 
 static irqreturn_t ad7944_trigger_handler(int irq, void *p)
@@ -705,10 +513,6 @@ static int ad7944_probe(struct spi_device *spi)
 		if (ret)
 			return ret;
 
-		ret = ad7944_3wire_cs_mode_init_turbo_msg(dev, adc, &chip_info->channels[0]);
-		if (ret)
-			return ret;
-
 		break;
 	case AD7944_SPI_MODE_CHAIN:
 		return dev_err_probe(dev, -EINVAL, "chain mode is not implemented\n");
@@ -717,42 +521,14 @@ static int ad7944_probe(struct spi_device *spi)
 	indio_dev->name = chip_info->name;
 	indio_dev->modes = INDIO_DIRECT_MODE;
 	indio_dev->info = &ad7944_iio_info;
+	indio_dev->channels = chip_info->channels;
+	indio_dev->num_channels = ARRAY_SIZE(chip_info->channels);
 
-	if (spi_engine_ex_offload_supported(spi)) {
-		struct pwm_state state = {
-			.period = NSEC_PER_SEC / AD7944_DEFAULT_SAMPLE_FREQ_HZ,
-			.duty_cycle = AD7944_PWM_TRIGGER_DUTY_CYCLE_NS,
-			.enabled = true,
-		};
-
-		indio_dev->channels = chip_info->offload_channels;
-		indio_dev->num_channels = ARRAY_SIZE(chip_info->offload_channels);
-		indio_dev->setup_ops = &ad7944_offload_ex_buffer_setup_ops;
-
-		adc->pwm = devm_pwm_get(dev, NULL);
-		if (IS_ERR(adc->pwm))
-			return dev_err_probe(dev, PTR_ERR(adc->pwm),
-					     "failed to get PWM\n");
-
-		ret = pwm_apply_state(adc->pwm, &state);
-		if (ret)
-			return dev_err_probe(dev, ret,
-					     "failed to apply PWM state\n");
-
-		ret = devm_iio_dmaengine_buffer_setup(dev, indio_dev, "rx");
-		if (ret)
-			return ret;
-	} else {
-		indio_dev->channels = chip_info->channels;
-		indio_dev->num_channels = ARRAY_SIZE(chip_info->channels);
-
-		ret = devm_iio_triggered_buffer_setup(dev, indio_dev,
-						      iio_pollfunc_store_time,
-						      ad7944_trigger_handler,
-						      NULL);
-		if (ret)
-			return ret;
-	}
+	ret = devm_iio_triggered_buffer_setup(dev, indio_dev,
+					      iio_pollfunc_store_time,
+					      ad7944_trigger_handler, NULL);
+	if (ret)
+		return ret;
 
 	return devm_iio_device_register(dev, indio_dev);
 }