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iio: adc: ad7768-1: Add multiple scan types to support 16-bits mode
When the device is configured to Sinc5 filter and decimation x8, output data is reduced to 16-bits in order to support 1 MHz of sampling frequency due to clock limitation. Using multiple scan types feature enables the driver to switch scan type in runtime, making possible to support both 24-bits and 16-bits resolution. Signed-off-by: Jonathan Santos <Jonathan.Santos@analog.com>
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drivers/iio/adc/ad7768-1.c

Lines changed: 48 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -143,6 +143,11 @@ enum ad7768_dec_rate {
143143
AD7768_DEC_RATE_1024 = 5
144144
};
145145

146+
enum ad7768_scan_type {
147+
AD7768_SCAN_TYPE_NORMAL,
148+
AD7768_SCAN_TYPE_HIGH_SPEED,
149+
};
150+
146151
struct ad7768_clk_configuration {
147152
enum ad7768_mclk_div mclk_div;
148153
enum ad7768_dec_rate dec_rate;
@@ -199,6 +204,19 @@ static const int sinc3_dec_rate_max_values[4] = {
199204
20480, 40960, 81920, 163840,
200205
};
201206

207+
static const struct iio_scan_type ad7768_scan_type[] = {
208+
[AD7768_SCAN_TYPE_NORMAL] = {
209+
.sign = 's',
210+
.realbits = 24,
211+
.storagebits = 32,
212+
},
213+
[AD7768_SCAN_TYPE_HIGH_SPEED] = {
214+
.sign = 's',
215+
.realbits = 16,
216+
.storagebits = 32,
217+
},
218+
};
219+
202220
static const char * const ad7768_filter_enum[] = {
203221
[SINC5] = "sinc5",
204222
[SINC5_DEC_X8] = "sinc5-dec8",
@@ -270,12 +288,9 @@ static const struct iio_chan_spec ad7768_channels[] = {
270288
.indexed = 1,
271289
.channel = 0,
272290
.scan_index = 0,
273-
.scan_type = {
274-
.sign = 's',
275-
.realbits = 24,
276-
.storagebits = 32,
277-
.shift = 8,
278-
},
291+
.has_ext_scan_type = 1,
292+
.ext_scan_type = ad7768_scan_type,
293+
.num_ext_scan_type = ARRAY_SIZE(ad7768_scan_type),
279294
},
280295
};
281296

@@ -424,6 +439,9 @@ static int ad7768_scan_direct(struct iio_dev *indio_dev)
424439
ret = ad7768_spi_reg_read(st, AD7768_REG_ADC_DATA, &readval, 3);
425440
if (ret < 0)
426441
return ret;
442+
443+
if (st->filter_mode == SINC5_DEC_X8)
444+
readval = readval >> 8;
427445
/*
428446
* Any SPI configuration of the AD7768-1 can only be
429447
* performed in continuous conversion mode.
@@ -825,6 +843,11 @@ static int ad7768_read_raw(struct iio_dev *indio_dev,
825843
{
826844
struct ad7768_state *st = iio_priv(indio_dev);
827845
int scale_uv, ret;
846+
const struct iio_scan_type *scan_type;
847+
848+
scan_type = iio_get_current_scan_type(indio_dev, chan);
849+
if (IS_ERR(scan_type))
850+
return PTR_ERR(scan_type);
828851

829852
switch (info) {
830853
case IIO_CHAN_INFO_RAW:
@@ -834,7 +857,7 @@ static int ad7768_read_raw(struct iio_dev *indio_dev,
834857

835858
ret = ad7768_scan_direct(indio_dev);
836859
if (ret >= 0)
837-
*val = sign_extend32(ret, chan->scan_type.realbits - 1);
860+
*val = sign_extend32(ret, scan_type->realbits - 1);
838861

839862
iio_device_release_direct_mode(indio_dev);
840863
if (ret < 0)
@@ -848,7 +871,7 @@ static int ad7768_read_raw(struct iio_dev *indio_dev,
848871
return scale_uv;
849872

850873
*val = (scale_uv * 2) / 1000;
851-
*val2 = chan->scan_type.realbits;
874+
*val2 = scan_type->realbits;
852875

853876
return IIO_VAL_FRACTIONAL_LOG2;
854877

@@ -892,11 +915,21 @@ static const struct attribute_group ad7768_group = {
892915
.attrs = ad7768_attributes,
893916
};
894917

918+
static int ad7768_get_current_scan_type(const struct iio_dev *indio_dev,
919+
const struct iio_chan_spec *chan)
920+
{
921+
struct ad7768_state *st = iio_priv(indio_dev);
922+
923+
return st->filter_mode == SINC5_DEC_X8 ? AD7768_SCAN_TYPE_HIGH_SPEED
924+
: AD7768_SCAN_TYPE_NORMAL;
925+
}
926+
895927
static const struct iio_info ad7768_info = {
896928
.attrs = &ad7768_group,
897929
.read_raw = &ad7768_read_raw,
898930
.write_raw = &ad7768_write_raw,
899931
.read_label = ad7768_read_label,
932+
.get_current_scan_type = &ad7768_get_current_scan_type,
900933
.debugfs_reg_access = &ad7768_reg_access,
901934
};
902935

@@ -1009,13 +1042,18 @@ static int ad7768_buffer_postenable(struct iio_dev *indio_dev)
10091042
struct ad7768_state *st = iio_priv(indio_dev);
10101043
struct spi_transfer xfer = {
10111044
.len = 1,
1012-
.bits_per_word = 32
10131045
};
10141046
unsigned int rx_data[2];
1015-
unsigned int tx_data[2];
10161047
struct spi_message msg;
1048+
const struct iio_scan_type *scan_type;
10171049
int ret;
10181050

1051+
scan_type = iio_get_current_scan_type(indio_dev, &indio_dev->channels[0]);
1052+
if (IS_ERR(scan_type))
1053+
return PTR_ERR(scan_type);
1054+
1055+
xfer.bits_per_word = scan_type->realbits;
1056+
10191057
/*
10201058
* Write a 1 to the LSB of the INTERFACE_FORMAT register to enter
10211059
* continuous read mode. Subsequent data reads do not require an
@@ -1028,8 +1066,6 @@ static int ad7768_buffer_postenable(struct iio_dev *indio_dev)
10281066
if (st->spi_is_dma_mapped) {
10291067
spi_bus_lock(st->spi->master);
10301068

1031-
tx_data[0] = AD7768_RD_FLAG_MSK(AD7768_REG_ADC_DATA) << 24;
1032-
xfer.tx_buf = tx_data;
10331069
xfer.rx_buf = rx_data;
10341070
spi_message_init_with_transfers(&msg, &xfer, 1);
10351071
ret = spi_engine_offload_load_msg(st->spi, &msg);

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