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arm: dts: Add dts for ad4030-24, ad4032-24, ad4630-16, adaq4216, adaq4220
Add device tree files for using AD4030-24, AD4032-24, AD4630-16, ADAQ4216, and ADAQ4220 on ZedBoard. Co-developed-by: Liviu Adace <liviu.adace@analog.com> Signed-off-by: Liviu Adace <liviu.adace@analog.com> Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com>
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‎arch/arm/boot/dts/zynq-zed-adv7511-ad4030-24.dts

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// SPDX-License-Identifier: GPL-2.0
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/*
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* Analog Devices AD4630-24
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*
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* hdl_project: <ad4630_fmc/zed>
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* board_revision: <B>
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*
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* Copyright (C) 2023 Analog Devices Inc.
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*/
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/dts-v1/;
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#include "zynq-zed.dtsi"
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#include "zynq-zed-adv7511.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pwm/pwm.h>
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/ {
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vref: regulator-vref {
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compatible = "regulator-fixed";
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regulator-name = "fixed-supply";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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};
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vdd_1_8: regulator-vdd-1-8 {
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compatible = "regulator-fixed";
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regulator-name = "fixed-supply";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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vio: regulator-vio {
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compatible = "regulator-fixed";
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regulator-name = "fixed-supply";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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clocks {
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cnv_ext_clk: ext-clk {
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#clock-cells = <0x0>;
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compatible = "fixed-clock";
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clock-frequency = <100000000>;
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clock-output-names = "cnv_ext_clk";
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};
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};
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};
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&fpga_axi {
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rx_dma: rx-dmac@44a30000 {
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compatible = "adi,axi-dmac-1.00.a";
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reg = <0x44a30000 0x1000>;
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#dma-cells = <1>;
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interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clkc 15>;
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adi,channels {
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#size-cells = <0>;
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#address-cells = <1>;
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dma-channel@0 {
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reg = <0>;
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adi,source-bus-width = <64>;
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adi,source-bus-type = <1>;
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adi,destination-bus-width = <64>;
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adi,destination-bus-type = <0>;
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};
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};
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};
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spi_clk: axi-clkgen@0x44a70000 {
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compatible = "adi,axi-clkgen-2.00.a";
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reg = <0x44a70000 0x10000>;
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#clock-cells = <0>;
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clocks = <&clkc 15>, <&clkc 15>;
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clock-names = "s_axi_aclk", "clkin1";
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clock-output-names = "spi_clk";
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};
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axi_pwm_gen: axi-pwm-gen@ {
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compatible = "adi,axi-pwmgen";
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reg = <0x44b00000 0x1000>;
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label = "ad463x_cnv";
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#pwm-cells = <2>;
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clocks = <&cnv_ext_clk>;
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};
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axi_spi_engine: spi@44a00000 {
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compatible = "adi-ex,axi-spi-engine-1.00.a";
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reg = <0x44a00000 0x1FF>;
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interrupt-parent = <&intc>;
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interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clkc 15>, <&spi_clk>;
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clock-names = "s_axi_aclk", "spi_clk";
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num-cs = <1>;
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#address-cells = <0x1>;
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#size-cells = <0x0>;
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ad4030: ad4030@0 {
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compatible = "adi,ad4030-24";
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reg = <0>;
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vdd-supply = <&vref>;
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vdd_1_8-supply = <&vdd_1_8>;
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vio-supply = <&vio>;
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vref-supply = <&vref>;
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spi-max-frequency = <80000000>;
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reset-gpios = <&gpio0 86 GPIO_ACTIVE_LOW>;
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adi,lane-mode = <0>;
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adi,clock-mode = <0>;
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adi,out-data-mode = <0>;
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adi,spi-trigger;
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clocks = <&cnv_ext_clk>;
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clock-names = "trigger_clock";
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dmas = <&rx_dma 0>;
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dma-names = "rx";
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pwm-names = "spi_trigger", "cnv";
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pwms = <&axi_pwm_gen 0 0>, <&axi_pwm_gen 1 0>;
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};
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};
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};

‎arch/arm/boot/dts/zynq-zed-adv7511-ad4032-24.dts

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// SPDX-License-Identifier: GPL-2.0
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/*
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* Analog Devices AD4630-24
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*
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* hdl_project: <ad4630_fmc/zed>
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* board_revision: <B>
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*
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* Copyright (C) 2023 Analog Devices Inc.
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*/
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/dts-v1/;
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#include "zynq-zed.dtsi"
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#include "zynq-zed-adv7511.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pwm/pwm.h>
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/ {
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vref: regulator-vref {
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compatible = "regulator-fixed";
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regulator-name = "fixed-supply";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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};
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vdd_1_8: regulator-vdd-1-8 {
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compatible = "regulator-fixed";
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regulator-name = "fixed-supply";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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vio: regulator-vio {
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compatible = "regulator-fixed";
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regulator-name = "fixed-supply";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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clocks {
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cnv_ext_clk: ext-clk {
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#clock-cells = <0x0>;
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compatible = "fixed-clock";
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clock-frequency = <100000000>;
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clock-output-names = "cnv_ext_clk";
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};
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};
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};
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&fpga_axi {
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rx_dma: rx-dmac@44a30000 {
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compatible = "adi,axi-dmac-1.00.a";
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reg = <0x44a30000 0x1000>;
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#dma-cells = <1>;
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interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clkc 15>;
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adi,channels {
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#size-cells = <0>;
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#address-cells = <1>;
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dma-channel@0 {
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reg = <0>;
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adi,source-bus-width = <64>;
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adi,source-bus-type = <1>;
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adi,destination-bus-width = <64>;
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adi,destination-bus-type = <0>;
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};
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};
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};
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spi_clk: axi-clkgen@0x44a70000 {
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compatible = "adi,axi-clkgen-2.00.a";
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reg = <0x44a70000 0x10000>;
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#clock-cells = <0>;
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clocks = <&clkc 15>, <&clkc 15>;
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clock-names = "s_axi_aclk", "clkin1";
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clock-output-names = "spi_clk";
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};
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axi_pwm_gen: axi-pwm-gen@ {
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compatible = "adi,axi-pwmgen";
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reg = <0x44b00000 0x1000>;
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label = "ad463x_cnv";
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#pwm-cells = <2>;
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clocks = <&cnv_ext_clk>;
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};
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axi_spi_engine: spi@44a00000 {
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compatible = "adi-ex,axi-spi-engine-1.00.a";
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reg = <0x44a00000 0x1FF>;
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interrupt-parent = <&intc>;
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interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clkc 15>, <&spi_clk>;
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clock-names = "s_axi_aclk", "spi_clk";
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num-cs = <1>;
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#address-cells = <0x1>;
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#size-cells = <0x0>;
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ad4032: ad4032@0 {
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compatible = "adi,ad4032-24";
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reg = <0>;
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vdd-supply = <&vref>;
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vdd_1_8-supply = <&vdd_1_8>;
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vio-supply = <&vio>;
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vref-supply = <&vref>;
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spi-max-frequency = <80000000>;
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reset-gpios = <&gpio0 86 GPIO_ACTIVE_LOW>;
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adi,lane-mode = <0>;
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adi,clock-mode = <0>;
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adi,out-data-mode = <0>;
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adi,spi-trigger;
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clocks = <&cnv_ext_clk>;
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clock-names = "trigger_clock";
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dmas = <&rx_dma 0>;
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dma-names = "rx";
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pwm-names = "spi_trigger", "cnv";
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pwms = <&axi_pwm_gen 0 0>, <&axi_pwm_gen 1 0>;
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};
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};
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};

‎arch/arm/boot/dts/zynq-zed-adv7511-ad4630-16.dts

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// SPDX-License-Identifier: GPL-2.0
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/*
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* Analog Devices AD4630-24
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*
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* hdl_project: <ad4630_fmc/zed>
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* board_revision: <B>
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*
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* Copyright (C) 2022 Analog Devices Inc.
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*/
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/dts-v1/;
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#include "zynq-zed.dtsi"
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#include "zynq-zed-adv7511.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pwm/pwm.h>
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/ {
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vref: regulator-vref {
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compatible = "regulator-fixed";
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regulator-name = "fixed-supply";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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};
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vdd_1_8: regulator-vdd-1-8 {
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compatible = "regulator-fixed";
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regulator-name = "fixed-supply";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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vio: regulator-vio {
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compatible = "regulator-fixed";
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regulator-name = "fixed-supply";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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clocks {
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cnv_ext_clk: ext-clk {
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#clock-cells = <0x0>;
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compatible = "fixed-clock";
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clock-frequency = <100000000>;
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clock-output-names = "cnv_ext_clk";
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};
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};
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};
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&fpga_axi {
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rx_dma: rx-dmac@44a30000 {
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compatible = "adi,axi-dmac-1.00.a";
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reg = <0x44a30000 0x1000>;
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#dma-cells = <1>;
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interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clkc 15>;
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adi,channels {
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#size-cells = <0>;
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#address-cells = <1>;
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dma-channel@0 {
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reg = <0>;
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adi,source-bus-width = <64>;
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adi,source-bus-type = <1>;
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adi,destination-bus-width = <64>;
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adi,destination-bus-type = <0>;
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};
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};
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};
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spi_clk: axi-clkgen@0x44a70000 {
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compatible = "adi,axi-clkgen-2.00.a";
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reg = <0x44a70000 0x10000>;
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#clock-cells = <0>;
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clocks = <&clkc 15>, <&clkc 15>;
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clock-names = "s_axi_aclk", "clkin1";
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clock-output-names = "spi_clk";
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};
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axi_pwm_gen: axi-pwm-gen@ {
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compatible = "adi,axi-pwmgen";
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reg = <0x44b00000 0x1000>;
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label = "ad463x_cnv";
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#pwm-cells = <2>;
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clocks = <&cnv_ext_clk>;
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};
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axi_spi_engine: spi@44a00000 {
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compatible = "adi-ex,axi-spi-engine-1.00.a";
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reg = <0x44a00000 0x1FF>;
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interrupt-parent = <&intc>;
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interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clkc 15>, <&spi_clk>;
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clock-names = "s_axi_aclk", "spi_clk";
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num-cs = <1>;
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#address-cells = <0x1>;
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#size-cells = <0x0>;
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ad4630: ad4630-16@0 {
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compatible = "adi,ad4630-16";
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reg = <0>;
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vdd-supply = <&vref>;
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vdd_1_8-supply = <&vdd_1_8>;
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vio-supply = <&vio>;
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vref-supply = <&vref>;
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spi-max-frequency = <80000000>;
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reset-gpios = <&gpio0 86 GPIO_ACTIVE_LOW>;
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adi,lane-mode = <0>;
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adi,clock-mode = <0>;
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adi,out-data-mode = <0>;
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adi,spi-trigger;
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clocks = <&cnv_ext_clk>;
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clock-names = "trigger_clock";
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dmas = <&rx_dma 0>;
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dma-names = "rx";
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pwm-names = "spi_trigger", "cnv";
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pwms = <&axi_pwm_gen 0 0>, <&axi_pwm_gen 1 0>;
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};
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};
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};

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