|
| 1 | +.. SPDX-License-Identifier: GPL-2.0-only |
| 2 | +
|
| 3 | +============= |
| 4 | +AD4052 driver |
| 5 | +============= |
| 6 | + |
| 7 | +ADC driver for Analog Devices Inc. AD4052 and similar devices. |
| 8 | +The module name is ``ad4052``. |
| 9 | + |
| 10 | +Supported devices |
| 11 | +================= |
| 12 | + |
| 13 | +The following chips are supported by this driver: |
| 14 | + |
| 15 | +* `AD4050 <https://www.analog.com/AD4050>`_ |
| 16 | +* `AD4052 <https://www.analog.com/AD4052>`_ |
| 17 | +* `AD4056 <https://www.analog.com/AD4056>`_ |
| 18 | +* `AD4058 <https://www.analog.com/AD4058>`_ |
| 19 | + |
| 20 | +Wiring modes |
| 21 | +============ |
| 22 | + |
| 23 | +The ADC uses SPI 4-wire mode, and contain two programmable GPIOs and |
| 24 | +a CNV pin. |
| 25 | + |
| 26 | +The CNV pin is exposed as the ``cnv-gpios`` and triggers a ADC conversion. |
| 27 | +GP1 is ADC conversion ready signal and GP0 Threshold event interrupt, both |
| 28 | +exposed as interrupts. |
| 29 | + |
| 30 | +Omit ``cnv-gpios`` and tie CNV and CS together to use the rising edge |
| 31 | +of the CS as the CNV signal. |
| 32 | + |
| 33 | +Device attributes |
| 34 | +================= |
| 35 | + |
| 36 | +The ADC contain only one channels, and the following attributes: |
| 37 | + |
| 38 | +.. list-table:: Driver attributes |
| 39 | + :header-rows: 1 |
| 40 | + |
| 41 | + * - Attribute |
| 42 | + - Description |
| 43 | + * - ``in_voltage0_raw`` |
| 44 | + - Raw ADC voltage value |
| 45 | + * - ``in_voltage0_oversampling_ratio`` |
| 46 | + - Enable the device's burst averaging mode to over sample using |
| 47 | + the internal sample rate. |
| 48 | + * - ``in_voltage0_oversampling_ratio_available`` |
| 49 | + - List of available oversampling values. Value 0 disable the burst |
| 50 | + averaging mode. |
| 51 | + * - ``sample_rate`` |
| 52 | + - Device internal sample rate used in the burst averaging mode. |
| 53 | + * - ``sample_rate_available`` |
| 54 | + - List of available sample rates. |
| 55 | + |
| 56 | +Threshold events |
| 57 | +================ |
| 58 | + |
| 59 | +The ADC supports a monitoring mode to raise threshold events. |
| 60 | +The driver supports a single interrupt for both rising and falling |
| 61 | +readings. |
| 62 | + |
| 63 | +The feature is enabled/disabled by setting ``thresh_either_en``. |
| 64 | +During monitor mode, the device continuously operate in autonomous mode until |
| 65 | +put back in configuration mode, due to this, the device returns busy until the |
| 66 | +feature is disabled. |
| 67 | + |
| 68 | +Low-power mode |
| 69 | +============== |
| 70 | + |
| 71 | +The device enters low-power mode on idle to save power. |
| 72 | +Enabling an event puts the device out of the low-power since the ADC |
| 73 | +autonomously samples to assert the event condition. |
| 74 | + |
| 75 | +SPI offload support |
| 76 | +=================== |
| 77 | + |
| 78 | +To be able to achieve the maximum sample rate, the driver can be used with the |
| 79 | +`AXI SPI Engine`_ to provide SPI offload support. |
| 80 | + |
| 81 | +.. _AXI SPI Engine: http://analogdevicesinc.github.io/hdl/projects/ad4052_ardz/index.html |
| 82 | + |
| 83 | +When SPI offload is being used, additional attributes are present: |
| 84 | + |
| 85 | +.. list-table:: Additional attributes |
| 86 | + :header-rows: 1 |
| 87 | + |
| 88 | + * - Attribute |
| 89 | + - Description |
| 90 | + * - ``in_voltage0_sampling_frequency`` |
| 91 | + - Set the sampling frequency. |
| 92 | + * - ``in_voltage0_sampling_frequency_available`` |
| 93 | + - Get the sampling frequency range. |
| 94 | + |
| 95 | +The scan type is different when the buffer with offload support is enabled. |
0 commit comments