iio: adc: ltc2387: Specify PWM parameters in nanoseconds

With the reference clock running at less than 1 GHz two different
settings for the used PWM differ by more than 1 ns. So there is no
advantage to differ from the upstream pwm subsystem and give the
illusion of pico second resolution.

With the goal to drop support for time_unit, don't explicitly set
.time_unit = PWM_UNIT_NSEC but rely on this being the default.

Also improve precision in the period calculation by not multiplying the
result of two divisions but a single (reduced) division. Also given the
new types of divisor and divident, use the cheaper DIV_ROUND_CLOSEST()
division instead of DIV_ROUND_CLOSEST_ULL().

The error introduced by using nanoseconds instead of picoseconds isn't
zero in corner cases, but with ref_clk_rate < 500 MHz doesn't increase
the order of the error.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com>

Author: ukleinek

drivers/iio/adc/ltc2387.c

@@ -153,18 +153,15 @@ struct ltc2387_dev {
 
 static int ltc2387_set_sampling_freq(struct ltc2387_dev *ltc, int freq)
 {
-	unsigned long long target, ref_clk_period_ps;
+	unsigned long long ref_clk_period_ns;
 	struct pwm_state clk_en_state, cnv_state;
 	int ret, clk_en_time;
 
-	target = DIV_ROUND_CLOSEST_ULL(ltc->ref_clk_rate, freq);
-	ref_clk_period_ps = DIV_ROUND_CLOSEST_ULL(1000000000000ULL,
-						  ltc->ref_clk_rate);
+	ref_clk_period_ns = DIV_ROUND_CLOSEST(NSEC_PER_SEC, ltc->ref_clk_rate);
 
 	cnv_state = (struct pwm_state) {
-		.period = ref_clk_period_ps * target,
-		.duty_cycle = ref_clk_period_ps,
-		.time_unit = PWM_UNIT_PSEC,
+		.period = DIV_ROUND_CLOSEST(NSEC_PER_SEC, freq),
+		.duty_cycle = ref_clk_period_ns,
 		.enabled = true,
 	};
 
@@ -180,17 +177,16 @@ static int ltc2387_set_sampling_freq(struct ltc2387_dev *ltc, int freq)
 
 	clk_en_state = (struct pwm_state) {
 		.period = cnv_state.period,
-		.duty_cycle = ref_clk_period_ps * clk_en_time,
-		.phase = cnv_state.phase + LTC2387_T_FIRSTCLK_NS * PSEC_PER_NSEC,
-		.time_unit = PWM_UNIT_PSEC,
+		.duty_cycle = ref_clk_period_ns * clk_en_time,
+		.phase = LTC2387_T_FIRSTCLK_NS,
 		.enabled = true,
 	};
 
 	ret = pwm_apply_state(ltc->clk_en, &clk_en_state);
 	if (ret < 0)
 		return ret;
 
-	ltc->sampling_freq = DIV_ROUND_CLOSEST_ULL(ltc->ref_clk_rate, target);
+	ltc->sampling_freq = freq;
 
 	return 0;
 }