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nunojsadbogdan
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iio: adc: adrv9002: Update API to 68.14.13
The SDK is taken as is which means that compilation will likely fail. The folloing changes were squashed in the new SDK (need to be sent to the BU): * 9d9cde6 ("iio: adc: adrv9002: radio: turn radio functions private") * 67b6d36 ("iio: adc: adrv9002: radio: fix pin mode") Signed-off-by: Nuno Sá <nuno.sa@analog.com>
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6 files changed

+142
-185
lines changed

6 files changed

+142
-185
lines changed

drivers/iio/adc/navassa/devices/adrv9001/private/src/adrv9001_arm.c

Lines changed: 33 additions & 38 deletions
Original file line numberDiff line numberDiff line change
@@ -37,11 +37,7 @@
3737
#include "adrv9001_bf.h"
3838
#include "adi_adrv9001_hal.h"
3939
#ifdef __KERNEL__
40-
#include <linux/cleanup.h>
41-
#include <linux/mutex.h>
4240
#include <linux/string.h>
43-
44-
static DEFINE_MUTEX(dma_wr_lock);
4541
#endif
4642

4743
/* Header files related to libraries */
@@ -107,8 +103,8 @@ const char* const adrv9001_error_table_CmdCtrlMboxCmdError[] =
107103
"Command error"
108104
};
109105

110-
const char* const adrv9001_error_table_CmdError[] =
111-
{
106+
const char* const adrv9001_error_table_CmdError[] =
107+
{
112108
"Error occurred during an Init Calibration. Check that no signal is being applied to the Rx ports. Check that "
113109
"correct external LOs are applied, and synchronized, where appropriate",
114110
"Error occurred during a Tracking Calibration. Disable tracking calibrations, reset and program. If enabled "
@@ -257,7 +253,7 @@ static __maybe_unused int32_t adrv9001_DmaMemReadByte(adi_adrv9001_Device_t *dev
257253
}
258254

259255
regRead |= ADRV9001_DMA_CTL_LEGACY_MODE;
260-
256+
261257
/* bus size, 2'b00=byte; 2'b01=half-word; 2'b10=full-word; 2'b11=invalid */
262258
/* core_bf.bus_size.write(bf_status, 2'b10); */
263259
regRead |= ADRV9001_BF_ENCODE(0, ADRV9001_DMA_CTL_BUS_SIZE_MASK, ADRV9001_DMA_CTL_BUS_SIZE_SHIFT);
@@ -329,7 +325,7 @@ static __maybe_unused int32_t adrv9001_DmaMemReadByte(adi_adrv9001_Device_t *dev
329325
returnData[i + 1] = dataRead0;
330326
ADRV9001_SPIREADBYTEDMA(device, "ARM_DMA_DATA_2", ADRV9001_ADDR_ARM_DMA_DATA2, &dataRead0);
331327
returnData[i + 2] = dataRead0;
332-
328+
333329
/* 'single_instruction' has to be cleared before reading DMA_DATA3 and set back after */
334330
ADI_EXPECT(adrv9001_NvsRegmapCore_SingleInstruction_Set, device, 0x0);
335331
ADRV9001_SPIREADBYTEDMA(device, "ARM_DMA_DATA_3", ADRV9001_ADDR_ARM_DMA_DATA3, &dataRead0);
@@ -1046,7 +1042,7 @@ static void adrv9001_LoadSsiConfig(adi_adrv9001_Device_t *device, uint32_t *offs
10461042
cfgData[tempOffset++] = (uint8_t)ssiConfig->cmosClkInversionEn;
10471043

10481044
cfgData[tempOffset++] = (uint8_t)ssiConfig->ddrEn;
1049-
1045+
10501046
cfgData[tempOffset++] = (uint8_t)ssiConfig->rxMaskStrobeEn;
10511047

10521048
/* 4 bytes of padding is needed for alignment */
@@ -1567,15 +1563,15 @@ typedef struct
15671563
duplexMode_e duplexMode;
15681564
uint8_t fhModeOn;
15691565
uint8_t reserved1[1u]; //< Reserved for future feature
1570-
uint8_t numDynamicProfile; // Number of Profile. =1 means only one profile and no switching
1566+
uint8_t numDynamicProfile; // Number of Profile. =1 means only one profile and no switching
15711567
mcsMode_e mcsMode; // MCS mode selection: 0 - Disable, 1 - MCS Only, 2 - MCS + RFPLL phase sync
1572-
adcType_e adcTypeMonitor; // ADC type used in Monitor Mode
1573-
uint16_t pllLockTime_us; // Required lock time in microseconds for PLLs, based on ref_clk and loop bandwidth
1574-
pllModulus_t pllModuli; // PLL moduli
1575-
uint16_t pllPhaseSyncWait_us; // Worst case phase sync wait time in FH
1576-
mcsInf_e mcsInterfaceType; // 0-Disabled, 1-CMOS, 2-LVDS
1577-
uint8_t warmBootEnable; // Enable WarmBoot - Load initCal cefficients instead of running initCals
1578-
uint32_t reserved[1u]; // Reserved for future feature
1568+
adcType_e adcTypeMonitor; // ADC type used in Monitor Mode
1569+
uint16_t pllLockTime_us; // Required lock time in microseconds for PLLs, based on ref_clk and loop bandwidth
1570+
pllModulus_t pllModuli; // PLL moduli
1571+
uint16_t pllPhaseSyncWait_us; // Worst case phase sync wait time in FH
1572+
mcsInf_e mcsInterfaceType; // 0-Disabled, 1-CMOS, 2-LVDS
1573+
uint8_t warmBootEnable; // Enable WarmBoot - Load initCal cefficients instead of running initCals
1574+
uint32_t reserved[1u]; // Reserved for future feature
15791575
} deviceSysConfig_t;
15801576
*/
15811577
static void adrv9001_DeviceSysConfigWrite(adi_adrv9001_Device_t *device, const adi_adrv9001_DeviceSysConfig_t *sysConfig, uint8_t cfgData[], uint32_t *offset)
@@ -1613,13 +1609,13 @@ static void adrv9001_DeviceSysConfigWrite(adi_adrv9001_Device_t *device, const a
16131609
{
16141610
adrv9001_LoadFourBytes(&tempOffset, cfgData, sysConfig->pllModulus.dmModulus[i]);
16151611
}
1616-
1612+
16171613
/* PLL phase sync wait time in us */
16181614
adrv9001_LoadTwoBytes(&tempOffset, cfgData, sysConfig->pllPhaseSyncWait_us);
16191615

16201616
cfgData[tempOffset++] = sysConfig->mcsInterfaceType;
16211617
cfgData[tempOffset++] = sysConfig->warmBootEnable;
1622-
1618+
16231619
/* 4 bytes padding; Reserved for future use */
16241620
tempOffset += 4;
16251621

@@ -1998,7 +1994,7 @@ int32_t adrv9001_DmaMemWrite(adi_adrv9001_Device_t *device, uint32_t address, co
19981994
int32_t recoveryAction = ADI_COMMON_ACT_NO_ACTION;
19991995
uint8_t singleInstruction = 0;
20001996
uint8_t spiMode = 0;
2001-
1997+
20021998
ADI_ENTRY_PTR_ARRAY_EXPECT(device, data, byteCount);
20031999

20042000
ADRV9001_DMAINFO("ARM_MEM_WRITE", armMemAddress, byteCount);
@@ -2019,7 +2015,7 @@ int32_t adrv9001_DmaMemWrite(adi_adrv9001_Device_t *device, uint32_t address, co
20192015
/* If Address is not on word boundary, Or ByteCount is not on Word boundary */
20202016
if (((armMemAddress & 0x00000003) > 0) || ((byteCount & 0x00000003) > 0))
20212017
{
2022-
if ((ADI_ADRV9001_ARM_SINGLE_SPI_WRITE_MODE_STANDARD_BYTES_252 == spiWriteMode) ||
2018+
if ((ADI_ADRV9001_ARM_SINGLE_SPI_WRITE_MODE_STANDARD_BYTES_252 == spiWriteMode) ||
20232019
(ADI_ADRV9001_ARM_SINGLE_SPI_WRITE_MODE_STREAMING_BYTES_4 == spiWriteMode))
20242020
{
20252021
ADI_ERROR_REPORT(&device->common,
@@ -2063,7 +2059,7 @@ int32_t adrv9001_DmaMemWrite(adi_adrv9001_Device_t *device, uint32_t address, co
20632059

20642060
/* setting up the DMA control register for a write */
20652061
ADRV9001_SPIWRITEBYTEDMA(device, "ARM_DMA_CTL", ADRV9001_ADDR_ARM_DMA_CTL, regWrite);
2066-
2062+
20672063
/* Enable single instruction and disable SPI streaming mode by default.
20682064
* If ADRV9001 SPI streming mode is selected, then single instruction and single instruction are disbled */
20692065
ADI_EXPECT(adrv9001_NvsRegmapCore_SingleInstruction_Set, device, 0x1);
@@ -2198,15 +2194,14 @@ int32_t adrv9001_DmaMemWriteFH(adi_adrv9001_Device_t *device, adi_adrv9001_FhHop
21982194
static uint8_t addrLsbArray[ADI_ADRV9001_FREQ_HOPPING_MAX_NUM_BYTES];
21992195
static uint8_t dataArray[ADI_ADRV9001_FREQ_HOPPING_MAX_NUM_BYTES];
22002196

2201-
guard(mutex)(&dma_wr_lock);
22022197
memset(addrMsbArray, 0, sizeof(addrMsbArray));
22032198
memset(addrLsbArray, 0, sizeof(addrLsbArray));
22042199
memset(dataArray, 0, sizeof(dataArray));
22052200
#endif
22062201

22072202
ADI_ENTRY_PTR_ARRAY_EXPECT(device, numHopTableEntries, numHopTableEntriesByteCount);
22082203
ADI_ENTRY_PTR_ARRAY_EXPECT(device, hopTableBufferData, hopTableBufferDataByteCount);
2209-
2204+
22102205
/* Trigger appropriate SPI Interrupt upon table load */
22112206
if (hopSignal == ADI_ADRV9001_FH_HOP_SIGNAL_1)
22122207
{
@@ -2222,7 +2217,7 @@ int32_t adrv9001_DmaMemWriteFH(adi_adrv9001_Device_t *device, adi_adrv9001_FhHop
22222217
}
22232218

22242219
ADRV9001_DMAINFO("ARM_MEM_WRITE", armMemAddress, byteCount);
2225-
2220+
22262221
regWrite &= ~ADRV9001_DMA_CTL_RD_WRB;
22272222
regWrite |= ADRV9001_DMA_CTL_SYS_CODEB;
22282223
regWrite |= ADRV9001_BF_ENCODE(2, ADRV9001_DMA_CTL_BUS_SIZE_MASK, ADRV9001_DMA_CTL_BUS_SIZE_SHIFT);
@@ -2232,7 +2227,7 @@ int32_t adrv9001_DmaMemWriteFH(adi_adrv9001_Device_t *device, adi_adrv9001_FhHop
22322227
{
22332228
regWrite |= ADRV9001_DMA_CTL_AUTO_INCR;
22342229
}
2235-
2230+
22362231
/* setting up the DMA control register for a write */
22372232
addrMsbArray[addrIndex] = (uint8_t)(((ADRV9001_SPI_WRITE_POLARITY & 0x01) << 7) | ((ADRV9001_ADDR_ARM_DMA_CTL >> 8) & 0x7F));
22382233
addrLsbArray[addrIndex] = (uint8_t)ADRV9001_ADDR_ARM_DMA_CTL;
@@ -2272,7 +2267,7 @@ int32_t adrv9001_DmaMemWriteFH(adi_adrv9001_Device_t *device, adi_adrv9001_FhHop
22722267
dataArray[addrIndex] = numHopTableEntries[dataIndex];
22732268
addrIndex++;
22742269
}
2275-
2270+
22762271
addrMsbArray[addrIndex] = (uint8_t)(((ADRV9001_SPI_WRITE_POLARITY & 0x01) << 7) | ((ADRV9001_ADDR_ARM_DMA_ADDR3 >> 8) & 0x7F));
22772272
addrLsbArray[addrIndex] = (uint8_t)ADRV9001_ADDR_ARM_DMA_ADDR3;
22782273
dataArray[addrIndex] = (uint8_t)((hopTableBufferAddress) >> ADRV9001_ADDR_ARM_DMA_ADDR3_BYTE_SHIFT);
@@ -2426,7 +2421,7 @@ int32_t adrv9001_DmaMemRead(adi_adrv9001_Device_t *device, uint32_t address, uin
24262421
returnData[i + 2] = dataRead;
24272422
ADRV9001_SPIREADBYTEDMA(device, "ARM_DMA_DATA_1", ADRV9001_ADDR_ARM_DMA_DATA1, &dataRead);
24282423
returnData[i + 1] = dataRead;
2429-
2424+
24302425
/* 'single_instruction' has to be cleared before reading DMA_DATA3 and set back after */
24312426
ADI_EXPECT(adrv9001_NvsRegmapCore_SingleInstruction_Set, device, 0x0);
24322427
ADRV9001_SPIREADBYTEDMA(device, "ARM_DMA_DATA_0", ADRV9001_ADDR_ARM_DMA_DATA0, &dataRead);
@@ -2496,7 +2491,7 @@ int32_t adrv9001_FlexStreamProcessorMemWrite(adi_adrv9001_Device_t *device,
24962491
/* If Address is not on word boundary, Or ByteCount is not on Word boundary */
24972492
if (((flexSpAddress & 0x00000003) > 0) || ((byteCount & 0x00000003) > 0))
24982493
{
2499-
if ((ADI_ADRV9001_ARM_SINGLE_SPI_WRITE_MODE_STANDARD_BYTES_252 == spiWriteMode) ||
2494+
if ((ADI_ADRV9001_ARM_SINGLE_SPI_WRITE_MODE_STANDARD_BYTES_252 == spiWriteMode) ||
25002495
(ADI_ADRV9001_ARM_SINGLE_SPI_WRITE_MODE_STREAMING_BYTES_4 == spiWriteMode))
25012496
{
25022497
ADI_ERROR_REPORT(&device->common,
@@ -2531,7 +2526,7 @@ int32_t adrv9001_FlexStreamProcessorMemWrite(adi_adrv9001_Device_t *device,
25312526

25322527
/* setting up the flex SP DMA control register for a write */
25332528
ADRV9001_SPIWRITEBYTEDMA(device, "FLEX_SP_ARM_DMA_CTL", ADRV9001_ADDR_FLEX_SP_ARM_DMA_CTL, regWrite);
2534-
2529+
25352530
/* Enable single instruction and disable SPI streaming mode by default.
25362531
* If ADRV9001 SPI streming mode is selected, then single instruction and single instruction are disbled */
25372532
ADI_EXPECT(adrv9001_NvsRegmapCore_SingleInstruction_Set, device, 0x1);
@@ -2797,7 +2792,7 @@ static const char* adrv9001_CmdErrMsgGet(uint32_t errCode)
27972792
{
27982793
return adrv9001_error_table_CmdError[6];
27992794
}
2800-
2795+
28012796
return NULL;
28022797
}
28032798

@@ -2854,7 +2849,7 @@ int32_t adrv9001_ArmCmdErrorHandler(adi_adrv9001_Device_t *device, uint32_t detE
28542849

28552850
ADI_EXPECT(adrv9001_ArmMailBoxErrCodeGet, device, &mailboxErrCode);
28562851
errorString = adrv9001_CmdErrMsgGet(mailboxErrCode);
2857-
2852+
28582853
ADI_ERROR_REPORT(&device->common,
28592854
ADI_ADRV9001_SRC_ARMCMD,
28602855
mailboxErrCode,
@@ -2956,7 +2951,7 @@ static uint32_t adrv9001_ArmProfileWrite_Validate(adi_adrv9001_Device_t *device,
29562951
ADI_ERROR_RETURN(device->common.error.newAction);
29572952
}
29582953
}
2959-
2954+
29602955
/* Range check parameters in adi_adrv9001_TxSettings_t */
29612956
for (i = 0; i < ADI_ADRV9001_MAX_TXCHANNELS; i++)
29622957
{
@@ -2972,7 +2967,7 @@ static uint32_t adrv9001_ArmProfileWrite_Validate(adi_adrv9001_Device_t *device,
29722967
ADI_RANGE_CHECK(device, init->tx.txProfile[i].txSsiConfig.ssiDataFormatSel, ADI_ADRV9001_SSI_FORMAT_2_BIT_SYMBOL_DATA, ADI_ADRV9001_SSI_FORMAT_22_BIT_I_Q_DATA_1_BIT_GAIN_CHANGE_8_BIT_GAIN_INDEX);
29732968
ADI_RANGE_CHECK(device, init->tx.txProfile[i].txSsiConfig.numLaneSel, ADI_ADRV9001_SSI_1_LANE, ADI_ADRV9001_SSI_4_LANE);
29742969
ADI_RANGE_CHECK(device, init->tx.txProfile[i].txSsiConfig.strobeType, ADI_ADRV9001_SSI_SHORT_STROBE, ADI_ADRV9001_SSI_LONG_STROBE);
2975-
2970+
29762971
if ((ADI_ADRV9001_SSI_TYPE_LVDS == init->tx.txProfile[i].txSsiConfig.ssiType) &&
29772972
(false == init->tx.txProfile[i].txSsiConfig.ddrEn) &&
29782973
(init->tx.txProfile[i].txInterfaceSampleRate_Hz > 30720000))
@@ -3149,7 +3144,7 @@ int32_t adrv9001_ArmProfileWrite(adi_adrv9001_Device_t *device, const adi_adrv90
31493144
cfgData[offset++] = (uint8_t)(init->clocks.armPowerSavingClkDiv - 1);
31503145

31513146
cfgData[offset++] = (uint8_t)init->clocks.refClockOutEnable;
3152-
3147+
31533148
cfgData[offset++] = (uint8_t)init->clocks.auxPllPower;
31543149
cfgData[offset++] = (uint8_t)init->clocks.clkPllPower;
31553150

@@ -3208,14 +3203,14 @@ int32_t adrv9001_ArmProfileWrite(adi_adrv9001_Device_t *device, const adi_adrv90
32083203
if (ADRV9001_BF_EQUAL(device->devStateInfo.profilesValid, ADI_ADRV9001_TX_PROFILE_VALID))
32093204
{
32103205
armChannels |= (init->tx.txInitChannelMask & (ADI_ADRV9001_TX1 | ADI_ADRV9001_TX2));
3211-
3206+
32123207
/* Tx channels must have a valid and enabled ILB channel unless the signaling is Direct FM/FSK */
32133208
if(ADRV9001_BF_EQUAL(init->tx.txInitChannelMask, ADI_ADRV9001_TX1) &&
32143209
(init->tx.txProfile[0].outputSignaling != ADI_ADRV9001_TX_DIRECT_FM_FSK))
32153210
{
32163211
armChannels |= (init->rx.rxInitChannelMask & ADI_ADRV9001_ILB1);
32173212
}
3218-
3213+
32193214
if (ADRV9001_BF_EQUAL(init->tx.txInitChannelMask, ADI_ADRV9001_TX2) &&
32203215
(init->tx.txProfile[1].outputSignaling != ADI_ADRV9001_TX_DIRECT_FM_FSK))
32213216
{
@@ -3504,7 +3499,7 @@ int32_t adrv9001_DynamicProfile_Write(adi_adrv9001_Device_t *device,
35043499
int32_t recoveryAction = ADI_COMMON_ACT_NO_ACTION;
35053500
uint32_t offset = 0;
35063501
uint8_t cfgData[ADRV9001_DYNAMIC_PROFILE_BLOB_SIZE] = { 0 };
3507-
3502+
35083503
cfgData[offset++] = dynamicProfile->dynamicProfileIndex;
35093504
cfgData[offset++] = 0; // padding
35103505
cfgData[offset++] = 0; // padding

drivers/iio/adc/navassa/devices/adrv9001/public/include/adi_adrv9001_version.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,7 @@ extern "C" {
1919
#endif
2020

2121
/* Auto-generated version number - DO NOT MANUALLY EDIT */
22-
#define ADI_ADRV9001_CURRENT_VERSION "68.14.10"
22+
#define ADI_ADRV9001_CURRENT_VERSION "68.14.13"
2323

2424
#ifdef __cplusplus
2525
}

drivers/iio/adc/navassa/devices/adrv9001/public/src/adi_adrv9001_cals.c

Lines changed: 8 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -25,15 +25,10 @@
2525
#include "adrv9001_arm_macros.h"
2626
#include "adrv9001_init.h"
2727
#include "adrv9001_reg_addr_macros.h"
28-
#include "linux/mutex.h"
2928
#include "object_ids.h"
3029

3130
#ifdef __KERNEL__
32-
#include <linux/cleanup.h>
33-
#include <linux/mutex.h>
3431
#include <linux/string.h>
35-
36-
static DEFINE_MUTEX(warmboot_lock);
3732
#else
3833
#include <string.h>
3934
#endif
@@ -89,7 +84,7 @@ int32_t adi_adrv9001_cals_InitCals_Run(adi_adrv9001_Device_t *adrv9001,
8984

9085
/* Mode to select the Init calibration algorithms to run */
9186
payload[1] = (uint8_t)(initCals->calMode);
92-
87+
9388
/* A value of true will force all enabled calibrations to re-run */
9489
payload[2] = (uint8_t)(initCals->force);
9590

@@ -601,15 +596,15 @@ int32_t adi_adrv9001_cals_InternalPathDelay_Get_Validate(adi_adrv9001_Device_t *
601596
{
602597
static uint8_t MAX_NUM_PROFILE = 6;
603598
adi_adrv9001_ChannelState_e state = ADI_ADRV9001_CHANNEL_STANDBY;
604-
599+
605600
ADI_RANGE_CHECK(adrv9001, port, ADI_RX, ADI_TX);
606601
ADI_RANGE_CHECK(adrv9001, channel, ADI_CHANNEL_1, ADI_CHANNEL_2);
607602
ADI_NULL_PTR_RETURN(&adrv9001->common, internalPathDelays_ns);
608603
ADI_RANGE_CHECK(adrv9001, length, 1, MAX_NUM_PROFILE);
609604
ADI_EXPECT(adi_adrv9001_Radio_Channel_State_Get, adrv9001, port, channel, &state);
610605
if (ADI_ADRV9001_CHANNEL_STANDBY == state)
611606
{
612-
ADI_ERROR_REPORT(&adrv9001->common,
607+
ADI_ERROR_REPORT(&adrv9001->common,
613608
ADI_COMMON_ERRSRC_API,
614609
ADI_COMMON_ERR_INV_PARAM,
615610
ADI_COMMON_ACT_ERR_CHECK_PARAM,
@@ -741,7 +736,7 @@ int32_t adi_adrv9001_cals_Dynamic_profiles_calibrate_Validate(adi_adrv9001_Devic
741736
ADI_ENTRY_PTR_EXPECT(adrv9001, initCals);
742737
ADI_NULL_PTR_RETURN(&adrv9001->common, errorFlag);
743738

744-
ADI_NULL_PTR_RETURN(&adrv9001->common, dynamicProfile);
739+
ADI_NULL_PTR_RETURN(&adrv9001->common, dynamicProfile);
745740
ADI_RANGE_CHECK(adrv9001, length, 1, MAX_NUM_PROFILE);
746741

747742
for (port = ADI_RX; port <= ADI_TX; port++)
@@ -779,7 +774,7 @@ int32_t adi_adrv9001_cals_Dynamic_profiles_calibrate(adi_adrv9001_Device_t *adrv
779774
{
780775
int8_t i = 0;
781776
ADI_EXPECT(adi_adrv9001_cals_Dynamic_profiles_calibrate_Validate, adrv9001, initCals, errorFlag, dynamicProfile, length);
782-
777+
783778
for (i = 0; i <= (length - 1); i++)
784779
{
785780
ADI_EXPECT(adi_adrv9001_arm_NextDynamicProfile_Set, adrv9001, &dynamicProfile[i]);
@@ -801,16 +796,14 @@ int32_t adi_adrv9001_cals_InitCals_WarmBoot_UniqueEnabledCals_Get(adi_adrv9001_D
801796
#else
802797
static uint32_t tblSize[4];
803798
static uint32_t vecTbl[ADI_ADRV9001_WB_MAX_NUM_VECTOR_TABLE_WORDS];
804-
805-
guard(mutex)(&warmboot_lock);
806799
#endif
807800
int calNo;
808801
int arrayIndex = 0;
809802
calNumbers->numberUniqueEnabledCals = 0;
810803

811804
ADI_EXPECT(adi_adrv9001_arm_Memory_Read32, device, 0x20020000, tblSize, sizeof(tblSize), 0);
812805
ADI_EXPECT(adi_adrv9001_arm_Memory_Read32, device, 0x20020004, vecTbl, tblSize[0] * 16, 1);
813-
806+
814807
for (calNo = 0; calNo < tblSize[0]; calNo++)
815808
{
816809
uint32_t initMask = vecTbl[(4*calNo) + 2];
@@ -857,14 +850,12 @@ int32_t adi_adrv9001_cals_InitCals_WarmBoot_Coefficients_MaxArray_Get(adi_adrv90
857850
static uint32_t tblSize[4];
858851
static uint32_t vecTbl[ADI_ADRV9001_WB_MAX_NUM_ENTRY];
859852
static uint8_t calVal[ADI_ADRV9001_WB_MAX_NUM_COEFF];
860-
861-
guard(mutex)(&warmboot_lock);
862853
#endif
863854
int calNo;
864855

865856
ADI_EXPECT(adi_adrv9001_arm_Memory_Read32, device, 0x20020000, tblSize, sizeof(tblSize), 0);
866857
ADI_EXPECT(adi_adrv9001_arm_Memory_Read32, device, 0x20020004, vecTbl, tblSize[0] * 16, 1);
867-
858+
868859
for (calNo = 0; calNo < tblSize[0]; calNo++)
869860
{
870861
uint32_t addr = vecTbl[4*calNo];
@@ -915,13 +906,11 @@ int32_t adi_adrv9001_cals_InitCals_WarmBoot_Coefficients_UniqueArray_Get(adi_adr
915906
static uint32_t tblSize[4];
916907
static uint32_t vecTbl[ADI_ADRV9001_WB_MAX_NUM_ENTRY];
917908
static uint8_t calVal[ADI_ADRV9001_WB_MAX_NUM_COEFF];
918-
919-
guard(mutex)(&warmboot_lock);
920909
#endif
921910
int calNo;
922911
ADI_EXPECT(adi_adrv9001_arm_Memory_Read32, device, 0x20020000, tblSize, sizeof(tblSize), 0);
923912
ADI_EXPECT(adi_adrv9001_arm_Memory_Read32, device, 0x20020004, vecTbl, tblSize[0] * 16, 1);
924-
913+
925914
for (calNo = 0; calNo < tblSize[0]; calNo++)
926915
{
927916
uint32_t addr = vecTbl[4*calNo];
@@ -969,8 +958,6 @@ int32_t adi_adrv9001_cals_InitCals_WarmBoot_Coefficients_MaxArray_Set(adi_adrv90
969958
static uint32_t tblSize[4];
970959
static uint32_t vecTbl[ADI_ADRV9001_WB_MAX_NUM_ENTRY];
971960
static uint8_t calVal[ADI_ADRV9001_WB_MAX_NUM_COEFF];
972-
973-
guard(mutex)(&warmboot_lock);
974961
#endif
975962
int calNo;
976963

@@ -1027,8 +1014,6 @@ int32_t adi_adrv9001_cals_InitCals_WarmBoot_Coefficients_UniqueArray_Set(adi_adr
10271014
static uint32_t tblSize[4];
10281015
static uint32_t vecTbl[ADI_ADRV9001_WB_MAX_NUM_ENTRY];
10291016
static uint8_t calVal[ADI_ADRV9001_WB_MAX_NUM_COEFF];
1030-
1031-
guard(mutex)(&warmboot_lock);
10321017
#endif
10331018
int calNo;
10341019

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