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iio: adc: ad7768-1: add multiple scan types to support 16-bits mode
When the device is configured to Sinc5 filter and decimation x8, output data is reduced to 16-bits in order to support 1 MHz of sampling frequency due to clock limitation. Use multiple scan types feature to enable the driver to switch scan type in runtime, making possible to support both 24-bit and 16-bit resolution. Signed-off-by: Jonathan Santos <Jonathan.Santos@analog.com>
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drivers/iio/adc/ad7768-1.c

Lines changed: 68 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -157,6 +157,13 @@ enum ad7768_dec_rate {
157157
AD7768_DEC_RATE_16 = 10
158158
};
159159

160+
enum ad7768_scan_type {
161+
AD7768_SCAN_TYPE_DMA_NORMAL,
162+
AD7768_SCAN_TYPE_DMA_HIGH_SPEED,
163+
AD7768_SCAN_TYPE_NORMAL,
164+
AD7768_SCAN_TYPE_HIGH_SPEED,
165+
};
166+
160167
static const char * const ad7768_vcm_modes[] = {
161168
"(AVDD1-AVSS)/2",
162169
"2V5",
@@ -180,6 +187,33 @@ static const int sinc3_dec_rate_max_values[4] = {
180187
20480, 40960, 81920, 163840,
181188
};
182189

190+
static const struct iio_scan_type ad7768_scan_type[] = {
191+
[AD7768_SCAN_TYPE_NORMAL] = {
192+
.sign = 's',
193+
.realbits = 24,
194+
.storagebits = 32,
195+
.endianness = IIO_BE,
196+
},
197+
[AD7768_SCAN_TYPE_HIGH_SPEED] = {
198+
.sign = 's',
199+
.realbits = 16,
200+
.storagebits = 32,
201+
.endianness = IIO_BE,
202+
},
203+
[AD7768_SCAN_TYPE_DMA_NORMAL] = {
204+
.sign = 's',
205+
.realbits = 24,
206+
.storagebits = 32,
207+
.endianness = IIO_CPU,
208+
},
209+
[AD7768_SCAN_TYPE_DMA_HIGH_SPEED] = {
210+
.sign = 's',
211+
.realbits = 16,
212+
.storagebits = 32,
213+
.endianness = IIO_CPU,
214+
},
215+
};
216+
183217
static const char * const ad7768_filter_enum[] = {
184218
[SINC5] = "sinc5",
185219
[SINC3] = "sinc3",
@@ -242,12 +276,9 @@ static const struct iio_chan_spec ad7768_channels[] = {
242276
.indexed = 1,
243277
.channel = 0,
244278
.scan_index = 0,
245-
.scan_type = {
246-
.sign = 's',
247-
.realbits = 24,
248-
.storagebits = 32,
249-
.shift = 8,
250-
},
279+
.has_ext_scan_type = 1,
280+
.ext_scan_type = ad7768_scan_type,
281+
.num_ext_scan_type = ARRAY_SIZE(ad7768_scan_type),
251282
},
252283
};
253284

@@ -422,6 +453,9 @@ static int ad7768_scan_direct(struct iio_dev *indio_dev)
422453
ret = ad7768_spi_reg_read(st, AD7768_REG_ADC_DATA, &readval, 3);
423454
if (ret < 0)
424455
return ret;
456+
457+
if (st->filter_mode == SINC5_DEC_X8)
458+
readval = readval >> 8;
425459
/*
426460
* Any SPI configuration of the AD7768-1 can only be
427461
* performed in continuous conversion mode.
@@ -912,8 +946,13 @@ static int ad7768_read_raw(struct iio_dev *indio_dev,
912946
int *val, int *val2, long info)
913947
{
914948
struct ad7768_state *st = iio_priv(indio_dev);
949+
const struct iio_scan_type *scan_type;
915950
int scale_uv, ret;
916951

952+
scan_type = iio_get_current_scan_type(indio_dev, chan);
953+
if (IS_ERR(scan_type))
954+
return PTR_ERR(scan_type);
955+
917956
switch (info) {
918957
case IIO_CHAN_INFO_RAW:
919958
ret = iio_device_claim_direct_mode(indio_dev);
@@ -922,7 +961,7 @@ static int ad7768_read_raw(struct iio_dev *indio_dev,
922961

923962
ret = ad7768_scan_direct(indio_dev);
924963
if (ret >= 0)
925-
*val = sign_extend32(ret, chan->scan_type.realbits - 1);
964+
*val = sign_extend32(ret, scan_type->realbits - 1);
926965

927966
iio_device_release_direct_mode(indio_dev);
928967
if (ret < 0)
@@ -936,7 +975,7 @@ static int ad7768_read_raw(struct iio_dev *indio_dev,
936975
return scale_uv;
937976

938977
*val = (scale_uv * 2) / 1000;
939-
*val2 = chan->scan_type.realbits;
978+
*val2 = scan_type->realbits;
940979

941980
return IIO_VAL_FRACTIONAL_LOG2;
942981

@@ -981,11 +1020,25 @@ static const struct attribute_group ad7768_group = {
9811020
.attrs = ad7768_attributes,
9821021
};
9831022

1023+
static int ad7768_get_current_scan_type(const struct iio_dev *indio_dev,
1024+
const struct iio_chan_spec *chan)
1025+
{
1026+
struct ad7768_state *st = iio_priv(indio_dev);
1027+
1028+
if (st->spi_is_dma_mapped)
1029+
return st->filter_mode == SINC5_DEC_X8 ? AD7768_SCAN_TYPE_DMA_HIGH_SPEED :
1030+
AD7768_SCAN_TYPE_DMA_NORMAL;
1031+
else
1032+
return st->filter_mode == SINC5_DEC_X8 ? AD7768_SCAN_TYPE_HIGH_SPEED :
1033+
AD7768_SCAN_TYPE_NORMAL;
1034+
}
1035+
9841036
static const struct iio_info ad7768_info = {
9851037
.attrs = &ad7768_group,
9861038
.read_raw = &ad7768_read_raw,
9871039
.write_raw = &ad7768_write_raw,
9881040
.read_label = ad7768_read_label,
1041+
.get_current_scan_type = &ad7768_get_current_scan_type,
9891042
.debugfs_reg_access = &ad7768_reg_access,
9901043
};
9911044

@@ -1091,15 +1144,21 @@ static irqreturn_t ad7768_interrupt(int irq, void *dev_id)
10911144
static int ad7768_buffer_postenable(struct iio_dev *indio_dev)
10921145
{
10931146
struct ad7768_state *st = iio_priv(indio_dev);
1147+
const struct iio_scan_type *scan_type;
10941148
struct spi_transfer xfer = {
10951149
.len = 1,
1096-
.bits_per_word = 32
10971150
};
10981151
unsigned int rx_data[2];
10991152
unsigned int tx_data[2];
11001153
struct spi_message msg;
11011154
int ret;
11021155

1156+
scan_type = iio_get_current_scan_type(indio_dev, &indio_dev->channels[0]);
1157+
if (IS_ERR(scan_type))
1158+
return PTR_ERR(scan_type);
1159+
1160+
xfer.bits_per_word = scan_type->realbits;
1161+
11031162
/*
11041163
* Write a 1 to the LSB of the INTERFACE_FORMAT register to enter
11051164
* continuous read mode. Subsequent data reads do not require an

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