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UtsavAgarwalADIUtsavAgarwalADI
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dts: adi: Adding support for sc594-som-ezlite
Adding device tree support for sc594-som-ezlite Signed-off-by: UtsavAgarwalADI <utsav.agarwal@analog.com>
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‎arch/arm/boot/dts/adi/Makefile

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# SPDX-License-Identifier: GPL-2.0
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dtb-$(CONFIG_ARCH_SC59X) += sc594-som-ezkit.dtb
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dtb-$(CONFIG_ARCH_SC59X) += sc594-som-ezkit.dtb sc594-som-ezlite.dtb
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dtb-$(CONFIG_ARCH_SC58X) += sc589-mini.dtb
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dtb-$(CONFIG_ARCH_SC57X) += sc573-ezkit.dtb

‎arch/arm/boot/dts/adi/sc594-som-ezlite.dts

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/*
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* Device tree for ADI sc594-som-ezlite board
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*
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* Copyright 2014 - 2020 Analog Devices Inc.
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*
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* Licensed under the GPL-2 or later.
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*
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*/
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/dts-v1/;
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#include "sc594-som.dtsi"
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/ {
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model = "ADI sc594-som-ezlite";
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compatible = "adi,sc594-som-ezlite", "adi,sc59x";
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clocks {
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compatible = "simple-bus";
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mclk: mclk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <24576000>;
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clock-output-names = "mclk";
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};
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};
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scb {
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sound {
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compatible = "adi,sc5xx-asoc-card";
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adi,cpu-dai = <&i2s0>;
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adi,codec = <&adau1372>;
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};
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};
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};
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&i2c2 {
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gpio_expander: adp5588@30 {
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compatible = "adi,adp5588-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x30>;
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status = "okay";
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usb-spi0 {
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gpio-hog;
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gpios = <8 GPIO_ACTIVE_HIGH>;
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output-high;
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line-name = "usb_spi0_en";
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};
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usb-spi1 {
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gpio-hog;
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gpios = <9 GPIO_ACTIVE_HIGH>;
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output-high;
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line-name = "usb_spi1_en";
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};
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usb-qspi-en {
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gpio-hog;
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gpios = <10 GPIO_ACTIVE_HIGH>;
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output-high;
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line-name = "usb_qspi_en";
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};
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usb-qspi-reset {
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gpio-hog;
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gpios = <11 GPIO_ACTIVE_HIGH>;
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output-low;
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line-name = "usb_qspi_reset";
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};
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eth0-reset {
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gpio-hog;
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gpios = <12 GPIO_ACTIVE_HIGH>;
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output-high;
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line-name = "~eth0-reset";
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};
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adau1372-pwrdwn {
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gpio-hog;
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gpios = <13 GPIO_ACTIVE_HIGH>;
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output-high;
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line-name = "adau1372_pwrdwn";
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};
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led1 {
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gpio-hog;
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gpios = <15 GPIO_ACTIVE_HIGH>;
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output-low;
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line-name = "led1-en";
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};
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led2 {
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gpio-hog;
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gpios = <16 GPIO_ACTIVE_HIGH>;
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output-low;
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line-name = "led2-en";
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};
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led3 {
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gpio-hog;
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gpios = <17 GPIO_ACTIVE_HIGH>;
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output-low;
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line-name = "led3-en";
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};
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};
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adau1372: adau1372@0x3c {
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compatible = "adi,adau1372";
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reg = <0x3c>;
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clock-names = "mclk";
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clocks = <&mclk>;
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};
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};
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&emac0 {
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snps,reset-active-low;
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snps,reset-delays-us = <0 200 500>;
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phy-handle = <&adin1300>;
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phy-mode = "rgmii-id";
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pinctrl-names = "default";
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pinctrl-0 = <&eth0_default>;
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status = "okay";
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snps,mtl-rx-config = <&emac0rxconfig>;
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snps,mtl-tx-config = <&emac0txconfig>;
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emac0txconfig: tx-config {
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snps,tx-queues-to-use = <3>;
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queue0 {
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snps,dcb-algorithm;
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};
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queue1 {
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snps,dcb-algorithm;
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};
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queue2 {
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snps,dcb-algorithm;
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};
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};
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emac0rxconfig: rx-config {
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snps,rx-queues-to-use = <1>;
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queue0 {
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snps,dcb-algorithm;
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};
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queue1 {
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snps,dcb-algorithm;
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};
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queue2 {
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snps,dcb-algorithm;
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};
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};
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mdio0 {
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compatible = "snps,dwmac-mdio";
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#address-cells = <1>;
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#size-cells = <0>;
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adin1300: ethernet-phy@0 {
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reg = <0>;
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};
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};
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};
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&emac1 {
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status = "disabled";
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};
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&sru_ctrl_dai0 {
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status = "okay";
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sru_dai0: sru_dai0_mux {
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route {
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sru-routing =
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/* 1362 TX LRCLK */
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<DAI0_LOW_F DAI0_PBEN01_I>, /* set DAI0_PIN01 to input */
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<DAI0_PB01_O_ABCDE SPT0_AFS_I>, /* route DAI0_PIN01 to SPT0_AFS */
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/* 1363 TX BCLK */
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<DAI0_LOW_F DAI0_PBEN02_I>, /* set DAI0_PIN02 to input */
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<DAI0_PB02_O_ABCDE SPT0_ACLK_I>, /* route DAI0_PIN02 to SPT0_ACLK */
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/* 1363 TX DAC_SDATA/MP0 */
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<DAI0_HIGH_F DAI0_PBEN03_I>, /* set DAI0_PIN03 to output */
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<SPT0_AD0_O_BD DAI0_PB03_I>, /* route SPT0_AD0 to DAI0_PIN03 */
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/* 1362 RX LRCLK */
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<DAI0_LOW_F DAI0_PBEN01_I>, /* set DAI0_PIN01 to input */
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<DAI0_PB01_O_ABCDE SPT0_BFS_I>, /* route DAI0_PIN01 to SPT0_BFS */
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/* 1363 RX BCLK */
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<DAI0_LOW_F DAI0_PBEN02_I>, /* set DAI0_PIN02 to input */
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<DAI0_PB02_O_ABCDE SPT0_BCLK_I>, /* route DAI0_PIN02 to SPT0_BCLK */
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/* 1363 RX ADC_SDATA0/MP1 */
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<DAI0_LOW_F DAI0_PBEN04_I>, /* set DAI0_PIN04 to input */
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<DAI0_PB04_O_ABCDE SPT0_BD0_I>, /* route DAI0_PIN04 to SPT0_BD0 */
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/* 1363 RX ADC_SDATA1/MP6 */
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<DAI0_LOW_F DAI0_PBEN05_I>, /* set DAI0_PIN05 to input */
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<DAI0_PB05_O_ABCDE SPT0_BD1_I>; /* route DAI0_PIN05 to SPT0_BD1 */
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};
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};
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};
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&i2s0 {
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pinctrl-names = "default";
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pinctrl-0 = <&sru_dai0>;
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status = "okay";
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};
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