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| 1 | +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) |
| 2 | +%YAML 1.2 |
| 3 | +--- |
| 4 | +$id: http://devicetree.org/schemas/regulator/adi,adp5055-regulator.yaml# |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | + |
| 7 | +title: Analog Devices ADP5055 Triple Buck Regulator |
| 8 | + |
| 9 | +maintainers: |
| 10 | + - Alexis Czezar Torreno <alexisczezar.torreno@analog.com> |
| 11 | + |
| 12 | +description: | |
| 13 | + The ADP5055 combines three high performance buck regulator. The device enables |
| 14 | + direct connection to high input voltages up to 18 V with no preregulators. |
| 15 | + https://www.analog.com/media/en/technical-documentation/data-sheets/adp5055.pdf |
| 16 | +
|
| 17 | +properties: |
| 18 | + compatible: |
| 19 | + enum: |
| 20 | + - adi,adp5055 |
| 21 | + |
| 22 | + reg: |
| 23 | + enum: |
| 24 | + - 0x70 |
| 25 | + - 0x71 |
| 26 | + |
| 27 | + adi,tset-us: |
| 28 | + description: |
| 29 | + Setting time used by the device. This is changed via soldering specific |
| 30 | + resistor values on the CFG2 pin. |
| 31 | + enum: [2600, 20800] |
| 32 | + default: 2600 |
| 33 | + |
| 34 | + adi,ocp-blanking: |
| 35 | + description: |
| 36 | + If present, overcurrent protection (OCP) blanking for all regulator is on. |
| 37 | + type: boolean |
| 38 | + |
| 39 | + adi,delay-power-good: |
| 40 | + description: |
| 41 | + Configures delay timer of the power good (PWRGD) pin. Delay is based on |
| 42 | + Tset which can be 2.6 ms or 20.8 ms. |
| 43 | + type: boolean |
| 44 | + |
| 45 | + '#address-cells': |
| 46 | + const: 1 |
| 47 | + |
| 48 | + '#size-cells': |
| 49 | + const: 0 |
| 50 | + |
| 51 | +patternProperties: |
| 52 | + '^buck[0-2]$': |
| 53 | + type: object |
| 54 | + $ref: regulator.yaml# |
| 55 | + unevaluatedProperties: false |
| 56 | + |
| 57 | + properties: |
| 58 | + enable-gpios: |
| 59 | + maxItems: 1 |
| 60 | + description: |
| 61 | + GPIO specifier to enable the GPIO control for each regulator. The |
| 62 | + driver supports two modes of enable, hardware only (GPIOs) or software |
| 63 | + only (Registers). Pure hardware enabling requires each regulator to |
| 64 | + contain this property. If at least one regulator does not have this, |
| 65 | + the driver automatically switches to software only mode. |
| 66 | + |
| 67 | + adi,dvs-limit-upper-microvolt: |
| 68 | + description: |
| 69 | + Configure the allowable upper side limit of the voltage output of each |
| 70 | + regulator in microvolt. Relative to the default Vref trimming value. |
| 71 | + Vref = 600 mV. Voltages are in 12 mV steps, value is autoadjusted. |
| 72 | + Vout_high = Vref_trim + dvs-limit-upper. |
| 73 | + minimum: 12000 |
| 74 | + maximum: 192000 |
| 75 | + default: 192000 |
| 76 | + |
| 77 | + adi,dvs-limit-lower-microvolt: |
| 78 | + description: |
| 79 | + Configure the allowable lower side limit of the voltage output of each |
| 80 | + regulator in microvolt. Relative to the default Vref trimming value. |
| 81 | + Vref = 600 mV. Voltages are in 12 mV steps, value is autoadjusted. |
| 82 | + Vout_low = Vref_trim + dvs-limit-lower. |
| 83 | + minimum: -190500 |
| 84 | + maximum: -10500 |
| 85 | + default: -190500 |
| 86 | + |
| 87 | + adi,fast-transient: |
| 88 | + description: |
| 89 | + Configures the fast transient sensitivity for each regulator. |
| 90 | + "none" - No fast transient. |
| 91 | + "3G_1.5%" - 1.5% window with 3*350uA/V |
| 92 | + "5G_1.5%" - 1.5% window with 5*350uA/V |
| 93 | + "5G_2.5%" - 2.5% window with 5*350uA/V |
| 94 | + enum: [none, 3G_1.5%, 5G_1.5%, 5G_2.5%] |
| 95 | + default: 5G_2.5% |
| 96 | + |
| 97 | + adi,mask-power-good: |
| 98 | + description: |
| 99 | + If present, masks individual regulators PWRGD signal to the external |
| 100 | + PWRGD hardware pin. |
| 101 | + type: boolean |
| 102 | + |
| 103 | + required: |
| 104 | + - regulator-name |
| 105 | + |
| 106 | +required: |
| 107 | + - compatible |
| 108 | + - reg |
| 109 | + |
| 110 | +additionalProperties: false |
| 111 | + |
| 112 | +examples: |
| 113 | + - | |
| 114 | + #include <dt-bindings/gpio/gpio.h> |
| 115 | +
|
| 116 | + i2c { |
| 117 | + #address-cells = <1>; |
| 118 | + #size-cells = <0>; |
| 119 | +
|
| 120 | + regulator@70 { |
| 121 | + compatible = "adi,adp5055"; |
| 122 | + reg = <0x70>; |
| 123 | + #address-cells = <1>; |
| 124 | + #size-cells = <0>; |
| 125 | +
|
| 126 | + adi,tset-us = <2600>; |
| 127 | + adi,ocp-blanking; |
| 128 | + adi,delay-power-good; |
| 129 | +
|
| 130 | + buck0 { |
| 131 | + regulator-name = "buck0"; |
| 132 | + enable-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>; |
| 133 | + adi,dvs-limit-upper-microvolt = <192000>; |
| 134 | + adi,dvs-limit-lower-microvolt = <(-190500)>; |
| 135 | + adi,fast-transient = "5G_2.5%"; |
| 136 | + adi,mask-power-good; |
| 137 | + }; |
| 138 | +
|
| 139 | + buck1 { |
| 140 | + regulator-name = "buck1"; |
| 141 | + enable-gpios = <&gpio 18 GPIO_ACTIVE_HIGH>; |
| 142 | + adi,dvs-limit-upper-microvolt = <192000>; |
| 143 | + adi,dvs-limit-lower-microvolt = <(-190500)>; |
| 144 | + adi,fast-transient = "5G_2.5%"; |
| 145 | + adi,mask-power-good; |
| 146 | + }; |
| 147 | +
|
| 148 | + buck2 { |
| 149 | + regulator-name = "buck2"; |
| 150 | + enable-gpios = <&gpio 19 GPIO_ACTIVE_HIGH>; |
| 151 | + adi,dvs-limit-upper-microvolt = <192000>; |
| 152 | + adi,dvs-limit-lower-microvolt = <(-190500)>; |
| 153 | + adi,fast-transient = "5G_2.5%"; |
| 154 | + adi,mask-power-good; |
| 155 | + }; |
| 156 | + }; |
| 157 | + }; |
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