arm: dts: xilinx: Move sample eeprom dts

Have it suffixed with fpga-eeprom, since requires the IIC controller,
AXI-SYSID IP cores. Add new blank zynq-coraz7s.

Signed-off-by: Jorge Marques <jorge.marques@analog.com>

Author: gastmaier

arch/arm/boot/dts/xilinx/zynq-coraz7s-fpga-eeprom.dts

@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * hdl_project: <common/coraz7s>
+ *
+ * Copyright (C) 2025 Analog Devices Inc.
+ */
+
+/dts-v1/;
+#include "zynq-coraz7s.dtsi"
+#include "zynq-coraz7s-iic.dtsi"
+#include "zynq-coraz7s-axi-sysid.dtsi"
+
+&axi_i2c_0 {
+	eeprom1: eeprom@50 {
+		compatible = "at24,24c02";
+		reg = <0x50>;
+	};
+};

arch/arm/boot/dts/xilinx/zynq-coraz7s.dts

@@ -3,12 +3,3 @@
 
 /dts-v1/;
 #include "zynq-coraz7s.dtsi"
-#include "zynq-coraz7s-iic.dtsi"
-#include "zynq-coraz7s-axi-sysid.dtsi"
-
-&axi_i2c_0 {
-	eeprom1: eeprom@50 {
-		compatible = "at24,24c02";
-		reg = <0x50>;
-	};
-};