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tree-wide: dts: remove adi,channels node for AXI DMAC
Remove the adi,channels node from all dts files that have it. Since AXI DMAC IP core version 4.3.a (about 4 years ago), there have been registers to provide the information about the channel compile-time configuration in the HDL project. So the adi,channels node is no longer needed and can be removed. Signed-off-by: David Lechner <dlechner@baylibre.com>
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139 files changed

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‎arch/arm/boot/dts/adi-common-dac-fmc-ebz.dtsi

Lines changed: 0 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -1,25 +1,6 @@
11
// SPDX-License-Identifier: GPL-2.0
22
/* Copyright (C) 2024 Analog Devices Inc. */
33

4-
&dac_dma {
5-
compatible = "adi,axi-dmac-1.00.a";
6-
7-
#dma-cells = <1>;
8-
9-
adi,channels {
10-
#size-cells = <0>;
11-
#address-cells = <1>;
12-
13-
dma-channel@0 {
14-
reg = <0>;
15-
adi,source-bus-width = <64>;
16-
adi,source-bus-type = <0>;
17-
adi,destination-bus-width = <256>;
18-
adi,destination-bus-type = <2>;
19-
};
20-
};
21-
};
22-
234
&jesd204_transport {
245
compatible = "adi,axi-ad9136-1.0";
256

‎arch/arm/boot/dts/adi-intel-dac-fmc-ebz.dtsi

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -39,7 +39,9 @@
3939
};
4040

4141
dac_dma: dmac@40000 {
42+
compatible = "adi,axi-dmac-1.00.a";
4243
reg = <0x40000 0x4000>;
44+
#dma-cells = <1>;
4345

4446
interrupt-parent = <&intc>;
4547
interrupts = <0 30 0>;

‎arch/arm/boot/dts/adi-xilinx-dac-fmc-ebz.dtsi

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -5,7 +5,9 @@
55

66
&fpga_axi {
77
dac_dma: dma@7c420000 {
8+
compatible = "adi,axi-dmac-1.00.a";
89
reg = <0x7c420000 0x10000>;
10+
#dma-cells = <1>;
911

1012
interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
1113
clocks = <&axi_clk>;

‎arch/arm/boot/dts/adi-zynq-cn0363.dtsi

Lines changed: 0 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -22,19 +22,6 @@
2222
#dma-cells = <1>;
2323
interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
2424
clocks = <&clkc 15>;
25-
26-
adi,channels {
27-
#size-cells = <0>;
28-
#address-cells = <1>;
29-
30-
dma-channel@0 {
31-
reg = <0>;
32-
adi,source-bus-width = <32>;
33-
adi,source-bus-type = <2>;
34-
adi,destination-bus-width = <64>;
35-
adi,destination-bus-type = <0>;
36-
};
37-
};
3825
};
3926

4027
axi_generic_adc: axi-generic-adc@43c00000 {

‎arch/arm/boot/dts/socfpga_arria10_socdk_adrv9002.dts

Lines changed: 0 additions & 52 deletions
Original file line numberDiff line numberDiff line change
@@ -69,19 +69,6 @@
6969
interrupt-parent = <&intc>;
7070
interrupts = <0 21 IRQ_TYPE_LEVEL_HIGH>;
7171
clocks = <&dma_clk>;
72-
73-
adi,channels {
74-
#size-cells = <0>;
75-
#address-cells = <1>;
76-
77-
dma-channel@0 {
78-
reg = <0>;
79-
adi,source-bus-width = <64>;
80-
adi,source-bus-type = <2>;
81-
adi,destination-bus-width = <64>;
82-
adi,destination-bus-type = <0>;
83-
};
84-
};
8572
};
8673

8774
rx2_dma: dma@41000 {
@@ -91,19 +78,6 @@
9178
interrupt-parent = <&intc>;
9279
interrupts = <0 30 IRQ_TYPE_LEVEL_HIGH>;
9380
clocks = <&dma_clk>;
94-
95-
adi,channels {
96-
#size-cells = <0>;
97-
#address-cells = <1>;
98-
99-
dma-channel@0 {
100-
reg = <0>;
101-
adi,source-bus-width = <64>;
102-
adi,source-bus-type = <2>;
103-
adi,destination-bus-width = <64>;
104-
adi,destination-bus-type = <0>;
105-
};
106-
};
10781
};
10882

10983
tx1_dma: dma@44000 {
@@ -113,19 +87,6 @@
11387
interrupt-parent = <&intc>;
11488
interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>;
11589
clocks = <&dma_clk>;
116-
117-
adi,channels {
118-
#size-cells = <0>;
119-
#address-cells = <1>;
120-
121-
dma-channel@0 {
122-
reg = <0>;
123-
adi,source-bus-width = <64>;
124-
adi,source-bus-type = <0>;
125-
adi,destination-bus-width = <64>;
126-
adi,destination-bus-type = <2>;
127-
};
128-
};
12990
};
13091

13192
tx2_dma: dma@45000 {
@@ -135,19 +96,6 @@
13596
interrupt-parent = <&intc>;
13697
interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>;
13798
clocks = <&dma_clk>;
138-
139-
adi,channels {
140-
#size-cells = <0>;
141-
#address-cells = <1>;
142-
143-
dma-channel@0 {
144-
reg = <0>;
145-
adi,source-bus-width = <64>;
146-
adi,source-bus-type = <0>;
147-
adi,destination-bus-width = <64>;
148-
adi,destination-bus-type = <2>;
149-
};
150-
};
15199
};
152100

153101
axi_adrv9002_core_rx1: axi-adrv9002-rx-lpc@20000 {

‎arch/arm/boot/dts/socfpga_arria10_socdk_adrv9002_rx2tx2.dts

Lines changed: 0 additions & 26 deletions
Original file line numberDiff line numberDiff line change
@@ -69,19 +69,6 @@
6969
interrupt-parent = <&intc>;
7070
interrupts = <0 21 IRQ_TYPE_LEVEL_HIGH>;
7171
clocks = <&dma_clk>;
72-
73-
adi,channels {
74-
#size-cells = <0>;
75-
#address-cells = <1>;
76-
77-
dma-channel@0 {
78-
reg = <0>;
79-
adi,source-bus-width = <64>;
80-
adi,source-bus-type = <2>;
81-
adi,destination-bus-width = <64>;
82-
adi,destination-bus-type = <0>;
83-
};
84-
};
8572
};
8673

8774
tx_dma: dma@44000 {
@@ -91,19 +78,6 @@
9178
interrupt-parent = <&intc>;
9279
interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>;
9380
clocks = <&dma_clk>;
94-
95-
adi,channels {
96-
#size-cells = <0>;
97-
#address-cells = <1>;
98-
99-
dma-channel@0 {
100-
reg = <0>;
101-
adi,source-bus-width = <64>;
102-
adi,source-bus-type = <0>;
103-
adi,destination-bus-width = <64>;
104-
adi,destination-bus-type = <2>;
105-
};
106-
};
10781
};
10882

10983
axi_adrv9002_core_rx: axi-adrv9002-rx-lpc@20000 {

‎arch/arm/boot/dts/socfpga_arria10_socdk_adrv9009.dts

Lines changed: 0 additions & 39 deletions
Original file line numberDiff line numberDiff line change
@@ -121,19 +121,6 @@
121121
interrupts = <0 30 4>;
122122
#dma-cells = <1>;
123123
clocks = <&dma_clk>;
124-
125-
adi,channels {
126-
#size-cells = <0>;
127-
#address-cells = <1>;
128-
129-
dma-channel@0 {
130-
reg = <0>;
131-
adi,source-bus-width = <128>;
132-
adi,source-bus-type = <0>;
133-
adi,destination-bus-width = <128>;
134-
adi,destination-bus-type = <1>;
135-
};
136-
};
137124
};
138125

139126
axi_adrv9009_rx_jesd: axi-jesd204-rx@30000 {
@@ -183,19 +170,6 @@
183170
interrupts = <0 31 4>;
184171
#dma-cells = <1>;
185172
clocks = <&dma_clk>;
186-
187-
adi,channels {
188-
#size-cells = <0>;
189-
#address-cells = <1>;
190-
191-
dma-channel@0 {
192-
reg = <0>;
193-
adi,source-bus-width = <64>;
194-
adi,source-bus-type = <2>;
195-
adi,destination-bus-width = <128>;
196-
adi,destination-bus-type = <0>;
197-
};
198-
};
199173
};
200174

201175
axi_adrv9009_rx_os_jesd: axi-jesd204-rx@40000 {
@@ -245,19 +219,6 @@
245219
interrupts = <0 32 4>;
246220
#dma-cells = <1>;
247221
clocks = <&dma_clk>;
248-
249-
adi,channels {
250-
#size-cells = <0>;
251-
#address-cells = <1>;
252-
253-
dma-channel@0 {
254-
reg = <0>;
255-
adi,source-bus-width = <128>;
256-
adi,source-bus-type = <2>;
257-
adi,destination-bus-width = <128>;
258-
adi,destination-bus-type = <0>;
259-
};
260-
};
261222
};
262223

263224
axi_adrv9009_core_rx: axi-adrv9009-rx-hpc@50000 {

‎arch/arm/boot/dts/socfpga_arria10_socdk_adrv9371.dts

Lines changed: 0 additions & 36 deletions
Original file line numberDiff line numberDiff line change
@@ -179,18 +179,6 @@
179179
interrupts = <0 30 IRQ_TYPE_LEVEL_HIGH>;
180180
#dma-cells = <1>;
181181
clocks = <&dma_clk>;
182-
183-
adi,channels {
184-
#size-cells = <0>;
185-
#address-cells = <1>;
186-
dma-channel@0 {
187-
reg = <0>;
188-
adi,source-bus-width = <128>;
189-
adi,source-bus-type = <0>;
190-
adi,destination-bus-width = <128>;
191-
adi,destination-bus-type = <1>;
192-
};
193-
};
194182
};
195183

196184
axi_ad9371_rx_dma: axi-ad9371-rx-dma@3c000 {
@@ -200,18 +188,6 @@
200188
interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>;
201189
#dma-cells = <1>;
202190
clocks = <&dma_clk>;
203-
204-
adi,channels {
205-
#size-cells = <0>;
206-
#address-cells = <1>;
207-
dma-channel@0 {
208-
reg = <0>;
209-
adi,source-bus-width = <64>;
210-
adi,source-bus-type = <2>;
211-
adi,destination-bus-width = <128>;
212-
adi,destination-bus-type = <0>;
213-
};
214-
};
215191
};
216192

217193
axi_ad9371_rx_os_dma: axi-ad9371-rx-os-dma@4c000 {
@@ -221,18 +197,6 @@
221197
interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>;
222198
#dma-cells = <1>;
223199
clocks = <&dma_clk>;
224-
225-
adi,channels {
226-
#size-cells = <0>;
227-
#address-cells = <1>;
228-
dma-channel@0 {
229-
reg = <0>;
230-
adi,source-bus-width = <64>;
231-
adi,source-bus-type = <2>;
232-
adi,destination-bus-width = <128>;
233-
adi,destination-bus-type = <0>;
234-
};
235-
};
236200
};
237201

238202
axi_ad9371_rx: axi-ad9371-rx-hpc@50000 {

‎arch/arm/boot/dts/socfpga_arria10_socdk_daq2.dts

Lines changed: 0 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -77,18 +77,6 @@
7777
interrupt-parent = <&intc>;
7878
interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>;
7979
clocks = <&dma_clk>;
80-
81-
adi,channels {
82-
#size-cells = <0>;
83-
#address-cells = <1>;
84-
dma-channel@0 {
85-
reg = <0>;
86-
adi,source-bus-width = <128>;
87-
adi,source-bus-type = <1>;
88-
adi,destination-bus-width = <128>;
89-
adi,destination-bus-type = <0>;
90-
};
91-
};
9280
};
9381

9482
tx_dma: tx-dmac@2c000 {
@@ -98,19 +86,6 @@
9886
interrupt-parent = <&intc>;
9987
interrupts = <0 30 IRQ_TYPE_LEVEL_HIGH>;
10088
clocks = <&dma_clk>;
101-
102-
adi,channels {
103-
#size-cells = <0>;
104-
#address-cells = <1>;
105-
dma-channel@0 {
106-
reg = <0>;
107-
adi,source-bus-width = <128>;
108-
adi,source-bus-type = <0>;
109-
adi,destination-bus-width = <128>;
110-
adi,destination-bus-type = <1>;
111-
adi,cyclic;
112-
};
113-
};
11489
};
11590

11691
axi_ad9144_core: axi-ad9144-hpc@34000 {

‎arch/arm/boot/dts/socfpga_arria10_socdk_fmclidar1.dts

Lines changed: 0 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -143,19 +143,6 @@
143143
interrupts = <0 31 4>;
144144
#dma-cells = <1>;
145145
clocks = <&dma_clk>;
146-
147-
adi,channels {
148-
#size-cells = <0>;
149-
#address-cells = <1>;
150-
151-
dma-channel@0 {
152-
reg = <0>;
153-
adi,source-bus-width = <256>;
154-
adi,source-bus-type = <2>;
155-
adi,destination-bus-width = <64>;
156-
adi,destination-bus-type = <0>;
157-
};
158-
};
159146
};
160147

161148
axi_ad9094_core: axi-ad9094-hpc@50000 {

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