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iio: adc: ad7380: move internal reference voltage to chip_info
Move the internal reference voltage value to the chip_info structure. Before this change, only ADAQ chips could be internal_ref_only and only non-ADAQ chips could be external_ref_only. Now, this restriction is removed. Signed-off-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Link: https://patch.msgid.link/20250401-iio-ad7380-add-ad7389-4-v1-3-23d2568aa24f@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> (cherry picked from commit d63a749)
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‎drivers/iio/adc/ad7380.c

Lines changed: 20 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -123,6 +123,7 @@ struct ad7380_chip_info {
123123
unsigned int num_supplies;
124124
bool external_ref_only;
125125
bool internal_ref_only;
126+
unsigned int internal_ref_mv;
126127
const char * const *vcm_supplies;
127128
unsigned int num_vcm_supplies;
128129
const unsigned long *available_scan_masks;
@@ -612,6 +613,7 @@ static const struct ad7380_chip_info ad7380_chip_info = {
612613
.num_simult_channels = 2,
613614
.supplies = ad7380_supplies,
614615
.num_supplies = ARRAY_SIZE(ad7380_supplies),
616+
.internal_ref_mv = AD7380_INTERNAL_REF_MV,
615617
.available_scan_masks = ad7380_2_channel_scan_masks,
616618
.timing_specs = &ad7380_timing,
617619
.max_conversion_rate_hz = 4 * MEGA,
@@ -625,6 +627,7 @@ static const struct ad7380_chip_info ad7381_chip_info = {
625627
.num_simult_channels = 2,
626628
.supplies = ad7380_supplies,
627629
.num_supplies = ARRAY_SIZE(ad7380_supplies),
630+
.internal_ref_mv = AD7380_INTERNAL_REF_MV,
628631
.available_scan_masks = ad7380_2_channel_scan_masks,
629632
.timing_specs = &ad7380_timing,
630633
.max_conversion_rate_hz = 4 * MEGA,
@@ -640,6 +643,7 @@ static const struct ad7380_chip_info ad7383_chip_info = {
640643
.num_supplies = ARRAY_SIZE(ad7380_supplies),
641644
.vcm_supplies = ad7380_2_channel_vcm_supplies,
642645
.num_vcm_supplies = ARRAY_SIZE(ad7380_2_channel_vcm_supplies),
646+
.internal_ref_mv = AD7380_INTERNAL_REF_MV,
643647
.available_scan_masks = ad7380_2_channel_scan_masks,
644648
.timing_specs = &ad7380_timing,
645649
.max_conversion_rate_hz = 4 * MEGA,
@@ -655,6 +659,7 @@ static const struct ad7380_chip_info ad7384_chip_info = {
655659
.num_supplies = ARRAY_SIZE(ad7380_supplies),
656660
.vcm_supplies = ad7380_2_channel_vcm_supplies,
657661
.num_vcm_supplies = ARRAY_SIZE(ad7380_2_channel_vcm_supplies),
662+
.internal_ref_mv = AD7380_INTERNAL_REF_MV,
658663
.available_scan_masks = ad7380_2_channel_scan_masks,
659664
.timing_specs = &ad7380_timing,
660665
.max_conversion_rate_hz = 4 * MEGA,
@@ -668,6 +673,7 @@ static const struct ad7380_chip_info ad7386_chip_info = {
668673
.num_simult_channels = 2,
669674
.supplies = ad7380_supplies,
670675
.num_supplies = ARRAY_SIZE(ad7380_supplies),
676+
.internal_ref_mv = AD7380_INTERNAL_REF_MV,
671677
.has_mux = true,
672678
.available_scan_masks = ad7380_2x2_channel_scan_masks,
673679
.timing_specs = &ad7380_timing,
@@ -682,6 +688,7 @@ static const struct ad7380_chip_info ad7387_chip_info = {
682688
.num_simult_channels = 2,
683689
.supplies = ad7380_supplies,
684690
.num_supplies = ARRAY_SIZE(ad7380_supplies),
691+
.internal_ref_mv = AD7380_INTERNAL_REF_MV,
685692
.has_mux = true,
686693
.available_scan_masks = ad7380_2x2_channel_scan_masks,
687694
.timing_specs = &ad7380_timing,
@@ -696,6 +703,7 @@ static const struct ad7380_chip_info ad7388_chip_info = {
696703
.num_simult_channels = 2,
697704
.supplies = ad7380_supplies,
698705
.num_supplies = ARRAY_SIZE(ad7380_supplies),
706+
.internal_ref_mv = AD7380_INTERNAL_REF_MV,
699707
.has_mux = true,
700708
.available_scan_masks = ad7380_2x2_channel_scan_masks,
701709
.timing_specs = &ad7380_timing,
@@ -724,6 +732,7 @@ static const struct ad7380_chip_info ad7381_4_chip_info = {
724732
.num_simult_channels = 4,
725733
.supplies = ad7380_supplies,
726734
.num_supplies = ARRAY_SIZE(ad7380_supplies),
735+
.internal_ref_mv = AD7380_INTERNAL_REF_MV,
727736
.available_scan_masks = ad7380_4_channel_scan_masks,
728737
.timing_specs = &ad7380_4_timing,
729738
.max_conversion_rate_hz = 4 * MEGA,
@@ -737,6 +746,7 @@ static const struct ad7380_chip_info ad7383_4_chip_info = {
737746
.num_simult_channels = 4,
738747
.supplies = ad7380_supplies,
739748
.num_supplies = ARRAY_SIZE(ad7380_supplies),
749+
.internal_ref_mv = AD7380_INTERNAL_REF_MV,
740750
.vcm_supplies = ad7380_4_channel_vcm_supplies,
741751
.num_vcm_supplies = ARRAY_SIZE(ad7380_4_channel_vcm_supplies),
742752
.available_scan_masks = ad7380_4_channel_scan_masks,
@@ -752,6 +762,7 @@ static const struct ad7380_chip_info ad7384_4_chip_info = {
752762
.num_simult_channels = 4,
753763
.supplies = ad7380_supplies,
754764
.num_supplies = ARRAY_SIZE(ad7380_supplies),
765+
.internal_ref_mv = AD7380_INTERNAL_REF_MV,
755766
.vcm_supplies = ad7380_4_channel_vcm_supplies,
756767
.num_vcm_supplies = ARRAY_SIZE(ad7380_4_channel_vcm_supplies),
757768
.available_scan_masks = ad7380_4_channel_scan_masks,
@@ -767,6 +778,7 @@ static const struct ad7380_chip_info ad7386_4_chip_info = {
767778
.num_simult_channels = 4,
768779
.supplies = ad7380_supplies,
769780
.num_supplies = ARRAY_SIZE(ad7380_supplies),
781+
.internal_ref_mv = AD7380_INTERNAL_REF_MV,
770782
.has_mux = true,
771783
.available_scan_masks = ad7380_2x4_channel_scan_masks,
772784
.timing_specs = &ad7380_4_timing,
@@ -781,6 +793,7 @@ static const struct ad7380_chip_info ad7387_4_chip_info = {
781793
.num_simult_channels = 4,
782794
.supplies = ad7380_supplies,
783795
.num_supplies = ARRAY_SIZE(ad7380_supplies),
796+
.internal_ref_mv = AD7380_INTERNAL_REF_MV,
784797
.has_mux = true,
785798
.available_scan_masks = ad7380_2x4_channel_scan_masks,
786799
.timing_specs = &ad7380_4_timing,
@@ -795,6 +808,7 @@ static const struct ad7380_chip_info ad7388_4_chip_info = {
795808
.num_simult_channels = 4,
796809
.supplies = ad7380_supplies,
797810
.num_supplies = ARRAY_SIZE(ad7380_supplies),
811+
.internal_ref_mv = AD7380_INTERNAL_REF_MV,
798812
.has_mux = true,
799813
.available_scan_masks = ad7380_2x4_channel_scan_masks,
800814
.timing_specs = &ad7380_4_timing,
@@ -810,6 +824,7 @@ static const struct ad7380_chip_info adaq4370_4_chip_info = {
810824
.supplies = adaq4380_supplies,
811825
.num_supplies = ARRAY_SIZE(adaq4380_supplies),
812826
.internal_ref_only = true,
827+
.internal_ref_mv = ADAQ4380_INTERNAL_REF_MV,
813828
.has_hardware_gain = true,
814829
.available_scan_masks = ad7380_4_channel_scan_masks,
815830
.timing_specs = &ad7380_4_timing,
@@ -825,6 +840,7 @@ static const struct ad7380_chip_info adaq4380_4_chip_info = {
825840
.supplies = adaq4380_supplies,
826841
.num_supplies = ARRAY_SIZE(adaq4380_supplies),
827842
.internal_ref_only = true,
843+
.internal_ref_mv = ADAQ4380_INTERNAL_REF_MV,
828844
.has_hardware_gain = true,
829845
.available_scan_masks = ad7380_4_channel_scan_masks,
830846
.timing_specs = &ad7380_4_timing,
@@ -840,6 +856,7 @@ static const struct ad7380_chip_info adaq4381_4_chip_info = {
840856
.supplies = adaq4380_supplies,
841857
.num_supplies = ARRAY_SIZE(adaq4380_supplies),
842858
.internal_ref_only = true,
859+
.internal_ref_mv = ADAQ4380_INTERNAL_REF_MV,
843860
.has_hardware_gain = true,
844861
.available_scan_masks = ad7380_4_channel_scan_masks,
845862
.timing_specs = &ad7380_4_timing,
@@ -1910,7 +1927,7 @@ static int ad7380_probe(struct spi_device *spi)
19101927
* in bulk_get_enable().
19111928
*/
19121929

1913-
st->vref_mv = ADAQ4380_INTERNAL_REF_MV;
1930+
st->vref_mv = st->chip_info->internal_ref_mv;
19141931

19151932
/* these chips don't have a register bit for this */
19161933
external_ref_en = false;
@@ -1935,7 +1952,8 @@ static int ad7380_probe(struct spi_device *spi)
19351952
"Failed to get refio regulator\n");
19361953

19371954
external_ref_en = ret != -ENODEV;
1938-
st->vref_mv = external_ref_en ? ret / 1000 : AD7380_INTERNAL_REF_MV;
1955+
st->vref_mv = external_ref_en ? ret / 1000
1956+
: st->chip_info->internal_ref_mv;
19391957
}
19401958

19411959
if (st->chip_info->num_vcm_supplies > ARRAY_SIZE(st->vcm_mv))

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