mtd: spi-nor: Fix RX tuning failure for OSPI flashes connected in stacked mode

RX tuning failure was observed when two OSPI flashes connected in stacked
were operating in DDR mode. In 'commit e246f0d ("mtd: spi-nor: Add
stacked mode support for OSPI flash parts")' for stacked mode the RX tuning
will get triggered only for one flash i.e., when the upper flash is set to
OCTAL DDR mode, the RX truing is not triggered for the lower flash.
The current implementation doesn't set the upper flash to DDR, it only sets
the lower flash to DRR mode, as a result the RX tuning is never triggered
and flash read/write failure are observed. Update spi_nor_set_octal_dtr()
to set both the flashes to DDR mode and fix flash read/write failures.

Segmentation error were observed while performing erase/read/write
operation at the upper boundary of the upper flash. Updated die crossover
logic in erase/read/write APIs to fix the issue. 

Fixes: c376310 ("mtd: spi-nor: Add stacked memories support in spi-nor")
Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com>

Author: Amit Kumar Mahapatra

drivers/mtd/spi-nor/core.c

@@ -2096,7 +2096,8 @@ static int spi_nor_erase(struct mtd_info *mtd, struct erase_info *instr)
 			/*
 			 * Flash cross over condition in stacked mode.
 			 */
-			if ((nor->flags & SNOR_F_HAS_STACKED) && (addr > sz - 1)) {
+			if ((nor->flags & SNOR_F_HAS_STACKED) && (addr > sz - 1) &&
+			    (cur_cs_num != n_flash - 1)) {
 				cur_cs_num++;
 				params = spi_nor_get_params(nor, cur_cs_num);
 				sz += params->size;
@@ -2517,7 +2518,8 @@ static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len,
 		 * Flash cross over condition in stacked mode.
 		 *
 		 */
-		if ((nor->flags & SNOR_F_HAS_STACKED) && (from > sz - 1)) {
+		if ((nor->flags & SNOR_F_HAS_STACKED) && (from > sz - 1) &&
+		    (cur_cs_num != n_flash - 1)) {
 			cur_cs_num++;
 			params = spi_nor_get_params(nor, cur_cs_num);
 			sz += params->size;
@@ -2705,7 +2707,8 @@ static int spi_nor_write(struct mtd_info *mtd, loff_t to, size_t len,
 		/*
 		 * Flash cross over condition in stacked mode.
 		 */
-		if ((nor->flags & SNOR_F_HAS_STACKED) && ((to + i) > sz - 1)) {
+		if ((nor->flags & SNOR_F_HAS_STACKED) && ((to + i) > sz - 1) &&
+		    (cur_cs_num != n_flash - 1)) {
 			cur_cs_num++;
 			params = spi_nor_get_params(nor, cur_cs_num);
 			sz += params->size;
@@ -3776,7 +3779,7 @@ static int spi_nor_init_params(struct spi_nor *nor)
 static int spi_nor_set_octal_dtr(struct spi_nor *nor, bool enable)
 {
 	struct spi_nor_flash_parameter *params = spi_nor_get_params(nor, 0);
-	int ret;
+	int ret, idx, num_flash = 1;
 
 	if (!params->set_octal_dtr)
 		return 0;
@@ -3788,10 +3791,22 @@ static int spi_nor_set_octal_dtr(struct spi_nor *nor, bool enable)
 	if (!(nor->flags & SNOR_F_IO_MODE_EN_VOLATILE))
 		return 0;
 
-	ret = params->set_octal_dtr(nor, enable);
-	if (ret)
-		return ret;
+	if (nor->flags & SNOR_F_HAS_STACKED)
+		num_flash = nor->num_flash;
+
+	for (idx = 0; idx < num_flash; idx++) {
+		params = spi_nor_get_params(nor, idx);
+		/*
+		 * Select the appropriate CS index before
+		 * issuing the command.
+		 */
+		nor->spimem->spi->cs_index_mask = 1 << idx;
+		ret = params->set_octal_dtr(nor, enable);
+		if (ret)
+			return ret;
+	}
 
+	nor->spimem->spi->cs_index_mask = 1;
 	if (enable)
 		nor->reg_proto = SNOR_PROTO_8_8_8_DTR;
 	else