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machschmitt
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iio: adc: ad4170-4: Add GPIO controller support
The AD4170-4 has four multifunctional pins that can be used as GPIOs. The GPIO functionality can be accessed when the AD4170-4 chip is not busy performing continuous data capture or handling any other register read/write request. Also, the AD4170-4 does not provide any interrupt based on GPIO pin states so AD4170-4 GPIOs can't be used as interrupt sources. Implement gpio_chip callbacks to make AD4170-4 GPIO pins controllable through the gpiochip interface. Acked-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com> Link: https://patch.msgid.link/e5a5b33657df433ab2760a9c7f34c67d15b322d4.1751289747.git.marcelo.schmitt@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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‎drivers/iio/adc/Kconfig

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -92,6 +92,7 @@ config AD4170_4
9292
select IIO_BUFFER
9393
select IIO_TRIGGERED_BUFFER
9494
depends on COMMON_CLK
95+
depends on GPIOLIB
9596
help
9697
Say yes here to build support for Analog Devices AD4170-4 SPI analog
9798
to digital converters (ADC).

‎drivers/iio/adc/ad4170-4.c

Lines changed: 223 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -18,6 +18,7 @@
1818
#include <linux/delay.h>
1919
#include <linux/device.h>
2020
#include <linux/err.h>
21+
#include <linux/gpio/driver.h>
2122
#include <linux/iio/buffer.h>
2223
#include <linux/iio/iio.h>
2324
#include <linux/iio/trigger.h>
@@ -68,6 +69,9 @@
6869
#define AD4170_FILTER_FS_REG(x) (0xC7 + 14 * (x))
6970
#define AD4170_OFFSET_REG(x) (0xCA + 14 * (x))
7071
#define AD4170_GAIN_REG(x) (0xCD + 14 * (x))
72+
#define AD4170_GPIO_MODE_REG 0x191
73+
#define AD4170_GPIO_OUTPUT_REG 0x193
74+
#define AD4170_GPIO_INPUT_REG 0x195
7175
#define AD4170_ADC_CTRL_CONT_READ_EXIT_REG 0x200 /* virtual reg */
7276

7377
#define AD4170_REG_READ_MASK BIT(14)
@@ -106,6 +110,12 @@
106110
/* AD4170_FILTER_REG */
107111
#define AD4170_FILTER_FILTER_TYPE_MSK GENMASK(3, 0)
108112

113+
/* AD4170_GPIO_MODE_REG */
114+
#define AD4170_GPIO_MODE_GPIO0_MSK GENMASK(1, 0)
115+
#define AD4170_GPIO_MODE_GPIO1_MSK GENMASK(3, 2)
116+
#define AD4170_GPIO_MODE_GPIO2_MSK GENMASK(5, 4)
117+
#define AD4170_GPIO_MODE_GPIO3_MSK GENMASK(7, 6)
118+
109119
/* AD4170 register constants */
110120

111121
/* AD4170_CLOCK_CTRL_REG constants */
@@ -146,9 +156,14 @@
146156
#define AD4170_FILTER_FILTER_TYPE_SINC5 0x4
147157
#define AD4170_FILTER_FILTER_TYPE_SINC3 0x6
148158

159+
/* AD4170_GPIO_MODE_REG constants */
160+
#define AD4170_GPIO_MODE_GPIO_INPUT 1
161+
#define AD4170_GPIO_MODE_GPIO_OUTPUT 2
162+
149163
/* Device properties and auxiliary constants */
150164

151165
#define AD4170_NUM_ANALOG_PINS 9
166+
#define AD4170_NUM_GPIO_PINS 4
152167
#define AD4170_MAX_CHANNELS 16
153168
#define AD4170_MAX_ANALOG_PINS 8
154169
#define AD4170_MAX_SETUPS 8
@@ -176,6 +191,9 @@
176191

177192
#define AD4170_ADC_CTRL_CONT_READ_EXIT 0xA5
178193

194+
/* GPIO pin functions */
195+
#define AD4170_GPIO_UNASSIGNED 0x00
196+
179197
static const unsigned int ad4170_reg_size[] = {
180198
[AD4170_CONFIG_A_REG] = 1,
181199
[AD4170_DATA_24B_REG] = 3,
@@ -213,6 +231,9 @@ static const unsigned int ad4170_reg_size[] = {
213231
[AD4170_OFFSET_REG(5) ... AD4170_GAIN_REG(5)] = 3,
214232
[AD4170_OFFSET_REG(6) ... AD4170_GAIN_REG(6)] = 3,
215233
[AD4170_OFFSET_REG(7) ... AD4170_GAIN_REG(7)] = 3,
234+
[AD4170_GPIO_MODE_REG] = 2,
235+
[AD4170_GPIO_OUTPUT_REG] = 2,
236+
[AD4170_GPIO_INPUT_REG] = 2,
216237
[AD4170_ADC_CTRL_CONT_READ_EXIT_REG] = 0,
217238
};
218239

@@ -360,7 +381,9 @@ struct ad4170_state {
360381
unsigned int pins_fn[AD4170_NUM_ANALOG_PINS];
361382
u32 int_pin_sel;
362383
struct clk_hw int_clk_hw;
384+
struct gpio_chip gpiochip;
363385
unsigned int clock_ctrl;
386+
int gpio_fn[AD4170_NUM_GPIO_PINS];
364387
/*
365388
* DMA (thus cache coherency maintenance) requires the transfer buffers
366389
* to live in their own cache lines.
@@ -1466,6 +1489,194 @@ static int ad4170_soft_reset(struct ad4170_state *st)
14661489
return 0;
14671490
}
14681491

1492+
static int ad4170_gpio_get(struct gpio_chip *gc, unsigned int offset)
1493+
{
1494+
struct iio_dev *indio_dev = gpiochip_get_data(gc);
1495+
struct ad4170_state *st = iio_priv(indio_dev);
1496+
unsigned int val;
1497+
int ret;
1498+
1499+
if (!iio_device_claim_direct(indio_dev))
1500+
return -EBUSY;
1501+
1502+
ret = regmap_read(st->regmap, AD4170_GPIO_MODE_REG, &val);
1503+
if (ret)
1504+
goto err_release;
1505+
1506+
/*
1507+
* If the GPIO is configured as an input, read the current value from
1508+
* AD4170_GPIO_INPUT_REG. Otherwise, read the input value from
1509+
* AD4170_GPIO_OUTPUT_REG.
1510+
*/
1511+
if (val & BIT(offset * 2))
1512+
ret = regmap_read(st->regmap, AD4170_GPIO_INPUT_REG, &val);
1513+
else
1514+
ret = regmap_read(st->regmap, AD4170_GPIO_OUTPUT_REG, &val);
1515+
if (ret)
1516+
goto err_release;
1517+
1518+
ret = !!(val & BIT(offset));
1519+
err_release:
1520+
iio_device_release_direct(indio_dev);
1521+
1522+
return ret;
1523+
}
1524+
1525+
static int ad4170_gpio_set(struct gpio_chip *gc, unsigned int offset, int value)
1526+
{
1527+
struct iio_dev *indio_dev = gpiochip_get_data(gc);
1528+
struct ad4170_state *st = iio_priv(indio_dev);
1529+
int ret;
1530+
1531+
if (!iio_device_claim_direct(indio_dev))
1532+
return -EBUSY;
1533+
1534+
ret = regmap_assign_bits(st->regmap, AD4170_GPIO_OUTPUT_REG,
1535+
BIT(offset), !!value);
1536+
1537+
iio_device_release_direct(indio_dev);
1538+
return ret;
1539+
}
1540+
1541+
static int ad4170_gpio_get_direction(struct gpio_chip *gc, unsigned int offset)
1542+
{
1543+
struct iio_dev *indio_dev = gpiochip_get_data(gc);
1544+
struct ad4170_state *st = iio_priv(indio_dev);
1545+
unsigned int val;
1546+
int ret;
1547+
1548+
if (!iio_device_claim_direct(indio_dev))
1549+
return -EBUSY;
1550+
1551+
ret = regmap_read(st->regmap, AD4170_GPIO_MODE_REG, &val);
1552+
if (ret)
1553+
goto err_release;
1554+
1555+
if (val & BIT(offset * 2 + 1))
1556+
ret = GPIO_LINE_DIRECTION_OUT;
1557+
else
1558+
ret = GPIO_LINE_DIRECTION_IN;
1559+
1560+
err_release:
1561+
iio_device_release_direct(indio_dev);
1562+
1563+
return ret;
1564+
}
1565+
1566+
static int ad4170_gpio_direction_input(struct gpio_chip *gc, unsigned int offset)
1567+
{
1568+
struct iio_dev *indio_dev = gpiochip_get_data(gc);
1569+
struct ad4170_state *st = iio_priv(indio_dev);
1570+
unsigned long gpio_mask;
1571+
int ret;
1572+
1573+
if (!iio_device_claim_direct(indio_dev))
1574+
return -EBUSY;
1575+
1576+
switch (offset) {
1577+
case 0:
1578+
gpio_mask = AD4170_GPIO_MODE_GPIO0_MSK;
1579+
break;
1580+
case 1:
1581+
gpio_mask = AD4170_GPIO_MODE_GPIO1_MSK;
1582+
break;
1583+
case 2:
1584+
gpio_mask = AD4170_GPIO_MODE_GPIO2_MSK;
1585+
break;
1586+
case 3:
1587+
gpio_mask = AD4170_GPIO_MODE_GPIO3_MSK;
1588+
break;
1589+
default:
1590+
ret = -EINVAL;
1591+
goto err_release;
1592+
}
1593+
ret = regmap_update_bits(st->regmap, AD4170_GPIO_MODE_REG, gpio_mask,
1594+
AD4170_GPIO_MODE_GPIO_INPUT << (2 * offset));
1595+
1596+
err_release:
1597+
iio_device_release_direct(indio_dev);
1598+
1599+
return ret;
1600+
}
1601+
1602+
static int ad4170_gpio_direction_output(struct gpio_chip *gc,
1603+
unsigned int offset, int value)
1604+
{
1605+
struct iio_dev *indio_dev = gpiochip_get_data(gc);
1606+
struct ad4170_state *st = iio_priv(indio_dev);
1607+
unsigned long gpio_mask;
1608+
int ret;
1609+
1610+
ret = ad4170_gpio_set(gc, offset, value);
1611+
if (ret)
1612+
return ret;
1613+
1614+
if (!iio_device_claim_direct(indio_dev))
1615+
return -EBUSY;
1616+
1617+
switch (offset) {
1618+
case 0:
1619+
gpio_mask = AD4170_GPIO_MODE_GPIO0_MSK;
1620+
break;
1621+
case 1:
1622+
gpio_mask = AD4170_GPIO_MODE_GPIO1_MSK;
1623+
break;
1624+
case 2:
1625+
gpio_mask = AD4170_GPIO_MODE_GPIO2_MSK;
1626+
break;
1627+
case 3:
1628+
gpio_mask = AD4170_GPIO_MODE_GPIO3_MSK;
1629+
break;
1630+
default:
1631+
ret = -EINVAL;
1632+
goto err_release;
1633+
}
1634+
ret = regmap_update_bits(st->regmap, AD4170_GPIO_MODE_REG, gpio_mask,
1635+
AD4170_GPIO_MODE_GPIO_OUTPUT << (2 * offset));
1636+
1637+
err_release:
1638+
iio_device_release_direct(indio_dev);
1639+
1640+
return ret;
1641+
}
1642+
1643+
static int ad4170_gpio_init_valid_mask(struct gpio_chip *gc,
1644+
unsigned long *valid_mask,
1645+
unsigned int ngpios)
1646+
{
1647+
struct ad4170_state *st = gpiochip_get_data(gc);
1648+
unsigned int i;
1649+
1650+
/* Only expose GPIOs that were not assigned any other function. */
1651+
for (i = 0; i < ngpios; i++) {
1652+
bool valid = st->gpio_fn[i] == AD4170_GPIO_UNASSIGNED;
1653+
1654+
__assign_bit(i, valid_mask, valid);
1655+
}
1656+
1657+
return 0;
1658+
}
1659+
1660+
static int ad4170_gpio_init(struct iio_dev *indio_dev)
1661+
{
1662+
struct ad4170_state *st = iio_priv(indio_dev);
1663+
1664+
st->gpiochip.label = "ad4170_gpios";
1665+
st->gpiochip.base = -1;
1666+
st->gpiochip.ngpio = AD4170_NUM_GPIO_PINS;
1667+
st->gpiochip.parent = &st->spi->dev;
1668+
st->gpiochip.can_sleep = true;
1669+
st->gpiochip.init_valid_mask = ad4170_gpio_init_valid_mask;
1670+
st->gpiochip.get_direction = ad4170_gpio_get_direction;
1671+
st->gpiochip.direction_input = ad4170_gpio_direction_input;
1672+
st->gpiochip.direction_output = ad4170_gpio_direction_output;
1673+
st->gpiochip.get = ad4170_gpio_get;
1674+
st->gpiochip.set_rv = ad4170_gpio_set;
1675+
st->gpiochip.owner = THIS_MODULE;
1676+
1677+
return devm_gpiochip_add_data(&st->spi->dev, &st->gpiochip, indio_dev);
1678+
}
1679+
14691680
static int ad4170_parse_reference(struct ad4170_state *st,
14701681
struct fwnode_handle *child,
14711682
struct ad4170_setup *setup)
@@ -1794,7 +2005,18 @@ static int ad4170_parse_firmware(struct iio_dev *indio_dev)
17942005
if (ret)
17952006
return ret;
17962007

1797-
return ad4170_parse_channels(indio_dev);
2008+
ret = ad4170_parse_channels(indio_dev);
2009+
if (ret)
2010+
return ret;
2011+
2012+
/* Only create a GPIO chip if flagged for it */
2013+
if (device_property_read_bool(dev, "gpio-controller")) {
2014+
ret = ad4170_gpio_init(indio_dev);
2015+
if (ret)
2016+
return ret;
2017+
}
2018+
2019+
return 0;
17982020
}
17992021

18002022
static int ad4170_initial_config(struct iio_dev *indio_dev)

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