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| 1 | +// SPDX-License-Identifier: GPL-2.0 |
| 2 | +#include <dt-bindings/iio/frequency/hmc7044.h> |
| 3 | + |
| 4 | +&amba_pl { |
| 5 | + hmc7044_spi: spi@44a71000 { |
| 6 | + #address-cells = <1>; |
| 7 | + #size-cells = <0>; |
| 8 | + bits-per-word = <8>; |
| 9 | + compatible = "xlnx,axi-quad-spi-3.2", "xlnx,xps-spi-2.00.a"; |
| 10 | + fifo-size = <16>; |
| 11 | + interrupt-names = "ip2intc_irpt"; |
| 12 | + interrupt-parent = <&axi_intc>; |
| 13 | + interrupts = <7 0>; |
| 14 | + num-cs = <0x2>; |
| 15 | + reg = <0x44a71000 0x1000>; |
| 16 | + xlnx,num-ss-bits = <0x2>; |
| 17 | + xlnx,spi-mode = <0>; |
| 18 | + |
| 19 | + status = "okay"; |
| 20 | + |
| 21 | + hmc7044: hmc7044@0 { |
| 22 | + reg = <0>; |
| 23 | + #address-cells = <1>; |
| 24 | + #size-cells = <0>; |
| 25 | + #clock-cells = <1>; |
| 26 | + compatible = "adi,hmc7044"; |
| 27 | + spi-max-frequency = <10000000>; |
| 28 | + |
| 29 | + jesd204-device; |
| 30 | + #jesd204-cells = <2>; |
| 31 | + jesd204-sysref-provider; |
| 32 | + adi,jesd204-max-sysref-frequency-hz = <20000000>; |
| 33 | + |
| 34 | + adi,pll1-clkin-frequencies = <0 0 0 125000000>; |
| 35 | + adi,vcxo-frequency = <125000000>; |
| 36 | + |
| 37 | + adi,pll1-loop-bandwidth-hz = <200>; |
| 38 | + |
| 39 | + adi,pll2-output-frequency = <2500000000>; |
| 40 | + |
| 41 | + adi,sysref-timer-divider = <1024>; |
| 42 | + adi,pulse-generator-mode = <0>; |
| 43 | + |
| 44 | + adi,clkin3-buffer-mode = <0x15>; |
| 45 | + adi,oscin-buffer-mode = <0x15>; |
| 46 | + |
| 47 | + adi,gpi-controls = <0x00 0x00 0x00 0x00>; |
| 48 | + adi,gpo-controls = <0x1f 0x2b 0x33 0x37>; |
| 49 | + |
| 50 | + adi,oscillator-output-path-enable; |
| 51 | + |
| 52 | + adi,oscillator-output1-driver-enable; |
| 53 | + |
| 54 | + clock-output-names = |
| 55 | + "hmc7044_out0", "hmc7044_out1", "hmc7044_out2", |
| 56 | + "hmc7044_out3", "hmc7044_out4", "hmc7044_out5", |
| 57 | + "hmc7044_out6", "hmc7044_out7", "hmc7044_out8", |
| 58 | + "hmc7044_out9", "hmc7044_out10", "hmc7044_out11", |
| 59 | + "hmc7044_out12", "hmc7044_out13", "hmc7044_oscout1"; |
| 60 | + |
| 61 | + hmc7044_c1: channel@1 { |
| 62 | + reg = <1>; |
| 63 | + adi,extended-name = "ADC_SYSREF"; |
| 64 | + adi,divider = <128>; |
| 65 | + adi,driver-mode = <HMC7044_DRIVER_MODE_LVDS>; |
| 66 | + adi,jesd204-sysref-chan; |
| 67 | + }; |
| 68 | + hmc7044_c3: channel@3 { |
| 69 | + reg = <3>; |
| 70 | + adi,extended-name = "FMC_SYSREF"; |
| 71 | + adi,divider = <128>; |
| 72 | + adi,driver-mode = <HMC7044_DRIVER_MODE_LVDS>; |
| 73 | + adi,jesd204-sysref-chan; |
| 74 | + }; |
| 75 | + hmc7044_c4: channel@4 { |
| 76 | + reg = <4>; |
| 77 | + adi,extended-name = "CLKOUT_MMCX"; |
| 78 | + adi,divider = <8>; |
| 79 | + adi,driver-mode = <HMC7044_DRIVER_MODE_LVDS>; |
| 80 | + }; |
| 81 | + hmc7044_c5: channel@5 { |
| 82 | + reg = <5>; |
| 83 | + adi,extended-name = "FMC_CLK_COPY"; |
| 84 | + adi,divider = <8>; |
| 85 | + adi,driver-mode = <HMC7044_DRIVER_MODE_LVDS>; |
| 86 | + }; |
| 87 | + hmc7044_c7: channel@7 { |
| 88 | + reg = <7>; |
| 89 | + adi,extended-name = "FMC_REFCLK"; |
| 90 | + adi,divider = <4>; |
| 91 | + adi,driver-mode = <HMC7044_DRIVER_MODE_LVDS>; |
| 92 | + }; |
| 93 | + hmc7044_c9: channel@9 { |
| 94 | + reg = <9>; |
| 95 | + adi,extended-name = "FMC_REFCLK_COPY"; |
| 96 | + adi,divider = <4>; |
| 97 | + adi,driver-mode = <HMC7044_DRIVER_MODE_LVDS>; |
| 98 | + }; |
| 99 | + hmc7044_c11: channel@11 { |
| 100 | + reg = <11>; |
| 101 | + adi,extended-name = "CORE_CLK"; |
| 102 | + adi,divider = <8>; |
| 103 | + adi,driver-mode = <HMC7044_DRIVER_MODE_LVDS>; |
| 104 | + }; |
| 105 | + hmc7044_c14: channel@14 { |
| 106 | + reg = <14>; |
| 107 | + adi,extended-name = "ADF_CLK"; |
| 108 | + adi,divider = <1>; |
| 109 | + adi,driver-mode = <HMC7044_DRIVER_MODE_CMOS>; |
| 110 | + adi,driver-impedance-mode = <HMC7044_DRIVER_IMPEDANCE_100_OHM>; |
| 111 | + }; |
| 112 | + }; |
| 113 | + |
| 114 | + adf4371: adf4371@1 { |
| 115 | + compatible = "adi,adf4371"; |
| 116 | + reg = <1>; |
| 117 | + |
| 118 | + #address-cells = <1>; |
| 119 | + #clock-cells = <1>; |
| 120 | + #size-cells = <0>; |
| 121 | + |
| 122 | + jesd204-device; |
| 123 | + #jesd204-cells = <2>; |
| 124 | + jesd204-inputs = <&adc_ad9213 0 0>; |
| 125 | + |
| 126 | + spi-max-frequency = <10000000>; |
| 127 | + adi,spi-3wire-enable; |
| 128 | + adi,muxout-select = <1>; |
| 129 | + clocks = <&hmc7044 14>; |
| 130 | + clock-names = "clkin"; |
| 131 | + clock-output-names = "pll0-clk-rf8", "pll0-clk-rfaux8", |
| 132 | + "pll0-clk-rf16", "pll0-clk-rf32"; |
| 133 | + |
| 134 | + channel@2 { |
| 135 | + reg = <2>; |
| 136 | + adi,output-enable; |
| 137 | + adi,power-up-frequency = /bits/ 64 <10000000000>; |
| 138 | + }; |
| 139 | + }; |
| 140 | + }; |
| 141 | + |
| 142 | + axi_spi: spi@44a70000 { |
| 143 | + status = "okay"; |
| 144 | + |
| 145 | + adc_ad9213: ad9213@0 { |
| 146 | + compatible = "adi,ad9213"; |
| 147 | + reg = <0>; |
| 148 | + #address-cells = <1>; |
| 149 | + #size-cells = <0>; |
| 150 | + spi-max-frequency = <10000000>; |
| 151 | + |
| 152 | + jesd204-device; |
| 153 | + #jesd204-cells = <2>; |
| 154 | + jesd204-top-device = <0>; /* This is the TOP device */ |
| 155 | + jesd204-link-ids = <0>; |
| 156 | + jesd204-inputs = <&axi_ad9213_jesd_rx 0 0>; |
| 157 | + |
| 158 | + adi,adc-frequency-hz = /bits/ 64 <10000000000>; |
| 159 | + adi,octets-per-frame = <2>; |
| 160 | + adi,frames-per-multiframe = <32>; |
| 161 | + adi,converter-resolution = <16>; |
| 162 | + adi,bits-per-sample = <16>; |
| 163 | + adi,converters-per-device = <1>; |
| 164 | + adi,control-bits-per-sample = <0>; |
| 165 | + adi,lanes-per-device = <16>; |
| 166 | + adi,subclass = <1>; |
| 167 | + |
| 168 | + io-backends = <&iio_backend>; |
| 169 | + }; |
| 170 | + }; |
| 171 | +}; |
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