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iio: adc: ad7768-1: add multiple scan types to support 16-bits mode
When the device is configured to Sinc5 filter and decimation x8, output data is reduced to 16-bits in order to support 1 MHz of sampling frequency due to clock limitation. Use multiple scan types feature to enable the driver to switch scan type in runtime, making possible to support both 24-bit and 16-bit resolution. Signed-off-by: Jonathan Santos <Jonathan.Santos@analog.com>
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drivers/iio/adc/ad7768-1.c

Lines changed: 74 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -157,6 +157,19 @@ enum ad7768_dec_rate {
157157
AD7768_DEC_RATE_16 = 10
158158
};
159159

160+
enum ad7768_scan_type {
161+
AD7768_SCAN_TYPE_DMA_NORMAL,
162+
AD7768_SCAN_TYPE_DMA_HIGH_SPEED,
163+
AD7768_SCAN_TYPE_NORMAL,
164+
AD7768_SCAN_TYPE_HIGH_SPEED,
165+
};
166+
167+
struct ad7768_clk_configuration {
168+
enum ad7768_mclk_div mclk_div;
169+
enum ad7768_dec_rate dec_rate;
170+
unsigned int clk_div;
171+
};
172+
160173
static const char * const ad7768_vcm_modes[] = {
161174
"(AVDD1-AVSS)/2",
162175
"2V5",
@@ -180,6 +193,33 @@ static const int sinc3_dec_rate_max_values[4] = {
180193
20480, 40960, 81920, 163840,
181194
};
182195

196+
static const struct iio_scan_type ad7768_scan_type[] = {
197+
[AD7768_SCAN_TYPE_NORMAL] = {
198+
.sign = 's',
199+
.realbits = 24,
200+
.storagebits = 32,
201+
.endianness = IIO_BE,
202+
},
203+
[AD7768_SCAN_TYPE_HIGH_SPEED] = {
204+
.sign = 's',
205+
.realbits = 16,
206+
.storagebits = 32,
207+
.endianness = IIO_BE,
208+
},
209+
[AD7768_SCAN_TYPE_DMA_NORMAL] = {
210+
.sign = 's',
211+
.realbits = 24,
212+
.storagebits = 32,
213+
.endianness = IIO_CPU,
214+
},
215+
[AD7768_SCAN_TYPE_DMA_HIGH_SPEED] = {
216+
.sign = 's',
217+
.realbits = 16,
218+
.storagebits = 32,
219+
.endianness = IIO_CPU,
220+
},
221+
};
222+
183223
static const char * const ad7768_filter_enum[] = {
184224
[SINC5] = "sinc5",
185225
[SINC3] = "sinc3",
@@ -242,12 +282,9 @@ static const struct iio_chan_spec ad7768_channels[] = {
242282
.indexed = 1,
243283
.channel = 0,
244284
.scan_index = 0,
245-
.scan_type = {
246-
.sign = 's',
247-
.realbits = 24,
248-
.storagebits = 32,
249-
.shift = 8,
250-
},
285+
.has_ext_scan_type = 1,
286+
.ext_scan_type = ad7768_scan_type,
287+
.num_ext_scan_type = ARRAY_SIZE(ad7768_scan_type),
251288
},
252289
};
253290

@@ -421,6 +458,9 @@ static int ad7768_scan_direct(struct iio_dev *indio_dev)
421458
ret = ad7768_spi_reg_read(st, AD7768_REG_ADC_DATA, &readval, 3);
422459
if (ret < 0)
423460
return ret;
461+
462+
if (st->filter_mode == SINC5_DEC_X8)
463+
readval = readval >> 8;
424464
/*
425465
* Any SPI configuration of the AD7768-1 can only be
426466
* performed in continuous conversion mode.
@@ -898,8 +938,13 @@ static int ad7768_read_raw(struct iio_dev *indio_dev,
898938
int *val, int *val2, long info)
899939
{
900940
struct ad7768_state *st = iio_priv(indio_dev);
941+
const struct iio_scan_type *scan_type;
901942
int scale_uv, ret;
902943

944+
scan_type = iio_get_current_scan_type(indio_dev, chan);
945+
if (IS_ERR(scan_type))
946+
return PTR_ERR(scan_type);
947+
903948
switch (info) {
904949
case IIO_CHAN_INFO_RAW:
905950
ret = iio_device_claim_direct_mode(indio_dev);
@@ -908,7 +953,7 @@ static int ad7768_read_raw(struct iio_dev *indio_dev,
908953

909954
ret = ad7768_scan_direct(indio_dev);
910955
if (ret >= 0)
911-
*val = sign_extend32(ret, chan->scan_type.realbits - 1);
956+
*val = sign_extend32(ret, scan_type->realbits - 1);
912957

913958
iio_device_release_direct_mode(indio_dev);
914959
if (ret < 0)
@@ -922,7 +967,7 @@ static int ad7768_read_raw(struct iio_dev *indio_dev,
922967
return scale_uv;
923968

924969
*val = (scale_uv * 2) / 1000;
925-
*val2 = chan->scan_type.realbits;
970+
*val2 = scan_type->realbits;
926971

927972
return IIO_VAL_FRACTIONAL_LOG2;
928973

@@ -967,11 +1012,25 @@ static const struct attribute_group ad7768_group = {
9671012
.attrs = ad7768_attributes,
9681013
};
9691014

1015+
static int ad7768_get_current_scan_type(const struct iio_dev *indio_dev,
1016+
const struct iio_chan_spec *chan)
1017+
{
1018+
struct ad7768_state *st = iio_priv(indio_dev);
1019+
1020+
if (st->spi_is_dma_mapped)
1021+
return st->filter_mode == SINC5_DEC_X8 ? AD7768_SCAN_TYPE_DMA_HIGH_SPEED :
1022+
AD7768_SCAN_TYPE_DMA_NORMAL;
1023+
else
1024+
return st->filter_mode == SINC5_DEC_X8 ? AD7768_SCAN_TYPE_HIGH_SPEED :
1025+
AD7768_SCAN_TYPE_NORMAL;
1026+
}
1027+
9701028
static const struct iio_info ad7768_info = {
9711029
.attrs = &ad7768_group,
9721030
.read_raw = &ad7768_read_raw,
9731031
.write_raw = &ad7768_write_raw,
9741032
.read_label = ad7768_read_label,
1033+
.get_current_scan_type = &ad7768_get_current_scan_type,
9751034
.debugfs_reg_access = &ad7768_reg_access,
9761035
};
9771036

@@ -1077,15 +1136,21 @@ static irqreturn_t ad7768_interrupt(int irq, void *dev_id)
10771136
static int ad7768_buffer_postenable(struct iio_dev *indio_dev)
10781137
{
10791138
struct ad7768_state *st = iio_priv(indio_dev);
1139+
const struct iio_scan_type *scan_type;
10801140
struct spi_transfer xfer = {
10811141
.len = 1,
1082-
.bits_per_word = 32
10831142
};
10841143
unsigned int rx_data[2];
10851144
unsigned int tx_data[2];
10861145
struct spi_message msg;
10871146
int ret;
10881147

1148+
scan_type = iio_get_current_scan_type(indio_dev, &indio_dev->channels[0]);
1149+
if (IS_ERR(scan_type))
1150+
return PTR_ERR(scan_type);
1151+
1152+
xfer.bits_per_word = scan_type->realbits;
1153+
10891154
/*
10901155
* Write a 1 to the LSB of the INTERFACE_FORMAT register to enter
10911156
* continuous read mode. Subsequent data reads do not require an

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