diff --git a/docs/user_guide/ip_cores/creating_new_ip.rst b/docs/user_guide/ip_cores/creating_new_ip.rst
index 2f999dc39e2..5245e0f8211 100644
--- a/docs/user_guide/ip_cores/creating_new_ip.rst
+++ b/docs/user_guide/ip_cores/creating_new_ip.rst
@@ -13,7 +13,7 @@ and ``axi_led_control_intel`` for Intel.
 Verilog File
 --------------------------------------------------------------------------------
 
-Lets say you want to make a new IP with the name ``<module_name>``.
+Let's say you want to make a new IP with the name ``<module_name>``.
 You must edit the verilog file so that it has the same name (e.g. ``axi_led_control.v``).
 After that, feel free to write the verilog code for your purpose.
 You can also use other instances of modules, but be sure to include them after,
@@ -177,9 +177,9 @@ Examples:
 Importing with Using Method
 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 
-The ``USING`` method allows to look-up a register map to import register and
+The ``USING`` method allows looking up a register map to import register and
 fields.
-A register map can look-up multiple register maps by repeating the method for
+A register map can look up multiple register maps by repeating the method for
 each register map, for example:
 
 .. code::
@@ -235,7 +235,7 @@ Some considerations:
 
 * Imported registers shall have non-imported fields, for example, when importing
   a register that is reserved for custom implementation.
-* Imported fields must be inside a imported register, since the field name is not
+* Imported fields must be inside an imported register, since the field name is not
   unique.
 * Multiple fields can be imported from a single ``FIELD`` group.
 * Multiple register maps can be used for lookup. Add each in a different ``USING``
@@ -287,6 +287,32 @@ use the generic adc/dac templates that include all available registers:
 * :git-hdl:`docs/regmap/adi_regmap_axi_adc_template.txt`
 * :git-hdl:`docs/regmap/adi_regmap_axi_dac_template.txt`
 
+Versioning
+--------------------------------------------------------------------------------
+
+IP cores versions should follow `Semantic Versioning <https://semver.org/>`
+``v<major>.<minor>.<patch>`` format.
+A fix increases the patch number, a feature the minor number, and a breaking
+change the major number. The first stable release version should be higher or
+equal to v1.0.0.
+
+Device tree compatible take the major number prefixed by ``v``, for example,
+for *axi_my_ip* v1.2.3, the *compatible* is *adi,axi-my-ip-v1* and the
+*dt-binding* filename is *adi,axi-my-ip.yaml* (no major suffix). Per the last
+paragraph, *adi,axi-my-ip-v0* is **never** appropriate. Software drivers parse
+the ``VERSION`` register for feature handling across versions. The patch number
+shouldn't have to be handled by software drivers, if it seems necessary to,
+consider incrementing the minor number instead.
+
+Due to AMD Xilinx old default IP core version, many IP cores bindings start at
+1.00.a. For compatibility, the patch value is kept, but should be treated as
+decimal instead of character.
+
+The IP-XACT version must have the format ``<major>.<minor>.<patch>``, e.g.
+``1.2.3`` (**no** ``v`` prefix). To set the IP-XACT version based on the
+``CORE_VERSION`` parameter, use the ``set_ip_version_from_file`` method
+(prefixed by each vendor format), passing the file that defines the parameter.
+
 Xilinx
 --------------------------------------------------------------------------------
 
@@ -813,7 +839,7 @@ trying to simulate most of the available options when creating a new IP.
 
       # Generating the IP given as first parameter on the path given as the second
       # parameter. Without the second parameter the IP will be generated in
-      # ./ltt directory and  in the default IP download directory of
+      # ./ltt directory and in the default IP download directory of
       # Lattice Propel Builder (~/PropelIPLocal) if the LATTICE_DEFAULT_PATHS
       # env variable is exported like:
       # 'export LATTICE_DEFAULT_PATHS=1' before running the script or running make.
diff --git a/library/axi_clkgen/axi_clkgen_ip.tcl b/library/axi_clkgen/axi_clkgen_ip.tcl
index 747eb0ff07b..eeff345e9df 100644
--- a/library/axi_clkgen/axi_clkgen_ip.tcl
+++ b/library/axi_clkgen/axi_clkgen_ip.tcl
@@ -23,6 +23,7 @@ set_property used_in_synthesis false [get_files ./bd/bd.tcl]
 set_property used_in_synthesis false [get_files $ad_hdl_dir/library/scripts/adi_xilinx_device_info_enc.tcl]
 
 adi_ip_properties axi_clkgen
+adi_set_ip_version_from_file "$ad_hdl_dir/library/common/up_clkgen.v"
 adi_ip_bd axi_clkgen "bd/bd.tcl"
 
 set_property company_url {https://wiki.analog.com/resources/fpga/docs/axi_clkgen} [ipx::current_core]
diff --git a/library/axi_clock_monitor/axi_clock_monitor.v b/library/axi_clock_monitor/axi_clock_monitor.v
index 54fcd8f64f6..aaa24c213e3 100755
--- a/library/axi_clock_monitor/axi_clock_monitor.v
+++ b/library/axi_clock_monitor/axi_clock_monitor.v
@@ -91,7 +91,9 @@ module axi_clock_monitor #(
 
   // local parameters
 
-  localparam  PCORE_VERSION = 1;
+  localparam [31:0] CORE_VERSION = {16'h0000,     /* MAJOR */
+                                     8'h00,       /* MINOR */
+                                     8'h01};      /* PATCH */
   localparam [7:0] DIV_VALUE = (DIV_RATE == 4'd1) ? "1" :
                                (DIV_RATE == 4'd2) ? "2" :
                                (DIV_RATE == 4'd3) ? "3" :
@@ -192,7 +194,7 @@ module axi_clock_monitor #(
       if (up_rreq_s == 1'b1) begin
         case (up_raddr_i_s[4:0])
           /* Standard registers */
-          5'h00: up_rdata_int <= PCORE_VERSION;
+          5'h00: up_rdata_int <= CORE_VERSION;
           5'h01: up_rdata_int <= ID;
 
           /* Core configuration */
diff --git a/library/axi_clock_monitor/axi_clock_monitor_hw.tcl b/library/axi_clock_monitor/axi_clock_monitor_hw.tcl
index ebd5bfdd274..55f9c497171 100755
--- a/library/axi_clock_monitor/axi_clock_monitor_hw.tcl
+++ b/library/axi_clock_monitor/axi_clock_monitor_hw.tcl
@@ -19,6 +19,7 @@ ad_ip_files axi_clock_monitor [list \
   $ad_hdl_dir/library/intel/common/up_rst_constr.sdc \
   axi_clock_monitor.v \
 ]
+ad_set_ip_version_from_file "axi_clock_monitor.v"
 
 # parameters
 
diff --git a/library/axi_clock_monitor/axi_clock_monitor_ip.tcl b/library/axi_clock_monitor/axi_clock_monitor_ip.tcl
index 6246922a073..34227378d17 100755
--- a/library/axi_clock_monitor/axi_clock_monitor_ip.tcl
+++ b/library/axi_clock_monitor/axi_clock_monitor_ip.tcl
@@ -15,6 +15,7 @@ adi_ip_files axi_clock_monitor [list \
   "axi_clock_monitor.v" ]
 
 adi_ip_properties axi_clock_monitor
+adi_set_ip_version_from_file "axi_clock_monitor.v"
 
 set cc [ipx::current_core]
 set_property display_name {AXI Clock Monitor} $cc
diff --git a/library/axi_clock_monitor/axi_clock_monitor_ltt.tcl b/library/axi_clock_monitor/axi_clock_monitor_ltt.tcl
index 781ed7e37b9..f60b61103bd 100755
--- a/library/axi_clock_monitor/axi_clock_monitor_ltt.tcl
+++ b/library/axi_clock_monitor/axi_clock_monitor_ltt.tcl
@@ -10,9 +10,10 @@ set mod_data [ipl::parse_module ./axi_clock_monitor.v]
 set ip $::ipl::ip
 
 set ip [ipl::add_ports_from_module -ip $ip -mod_data $mod_data]
+set version [ipl::set_ip_version_from_file -file "axi_clock_monitor.v"]
 
 set ip [ipl::general \
-    -vlnv "analog.com:ip:axi_clock_monitor:1.0" \
+    -vlnv "analog.com:ip:axi_clock_monitor:$version" \
     -display_name "ADI AXI clock monitor" \
     -supported_products {*} \
     -supported_platforms {esi radiant} \
diff --git a/library/axi_dmac/axi_dmac_hw.tcl b/library/axi_dmac/axi_dmac_hw.tcl
index e4e6e9100ac..ac80e40f657 100644
--- a/library/axi_dmac/axi_dmac_hw.tcl
+++ b/library/axi_dmac/axi_dmac_hw.tcl
@@ -56,6 +56,7 @@ ad_ip_files axi_dmac [list \
   axi_dmac.v \
   axi_dmac_constr.sdc \
 ]
+ad_set_ip_version_from_file "axi_dmac_regmap.v"
 
 # Disable dual-clock RAM read-during-write behaviour warning.
 set_qip_strings { "set_instance_assignment -name MESSAGE_DISABLE 276027 -entity axi_dmac_burst_memory" }
diff --git a/library/axi_dmac/axi_dmac_ip.tcl b/library/axi_dmac/axi_dmac_ip.tcl
index e64913c1a1b..09ac1f25e87 100644
--- a/library/axi_dmac/axi_dmac_ip.tcl
+++ b/library/axi_dmac/axi_dmac_ip.tcl
@@ -54,6 +54,7 @@ adi_ip_infer_mm_interfaces axi_dmac
 adi_ip_ttcl axi_dmac "axi_dmac_constr.ttcl"
 adi_ip_sim_ttcl axi_dmac "axi_dmac_pkg_sv.ttcl"
 adi_ip_bd axi_dmac "bd/bd.tcl"
+adi_set_ip_version_from_file "axi_dmac_regmap.v"
 
 set_property company_url {https://wiki.analog.com/resources/fpga/docs/axi_dmac} [ipx::current_core]
 
diff --git a/library/axi_dmac/axi_dmac_ltt.tcl b/library/axi_dmac/axi_dmac_ltt.tcl
index 4a318636900..ccc65e55eff 100755
--- a/library/axi_dmac/axi_dmac_ltt.tcl
+++ b/library/axi_dmac/axi_dmac_ltt.tcl
@@ -15,8 +15,9 @@ set ip [ipl::general -ip $ip -display_name "AXI_DMA ADI"]
 set ip [ipl::general -ip $ip -supported_products {*}]
 set ip [ipl::general -ip $ip -supported_platforms {esi radiant}]
 set ip [ipl::general -ip $ip -href "https://analogdevicesinc.github.io/hdl/library/axi_dmac/index.html"]
+set version [ipl::set_ip_version_from_file -file "axi_dmac_regmap.v"]
 set ip [ipl::general \
-    -vlnv "analog.com:ip:axi_dmac:1.0" \
+    -vlnv "analog.com:ip:axi_dmac:$version" \
     -category "ADI" \
     -keywords "ADI IP" \
     -min_radiant_version "2023.2" \
diff --git a/library/axi_dmac/axi_dmac_regmap.v b/library/axi_dmac/axi_dmac_regmap.v
index 0e812d64b94..46b803daf77 100644
--- a/library/axi_dmac/axi_dmac_regmap.v
+++ b/library/axi_dmac/axi_dmac_regmap.v
@@ -147,7 +147,9 @@ module axi_dmac_regmap #(
   input [31:0] dbg_ids1
 );
 
-  localparam PCORE_VERSION = 'h00040564;
+  localparam [31:0] CORE_VERSION = {16'h0004,     /* MAJOR */
+                                     8'h05,       /* MINOR */
+                                     8'h64};      /* PATCH */
   localparam HAS_ADDR_HIGH = DMA_AXI_ADDR_WIDTH > 32;
   localparam ADDR_LOW_MSB = HAS_ADDR_HIGH ? 31 : DMA_AXI_ADDR_WIDTH-1;
 
@@ -245,7 +247,7 @@ module axi_dmac_regmap #(
   always @(posedge s_axi_aclk) begin
     if (up_rreq == 1'b1) begin
       case (up_raddr)
-      9'h000: up_rdata <= PCORE_VERSION;
+      9'h000: up_rdata <= CORE_VERSION;
       9'h001: up_rdata <= ID;
       9'h002: up_rdata <= up_scratch;
       9'h003: up_rdata <= 32'h444d4143; // "DMAC"
diff --git a/library/axi_fan_control/axi_fan_control.v b/library/axi_fan_control/axi_fan_control.v
index d5b668c06ea..334a774af43 100644
--- a/library/axi_fan_control/axi_fan_control.v
+++ b/library/axi_fan_control/axi_fan_control.v
@@ -87,7 +87,7 @@ module axi_fan_control #(
   //local parameters
   localparam [31:0] CORE_VERSION            = {16'h0001,     /* MAJOR */
                                                 8'h00,       /* MINOR */
-                                                8'h61};      /* PATCH */ // 0.0.0
+                                                8'h61};      /* PATCH */
   localparam [31:0] CORE_MAGIC              = 32'h46414E43;    // FANC
 
   localparam        CLK_FREQUENCY           = 100000000;
diff --git a/library/axi_fmcadc5_sync/axi_fmcadc5_sync.v b/library/axi_fmcadc5_sync/axi_fmcadc5_sync.v
index ed2e95704c1..472835ae688 100644
--- a/library/axi_fmcadc5_sync/axi_fmcadc5_sync.v
+++ b/library/axi_fmcadc5_sync/axi_fmcadc5_sync.v
@@ -117,7 +117,9 @@ module axi_fmcadc5_sync #(
 
   // version
 
-  localparam  [31:0]  PCORE_VERSION = 32'h00040063;
+  localparam [31:0] CORE_VERSION = {16'h0004,     /* MAJOR */
+                                     8'h00,       /* MINOR */
+                                     8'h63};      /* PATCH */
 
   // internal registers
 
diff --git a/library/axi_fmcadc5_sync/axi_fmcadc5_sync_ip.tcl b/library/axi_fmcadc5_sync/axi_fmcadc5_sync_ip.tcl
index 11ba4c2bc0e..95dc72a4019 100644
--- a/library/axi_fmcadc5_sync/axi_fmcadc5_sync_ip.tcl
+++ b/library/axi_fmcadc5_sync/axi_fmcadc5_sync_ip.tcl
@@ -17,6 +17,7 @@ adi_ip_files axi_fmcadc5_sync [list \
   "axi_fmcadc5_sync.v" ]
 
 adi_ip_properties axi_fmcadc5_sync
+adi_set_ip_version_from_file "axi_fmcadc5_sync.v"
 
 adi_init_bd_tcl
 adi_ip_bd axi_fmcadc5_sync "bd/bd.tcl"
diff --git a/library/axi_gpreg/axi_gpreg.v b/library/axi_gpreg/axi_gpreg.v
index 71ae7a35179..ef719ea3905 100644
--- a/library/axi_gpreg/axi_gpreg.v
+++ b/library/axi_gpreg/axi_gpreg.v
@@ -115,7 +115,9 @@ module axi_gpreg #(
 
   // version
 
-  localparam  [31:0]  PCORE_VERSION = 32'h00040063;
+  localparam [31:0] CORE_VERSION = {16'h0004,     /* MAJOR */
+                                     8'h00,       /* MINOR */
+                                     8'h63};      /* PATCH */
   localparam  integer BUF_ENABLE[7:0] = {BUF_ENABLE_7, BUF_ENABLE_6, BUF_ENABLE_5, BUF_ENABLE_4,
     BUF_ENABLE_3, BUF_ENABLE_2, BUF_ENABLE_1, BUF_ENABLE_0};
 
diff --git a/library/axi_gpreg/axi_gpreg_ip.tcl b/library/axi_gpreg/axi_gpreg_ip.tcl
index 8ca8881ff90..ccae6eb7ce1 100644
--- a/library/axi_gpreg/axi_gpreg_ip.tcl
+++ b/library/axi_gpreg/axi_gpreg_ip.tcl
@@ -21,6 +21,7 @@ adi_ip_files axi_gpreg [list \
 set_property FILE_TYPE SystemVerilog [get_files "axi_gpreg.v"]
 
 adi_ip_properties axi_gpreg
+adi_set_ip_version_from_file "axi_gpreg.v"
 adi_ip_ttcl axi_gpreg "axi_gpreg_constr.ttcl"
 
 set_property enablement_dependency {spirit:decode(id('MODELPARAM_VALUE.NUM_OF_IO')) > 0} \
diff --git a/library/axi_hdmi_rx/axi_hdmi_rx_ip.tcl b/library/axi_hdmi_rx/axi_hdmi_rx_ip.tcl
index 6fd3a71ccae..1b07d4b86ff 100644
--- a/library/axi_hdmi_rx/axi_hdmi_rx_ip.tcl
+++ b/library/axi_hdmi_rx/axi_hdmi_rx_ip.tcl
@@ -28,6 +28,7 @@ adi_ip_files axi_hdmi_rx [list \
   "axi_hdmi_rx_core.v" ]
 
 adi_ip_properties axi_hdmi_rx
+adi_set_ip_version_from_file "$ad_hdl_dir/library/common/up_hdmi_rx.v"
 
 set_property company_url {https://wiki.analog.com/resources/fpga/docs/axi_hdmi_rx} [ipx::current_core]
 
diff --git a/library/axi_hdmi_tx/axi_hdmi_tx_hw.tcl b/library/axi_hdmi_tx/axi_hdmi_tx_hw.tcl
index 8cd5e7e8904..6e28445d1b2 100644
--- a/library/axi_hdmi_tx/axi_hdmi_tx_hw.tcl
+++ b/library/axi_hdmi_tx/axi_hdmi_tx_hw.tcl
@@ -42,6 +42,7 @@ ad_ip_files axi_hdmi_tx [list \
   axi_hdmi_tx.v \
   axi_hdmi_tx_constr.sdc \
   ]
+ad_set_ip_version_from_file "$ad_hdl_dir/library/common/up_hdmi_tx.v"
 
 # parameters
 
diff --git a/library/axi_hdmi_tx/axi_hdmi_tx_ip.tcl b/library/axi_hdmi_tx/axi_hdmi_tx_ip.tcl
index 26345efdb5b..7a9781eb257 100644
--- a/library/axi_hdmi_tx/axi_hdmi_tx_ip.tcl
+++ b/library/axi_hdmi_tx/axi_hdmi_tx_ip.tcl
@@ -31,6 +31,7 @@ adi_ip_files axi_hdmi_tx [list \
   "axi_hdmi_tx.v" ]
 
 adi_ip_properties axi_hdmi_tx
+adi_set_ip_version_from_file "$ad_hdl_dir/library/common/up_hdmi_tx.v"
 
 adi_init_bd_tcl
 adi_ip_bd axi_hdmi_tx "bd/bd.tcl"
diff --git a/library/axi_intr_monitor/axi_intr_monitor.v b/library/axi_intr_monitor/axi_intr_monitor.v
index 087091e232f..21d22943f4e 100644
--- a/library/axi_intr_monitor/axi_intr_monitor.v
+++ b/library/axi_intr_monitor/axi_intr_monitor.v
@@ -63,7 +63,9 @@ module axi_intr_monitor (
   input   [ 2:0]  s_axi_arprot
 );
 
-  parameter VERSION = 32'h00010000;
+  localparam [31:0] CORE_VERSION = {16'h0001,     /* MAJOR */
+                                     8'h00,       /* MINOR */
+                                     8'h00};      /* PATCH */
 
   reg     [31:0]  up_rdata                    = 'd0;
   reg             up_wack                     = 'd0;
@@ -170,7 +172,7 @@ module axi_intr_monitor (
       up_rack <= up_rreq_s;
       if (up_rreq_s == 1'b1) begin
         case (up_raddr_s[3:0])
-          4'h0: up_rdata <= VERSION;
+          4'h0: up_rdata <= CORE_VERSION;
           4'h1: up_rdata <= scratch;
           4'h2: up_rdata <= control;
           4'h3: up_rdata <= {31'h0,interrupt};
diff --git a/library/axi_intr_monitor/axi_intr_monitor_ip.tcl b/library/axi_intr_monitor/axi_intr_monitor_ip.tcl
index ddeb4b200ee..ca45cdc7450 100644
--- a/library/axi_intr_monitor/axi_intr_monitor_ip.tcl
+++ b/library/axi_intr_monitor/axi_intr_monitor_ip.tcl
@@ -13,6 +13,7 @@ adi_ip_files axi_intr_monitor [list \
   "axi_intr_monitor.v" ]
 
 adi_ip_properties axi_intr_monitor
+adi_set_ip_version_from_file "axi_intr_monitor.v"
 
 ipx::infer_bus_interface irq xilinx.com:signal:interrupt_rtl:1.0 [ipx::current_core]
 
diff --git a/library/axi_laser_driver/axi_laser_driver.v b/library/axi_laser_driver/axi_laser_driver.v
index 1df9c4d717f..955dd4eaafd 100644
--- a/library/axi_laser_driver/axi_laser_driver.v
+++ b/library/axi_laser_driver/axi_laser_driver.v
@@ -124,7 +124,7 @@ module axi_laser_driver #(
 
   localparam [31:0] CORE_VERSION = {16'h0001,     /* MAJOR */
                                      8'h00,       /* MINOR */
-                                     8'h61};      /* PATCH */ // 1.00.a
+                                     8'h61};      /* PATCH */
   localparam [31:0] CORE_MAGIC = 32'h4C534452;    // LSDR
 
   assign up_clk = s_axi_aclk;
diff --git a/library/axi_laser_driver/axi_laser_driver_hw.tcl b/library/axi_laser_driver/axi_laser_driver_hw.tcl
index 41b624f90f4..743b08c2fa2 100644
--- a/library/axi_laser_driver/axi_laser_driver_hw.tcl
+++ b/library/axi_laser_driver/axi_laser_driver_hw.tcl
@@ -27,6 +27,7 @@ ad_ip_files axi_laser_driver [list \
   "axi_laser_driver_constr.sdc" \
   "axi_laser_driver_regmap.v" \
   "axi_laser_driver.v"]
+ad_set_ip_version_from_file "axi_laser_driver.v"
 
 # IP parameters
 
diff --git a/library/axi_laser_driver/axi_laser_driver_ip.tcl b/library/axi_laser_driver/axi_laser_driver_ip.tcl
index 8c4ba92723b..f5c5f90eec7 100644
--- a/library/axi_laser_driver/axi_laser_driver_ip.tcl
+++ b/library/axi_laser_driver/axi_laser_driver_ip.tcl
@@ -18,6 +18,7 @@ adi_ip_files axi_laser_driver [list \
   "axi_laser_driver.v"]
 
 adi_ip_properties axi_laser_driver
+adi_set_ip_version_from_file "axi_laser_driver.v"
 adi_ip_ttcl axi_laser_driver "../axi_pulse_gen/axi_pulse_gen_constr.ttcl"
 
 set_property company_url {https://wiki.analog.com/resources/fpga/docs/axi_laser_driver} [ipx::current_core]
diff --git a/library/axi_pulse_gen/axi_pulse_gen.v b/library/axi_pulse_gen/axi_pulse_gen.v
index 09d955a2c8c..01e228a901c 100644
--- a/library/axi_pulse_gen/axi_pulse_gen.v
+++ b/library/axi_pulse_gen/axi_pulse_gen.v
@@ -72,7 +72,7 @@ module axi_pulse_gen #(
 
   localparam [31:0] CORE_VERSION = {16'h0000,     /* MAJOR */
                                      8'h01,       /* MINOR */
-                                     8'h00};      /* PATCH */ // 0.01.0
+                                     8'h00};      /* PATCH */
   localparam [31:0] CORE_MAGIC = 32'h504c5347;    // PLSG
 
   // internal signals
diff --git a/library/axi_pulse_gen/axi_pulse_gen_ip.tcl b/library/axi_pulse_gen/axi_pulse_gen_ip.tcl
index 900ed1c94da..1b8376ea1ca 100644
--- a/library/axi_pulse_gen/axi_pulse_gen_ip.tcl
+++ b/library/axi_pulse_gen/axi_pulse_gen_ip.tcl
@@ -21,6 +21,7 @@ adi_ip_files axi_pulse_gen [list \
 
 adi_ip_properties axi_pulse_gen
 adi_ip_ttcl axi_pulse_gen "axi_pulse_gen_constr.ttcl"
+adi_set_ip_version_from_file "axi_pulse_gen.v"
 
 adi_ip_add_core_dependencies [list \
 	analog.com:$VIVADO_IP_LIBRARY:util_cdc:1.0 \
diff --git a/library/axi_pulse_gen/axi_pulse_gen_ltt.tcl b/library/axi_pulse_gen/axi_pulse_gen_ltt.tcl
index fa117cfe9a5..ddadce31541 100755
--- a/library/axi_pulse_gen/axi_pulse_gen_ltt.tcl
+++ b/library/axi_pulse_gen/axi_pulse_gen_ltt.tcl
@@ -11,8 +11,10 @@ set ip $::ipl::ip
 
 set ip [ipl::add_ports_from_module -ip $ip -mod_data $mod_data]
 
+set version [ipl::set_ip_version_from_file -file "axi_pulse_gen.v"]
+
 set ip [ipl::general \
-    -vlnv "analog.com:ip:axi_pulse_gen:1.0" \
+    -vlnv "analog.com:ip:axi_pulse_gen:$version" \
     -display_name "ADI AXI Pulse generator" \
     -supported_products {*} \
     -supported_platforms {esi radiant} \
diff --git a/library/axi_pwm_gen/axi_pwm_gen_hw.tcl b/library/axi_pwm_gen/axi_pwm_gen_hw.tcl
index b3a86913335..a7ead552ff3 100755
--- a/library/axi_pwm_gen/axi_pwm_gen_hw.tcl
+++ b/library/axi_pwm_gen/axi_pwm_gen_hw.tcl
@@ -22,6 +22,7 @@ ad_ip_files axi_pwm_gen [list \
   axi_pwm_gen_regmap.sv \
   axi_pwm_gen_1.v \
   axi_pwm_gen.sv]
+ad_set_ip_version_from_file "axi_pwm_gen.sv"
 
 # parameters
 
diff --git a/library/axi_pwm_gen/axi_pwm_gen_ip.tcl b/library/axi_pwm_gen/axi_pwm_gen_ip.tcl
index 7eb73b2eeed..c4ab1f071d1 100644
--- a/library/axi_pwm_gen/axi_pwm_gen_ip.tcl
+++ b/library/axi_pwm_gen/axi_pwm_gen_ip.tcl
@@ -20,6 +20,7 @@ adi_ip_files axi_pwm_gen [list \
   "axi_pwm_gen.sv"]
 
 adi_ip_properties axi_pwm_gen
+adi_set_ip_version_from_file "axi_pwm_gen.sv"
 adi_ip_ttcl axi_pwm_gen "axi_pwm_gen_constr.ttcl"
 
 set_property company_url {https://wiki.analog.com/resources/fpga/docs/axi_pwm_gen} [ipx::current_core]
diff --git a/library/axi_pwm_gen/axi_pwm_gen_ltt.tcl b/library/axi_pwm_gen/axi_pwm_gen_ltt.tcl
index a5cba44cf6c..48a7124c48d 100644
--- a/library/axi_pwm_gen/axi_pwm_gen_ltt.tcl
+++ b/library/axi_pwm_gen/axi_pwm_gen_ltt.tcl
@@ -10,9 +10,10 @@ set mod_data [ipl::parse_module ./axi_pwm_gen.sv]
 set ip $::ipl::ip
 
 set ip [ipl::add_ports_from_module -ip $ip -mod_data $mod_data]
+set version [ipl::set_ip_version_from_file -file "axi_pwm_gen.sv"]
 
 set ip [ipl::general \
-    -vlnv "analog.com:ip:axi_pwm_gen:1.0" \
+    -vlnv "analog.com:ip:axi_pwm_gen:$version" \
     -display_name "ADI AXI PWM generator" \
     -supported_products {*} \
     -supported_platforms {esi radiant} \
diff --git a/library/axi_tdd/axi_tdd_hw.tcl b/library/axi_tdd/axi_tdd_hw.tcl
index 0a2095bc8ed..e9c6897e961 100644
--- a/library/axi_tdd/axi_tdd_hw.tcl
+++ b/library/axi_tdd/axi_tdd_hw.tcl
@@ -25,6 +25,7 @@ ad_ip_files axi_tdd [list\
   axi_tdd_sync_gen.sv \
   axi_tdd.sv \
   axi_tdd_constr.sdc]
+ad_set_ip_version_from_file "axi_tdd_pkg.sv"
 
 # parameters
 
diff --git a/library/axi_tdd/axi_tdd_ip.tcl b/library/axi_tdd/axi_tdd_ip.tcl
index ba53baa38b0..16d3a94c3ad 100644
--- a/library/axi_tdd/axi_tdd_ip.tcl
+++ b/library/axi_tdd/axi_tdd_ip.tcl
@@ -21,6 +21,7 @@ adi_ip_files axi_tdd [list \
   "axi_tdd.sv" ]
 
 adi_ip_properties axi_tdd
+adi_set_ip_version_from_file "axi_tdd_pkg.sv"
 adi_ip_ttcl axi_tdd "axi_tdd_constr.ttcl"
 set_property display_name "ADI AXI TDD Controller" [ipx::current_core]
 set_property description "ADI AXI TDD Controller" [ipx::current_core]
diff --git a/library/axi_tdd/axi_tdd_pkg.sv b/library/axi_tdd/axi_tdd_pkg.sv
index e86f30988f3..1c80631bbf8 100644
--- a/library/axi_tdd/axi_tdd_pkg.sv
+++ b/library/axi_tdd/axi_tdd_pkg.sv
@@ -41,9 +41,10 @@ package axi_tdd_pkg;
     WAITING = 2'b10,
     RUNNING = 2'b11} state_t;
 
-  localparam
-    PCORE_VERSION = 32'h00020062,
-    PCORE_MAGIC   = 32'h5444444E; // "TDDN", big endian
+  localparam [31:0] CORE_VERSION = {16'h0002,     /* MAJOR */
+                                     8'h00,       /* MINOR */
+                                     8'h62};      /* PATCH */
+  localparam CORE_MAGIC   = 32'h5444444E; // "TDDN", big endian
 
   // register address offset
   localparam
diff --git a/library/axi_tdd/axi_tdd_regmap.sv b/library/axi_tdd/axi_tdd_regmap.sv
index ffaf710f60f..bb0724c5ae5 100644
--- a/library/axi_tdd/axi_tdd_regmap.sv
+++ b/library/axi_tdd/axi_tdd_regmap.sv
@@ -297,10 +297,10 @@ module axi_tdd_regmap #(
       up_rack <= up_rreq;
       if (up_rreq == 1'b1) begin
         case (up_raddr)
-          ADDR_TDD_VERSION         : up_rdata <= PCORE_VERSION;
+          ADDR_TDD_VERSION         : up_rdata <= CORE_VERSION;
           ADDR_TDD_ID              : up_rdata <= ID[31:0];
           ADDR_TDD_SCRATCH         : up_rdata <= up_scratch;
-          ADDR_TDD_IDENTIFICATION  : up_rdata <= PCORE_MAGIC;
+          ADDR_TDD_IDENTIFICATION  : up_rdata <= CORE_MAGIC;
           ADDR_TDD_INTERFACE       : up_rdata <= status_synth_params_s;
           ADDR_TDD_DEF_POLARITY    : up_rdata <= status_def_polarity_s;
           ADDR_TDD_CONTROL         : up_rdata <= {27'b0, up_tdd_sync_soft,
diff --git a/library/common/up_adc_common.v b/library/common/up_adc_common.v
index 5de570db921..e4e41eddf35 100644
--- a/library/common/up_adc_common.v
+++ b/library/common/up_adc_common.v
@@ -131,7 +131,9 @@ module up_adc_common #(
 
   // parameters
 
-  localparam  VERSION = 32'h000a0300;
+  localparam [31:0] CORE_VERSION = {16'h000a,     /* MAJOR */
+                                     8'h03,       /* MINOR */
+                                     8'h00};      /* PATCH */
 
   // internal registers
 
@@ -466,7 +468,7 @@ module up_adc_common #(
       up_rack_int <= up_rreq_s;
       if (up_rreq_s == 1'b1) begin
         case (up_raddr[6:0])
-          7'h00: up_rdata_int <= VERSION;
+          7'h00: up_rdata_int <= CORE_VERSION;
           7'h01: up_rdata_int <= ID;
           7'h02: up_rdata_int <= up_scratch;
           7'h03: up_rdata_int <= CONFIG;
diff --git a/library/common/up_clkgen.v b/library/common/up_clkgen.v
index d6f80d77637..5922717e938 100644
--- a/library/common/up_clkgen.v
+++ b/library/common/up_clkgen.v
@@ -77,7 +77,9 @@ module up_clkgen #(
   output  reg             up_rack
 );
 
-  localparam  PCORE_VERSION = 32'h00050063;
+  localparam [31:0] CORE_VERSION = {16'h0005,     /* MAJOR */
+                                     8'h00,       /* MINOR */
+                                     8'h63};      /* PATCH */
 
   // internal registers
 
@@ -165,7 +167,7 @@ module up_clkgen #(
       up_rack <= up_rreq_s;
       if (up_rreq_s == 1'b1) begin
         case (up_raddr[7:0])
-          8'h00: up_rdata <= PCORE_VERSION;
+          8'h00: up_rdata <= CORE_VERSION;
           8'h01: up_rdata <= ID;
           8'h02: up_rdata <= up_scratch;
           8'h07: up_rdata <= {FPGA_TECHNOLOGY,FPGA_FAMILY,SPEED_GRADE,DEV_PACKAGE}; // [8,8,8,8]
diff --git a/library/common/up_dac_common.v b/library/common/up_dac_common.v
index 9c86aaee6ca..9b450e9c57e 100644
--- a/library/common/up_dac_common.v
+++ b/library/common/up_dac_common.v
@@ -125,7 +125,9 @@ module up_dac_common #(
 
   // parameters
 
-  localparam  VERSION = 32'h00090262;
+  localparam [31:0] CORE_VERSION = {16'h0009,     /* MAJOR */
+                                     8'h02,       /* MINOR */
+                                     8'h62};      /* PATCH */
 
   // internal registers
 
@@ -454,7 +456,7 @@ module up_dac_common #(
       up_rack_int <= up_rreq_s;
       if (up_rreq_s == 1'b1) begin
         case (up_raddr[6:0])
-          7'h00: up_rdata_int <= VERSION;
+          7'h00: up_rdata_int <= CORE_VERSION;
           7'h01: up_rdata_int <= ID;
           7'h02: up_rdata_int <= up_scratch;
           7'h03: up_rdata_int <= CONFIG;
diff --git a/library/common/up_hdmi_rx.v b/library/common/up_hdmi_rx.v
index d16e12279c2..d14d4f6d1b3 100644
--- a/library/common/up_hdmi_rx.v
+++ b/library/common/up_hdmi_rx.v
@@ -75,7 +75,9 @@ module up_hdmi_rx #(
   output  reg             up_rack
 );
 
-  localparam  PCORE_VERSION = 32'h00040063;
+  localparam [31:0] CORE_VERSION = {16'h0004,     /* MAJOR */
+                                     8'h00,       /* MINOR */
+                                     8'h63};      /* PATCH */
 
   // internal registers
 
@@ -203,7 +205,7 @@ module up_hdmi_rx #(
       up_rack <= up_rreq_s;
       if(up_rreq_s == 1'b1) begin
         case (up_raddr[11:0])
-          12'h000: up_rdata <= PCORE_VERSION;
+          12'h000: up_rdata <= CORE_VERSION;
           12'h001: up_rdata <= ID;
           12'h002: up_rdata <= up_scratch;
           12'h010: up_rdata <= {31'h0, up_resetn};
diff --git a/library/common/up_hdmi_tx.v b/library/common/up_hdmi_tx.v
index 4a6c998c42c..1b4ac5de497 100644
--- a/library/common/up_hdmi_tx.v
+++ b/library/common/up_hdmi_tx.v
@@ -86,7 +86,9 @@ module up_hdmi_tx #(
   output  reg             up_rack
 );
 
-  localparam  PCORE_VERSION = 32'h00040063;
+  localparam [31:0] CORE_VERSION = {16'h0004,     /* MAJOR */
+                                     8'h00,       /* MINOR */
+                                     8'h63};      /* PATCH */
 
   // internal registers
 
@@ -238,7 +240,7 @@ module up_hdmi_tx #(
       up_rack <= up_rreq_s;
       if (up_rreq_s == 1'b1) begin
         case (up_raddr[11:0])
-          12'h000: up_rdata <= PCORE_VERSION;
+          12'h000: up_rdata <= CORE_VERSION;
           12'h001: up_rdata <= ID;
           12'h002: up_rdata <= up_scratch;
           12'h010: up_rdata <= {31'd0, up_resetn};
diff --git a/library/common/up_pmod.v b/library/common/up_pmod.v
index 0c706c7be71..3d01b8dfdd2 100644
--- a/library/common/up_pmod.v
+++ b/library/common/up_pmod.v
@@ -57,7 +57,9 @@ module up_pmod #(
   output  reg             up_rack
 );
 
-  localparam      PCORE_VERSION = 32'h00010001;
+  localparam [31:0] CORE_VERSION = {16'h0001,     /* MAJOR */
+                                     8'h00,       /* MINOR */
+                                     8'h01};      /* PATCH */
 
   // internal registers
 
diff --git a/library/common/up_tdd_cntrl.v b/library/common/up_tdd_cntrl.v
index 6e1908b1865..68a0b8c4008 100644
--- a/library/common/up_tdd_cntrl.v
+++ b/library/common/up_tdd_cntrl.v
@@ -95,8 +95,10 @@ module up_tdd_cntrl #(
   output  reg             up_rack
 );
 
-  localparam  PCORE_VERSION = 32'h00010061;
-  localparam  PCORE_MAGIC = 32'h54444443; // "TDDC", big endian
+  localparam [31:0] CORE_VERSION = {16'h0001,     /* MAJOR */
+                                     8'h00,       /* MINOR */
+                                     8'h61};      /* PATCH */
+  localparam CORE_MAGIC = 32'h54444443; // "TDDC", big endian
 
   // internal registers
 
@@ -301,10 +303,10 @@ module up_tdd_cntrl #(
       up_rack <= up_rreq_s;
       if (up_rreq_s == 1'b1) begin
         case (up_raddr[7:0])
-          8'h00: up_rdata <= PCORE_VERSION;
+          8'h00: up_rdata <= CORE_VERSION;
           8'h01: up_rdata <= ID;
           8'h02: up_rdata <= up_scratch;
-          8'h03: up_rdata <= PCORE_MAGIC;
+          8'h03: up_rdata <= CORE_MAGIC;
           8'h10: up_rdata <= {28'h0, up_tdd_gated_tx_dmapath,
                                      up_tdd_gated_rx_dmapath,
                                      up_tdd_tx_only,
diff --git a/library/data_offload/data_offload_ip.tcl b/library/data_offload/data_offload_ip.tcl
index c1373c06ce9..b1916309aef 100644
--- a/library/data_offload/data_offload_ip.tcl
+++ b/library/data_offload/data_offload_ip.tcl
@@ -22,6 +22,7 @@ adi_ip_files data_offload [list \
 ##set_property source_mgmt_mode DisplayOnly [current_project]
 
 adi_ip_properties data_offload
+adi_set_ip_version_from_file "data_offload_regmap.v"
 adi_ip_ttcl data_offload "data_offload_constr.ttcl"
 adi_ip_sim_ttcl data_offload "data_offload_sv.ttcl"
 
diff --git a/library/data_offload/data_offload_regmap.v b/library/data_offload/data_offload_regmap.v
index ff276e66b67..661fa22a81b 100644
--- a/library/data_offload/data_offload_regmap.v
+++ b/library/data_offload/data_offload_regmap.v
@@ -92,7 +92,9 @@ module data_offload_regmap #(
 
   // local parameters
 
-  localparam [31:0] CORE_VERSION = 32'h00010061;  // 1.00.a
+  localparam [31:0] CORE_VERSION = {16'h0000,     /* MAJOR */
+                                     8'h01,       /* MINOR */
+                                     8'h61};      /* PATCH */
   localparam [31:0] CORE_MAGIC = 32'h44414F46;    // DAOF
 
   localparam [33:0] MEM_SIZE = 1 << MEM_SIZE_LOG2;
diff --git a/library/i3c_controller/i3c_controller_host_interface/i3c_controller_host_interface_hw.tcl b/library/i3c_controller/i3c_controller_host_interface/i3c_controller_host_interface_hw.tcl
index 0d5eddfaf70..fd90c7e7f46 100644
--- a/library/i3c_controller/i3c_controller_host_interface/i3c_controller_host_interface_hw.tcl
+++ b/library/i3c_controller/i3c_controller_host_interface/i3c_controller_host_interface_hw.tcl
@@ -27,6 +27,7 @@ ad_ip_files i3c_controller_host_interface [list \
   i3c_controller_unpack.v \
   i3c_controller_write_ibi.v \
 ]
+ad_set_ip_version_from_file "i3c_controller_regmap.v"
 
 # Parameters
 
diff --git a/library/i3c_controller/i3c_controller_host_interface/i3c_controller_host_interface_ip.tcl b/library/i3c_controller/i3c_controller_host_interface/i3c_controller_host_interface_ip.tcl
index ee31f9f44e7..d5870e700d8 100644
--- a/library/i3c_controller/i3c_controller_host_interface/i3c_controller_host_interface_ip.tcl
+++ b/library/i3c_controller/i3c_controller_host_interface/i3c_controller_host_interface_ip.tcl
@@ -26,6 +26,7 @@ adi_ip_files i3c_controller_host_interface [list \
 
 adi_ip_properties i3c_controller_host_interface
 adi_ip_ttcl i3c_controller_host_interface "i3c_controller_host_interface_constr.ttcl"
+adi_set_ip_version_from_file "i3c_controller_regmap.v"
 
 adi_ip_add_core_dependencies [list \
   analog.com:$VIVADO_IP_LIBRARY:util_axis_fifo:1.0 \
diff --git a/library/i3c_controller/i3c_controller_host_interface/i3c_controller_regmap.v b/library/i3c_controller/i3c_controller_host_interface/i3c_controller_regmap.v
index c768290d6bb..12016ea223e 100644
--- a/library/i3c_controller/i3c_controller_host_interface/i3c_controller_regmap.v
+++ b/library/i3c_controller/i3c_controller_host_interface/i3c_controller_regmap.v
@@ -115,7 +115,9 @@ module i3c_controller_regmap #(
   output     [3:0] rmap_dev_char_data
 );
 
-  localparam PCORE_VERSION = 'h00000100;
+  localparam [31:0] CORE_VERSION = {16'h0000,     /* MAJOR */
+                                     8'h01,       /* MINOR */
+                                     8'h00};      /* PATCH */
 
   reg [31:0] up_scratch  = 32'h00; // Scratch register
   reg        up_sw_reset = 1'b1;
@@ -357,7 +359,7 @@ module i3c_controller_regmap #(
 
   always @(posedge s_axi_aclk) begin
     case (up_raddr_s[7:0])
-      `I3C_REGMAP_VERSION:        up_rdata_ff <= PCORE_VERSION;
+      `I3C_REGMAP_VERSION:        up_rdata_ff <= CORE_VERSION;
       `I3C_REGMAP_DEVICE_ID:      up_rdata_ff <= ID;
       `I3C_REGMAP_SCRATCH:        up_rdata_ff <= up_scratch;
       `I3C_REGMAP_ENABLE:         up_rdata_ff <= up_sw_reset;
diff --git a/library/intel/axi_adxcvr/axi_adxcvr_hw.tcl b/library/intel/axi_adxcvr/axi_adxcvr_hw.tcl
index d80d14be441..e99f5addca3 100644
--- a/library/intel/axi_adxcvr/axi_adxcvr_hw.tcl
+++ b/library/intel/axi_adxcvr/axi_adxcvr_hw.tcl
@@ -24,6 +24,7 @@ ad_ip_files axi_adxcvr [list \
   axi_adxcvr_up.v \
   axi_adxcvr.v \
 ]
+ad_set_ip_version_from_file "axi_adxcvr_up.v"
 
 # parameters
 
diff --git a/library/intel/axi_adxcvr/axi_adxcvr_up.v b/library/intel/axi_adxcvr/axi_adxcvr_up.v
index 203c693d8c9..ea6c8545130 100644
--- a/library/intel/axi_adxcvr/axi_adxcvr_up.v
+++ b/library/intel/axi_adxcvr/axi_adxcvr_up.v
@@ -74,7 +74,9 @@ module axi_adxcvr_up #(
 
   // parameters
 
-  localparam  [31:0]  VERSION = 32'h00110161;
+  localparam [31:0] CORE_VERSION = {16'h0011,     /* MAJOR */
+                                     8'h01,       /* MINOR */
+                                     8'h61};      /* PATCH */
 
   // internal registers
 
@@ -195,7 +197,7 @@ module axi_adxcvr_up #(
       up_rreq_d <= up_rreq;
       if (up_rreq == 1'b1) begin
         case (up_raddr)
-          10'h000: up_rdata_d <= VERSION;
+          10'h000: up_rdata_d <= CORE_VERSION;
           10'h001: up_rdata_d <= ID;
           10'h002: up_rdata_d <= up_scratch;
           10'h004: up_rdata_d <= {31'd0, up_resetn};
diff --git a/library/jesd204/axi_jesd204_common/axi_jesd204_common_ip.tcl b/library/jesd204/axi_jesd204_common/axi_jesd204_common_ip.tcl
index 3d7d74b6cc3..1e59032a934 100644
--- a/library/jesd204/axi_jesd204_common/axi_jesd204_common_ip.tcl
+++ b/library/jesd204/axi_jesd204_common/axi_jesd204_common_ip.tcl
@@ -20,6 +20,7 @@ add_files -fileset [get_filesets sources_1] [list \
 set_property source_mgmt_mode DisplayOnly [current_project]
 
 adi_ip_properties_lite axi_jesd204_common
+adi_set_ip_version_from_file "jesd204_up_common.v"
 
 adi_ip_add_core_dependencies [list \
   analog.com:$VIVADO_IP_LIBRARY:util_cdc:1.0 \
diff --git a/library/jesd204/axi_jesd204_rx/axi_jesd204_rx.v b/library/jesd204/axi_jesd204_rx/axi_jesd204_rx.v
index 33ab3424fe4..188d8c9d17e 100755
--- a/library/jesd204/axi_jesd204_rx/axi_jesd204_rx.v
+++ b/library/jesd204/axi_jesd204_rx/axi_jesd204_rx.v
@@ -90,7 +90,9 @@ module axi_jesd204_rx #(
   input [31:0] status_synth_params2
 );
 
-  localparam PCORE_VERSION = 32'h00010761; // 1.07.a
+  localparam [31:0] CORE_VERSION = {16'h0001,     /* MAJOR */
+                                     8'h07,       /* MINOR */
+                                     8'h61};      /* PATCH */
   localparam PCORE_MAGIC = 32'h32303452; // 204R
 
   /* Register interface signals */
diff --git a/library/jesd204/axi_jesd204_rx/axi_jesd204_rx_hw.tcl b/library/jesd204/axi_jesd204_rx/axi_jesd204_rx_hw.tcl
index e42fb79d24f..9108d7290fa 100755
--- a/library/jesd204/axi_jesd204_rx/axi_jesd204_rx_hw.tcl
+++ b/library/jesd204/axi_jesd204_rx/axi_jesd204_rx_hw.tcl
@@ -30,6 +30,7 @@ ad_ip_files axi_jesd204_rx [list \
   $ad_hdl_dir/library/util_cdc/util_cdc_constr.tcl \
   $ad_hdl_dir/library/intel/common/up_clock_mon_constr.sdc \
 ]
+ad_set_ip_version_from_file "axi_jesd204_rx.v"
 
 # parameters
 
diff --git a/library/jesd204/axi_jesd204_rx/axi_jesd204_rx_ip.tcl b/library/jesd204/axi_jesd204_rx/axi_jesd204_rx_ip.tcl
index 377e6390ac9..1c551171089 100755
--- a/library/jesd204/axi_jesd204_rx/axi_jesd204_rx_ip.tcl
+++ b/library/jesd204/axi_jesd204_rx/axi_jesd204_rx_ip.tcl
@@ -22,6 +22,7 @@ adi_ip_files axi_jesd204_rx [list \
 set_property source_mgmt_mode DisplayOnly [current_project]
 
 adi_ip_properties axi_jesd204_rx
+adi_set_ip_version_from_file "axi_jesd204_rx.v"
 
 adi_ip_ttcl axi_jesd204_rx "axi_jesd204_rx_ooc.ttcl"
 
diff --git a/library/jesd204/axi_jesd204_tx/axi_jesd204_tx.v b/library/jesd204/axi_jesd204_tx/axi_jesd204_tx.v
index fd201f10e48..ffec733bc2f 100755
--- a/library/jesd204/axi_jesd204_tx/axi_jesd204_tx.v
+++ b/library/jesd204/axi_jesd204_tx/axi_jesd204_tx.v
@@ -82,7 +82,9 @@ module axi_jesd204_tx #(
   input [31:0] status_synth_params2
 );
 
-  localparam PCORE_VERSION = 32'h00010661; // 1.06.a
+  localparam [31:0] CORE_VERSION = {16'h0001,     /* MAJOR */
+                                     8'h06,       /* MINOR */
+                                     8'h61};      /* PATCH */
   localparam PCORE_MAGIC = 32'h32303454; // 204T
 
   wire up_reset;
diff --git a/library/jesd204/axi_jesd204_tx/axi_jesd204_tx_hw.tcl b/library/jesd204/axi_jesd204_tx/axi_jesd204_tx_hw.tcl
index eed8a5f5a39..4411fde69ad 100644
--- a/library/jesd204/axi_jesd204_tx/axi_jesd204_tx_hw.tcl
+++ b/library/jesd204/axi_jesd204_tx/axi_jesd204_tx_hw.tcl
@@ -28,6 +28,7 @@ ad_ip_files axi_jesd204_tx [list \
   $ad_hdl_dir/library/util_cdc/util_cdc_constr.tcl \
   $ad_hdl_dir/library/intel/common/up_clock_mon_constr.sdc \
 ]
+ad_set_ip_version_from_file "axi_jesd204_tx.v"
 
 # parameters
 
diff --git a/library/jesd204/axi_jesd204_tx/axi_jesd204_tx_ip.tcl b/library/jesd204/axi_jesd204_tx/axi_jesd204_tx_ip.tcl
index 0675d48d2c8..ae8909b0b73 100644
--- a/library/jesd204/axi_jesd204_tx/axi_jesd204_tx_ip.tcl
+++ b/library/jesd204/axi_jesd204_tx/axi_jesd204_tx_ip.tcl
@@ -20,6 +20,7 @@ adi_ip_files axi_jesd204_tx [list \
 set_property source_mgmt_mode DisplayOnly [current_project]
 
 adi_ip_properties axi_jesd204_tx
+adi_set_ip_version_from_file "axi_jesd204_tx.v"
 
 adi_ip_ttcl axi_jesd204_tx "axi_jesd204_tx_ooc.ttcl"
 
diff --git a/library/scripts/adi_ip_intel.tcl b/library/scripts/adi_ip_intel.tcl
index a5f31e11791..842f8a4bfe1 100644
--- a/library/scripts/adi_ip_intel.tcl
+++ b/library/scripts/adi_ip_intel.tcl
@@ -407,6 +407,32 @@ proc ad_ip_files {pname pfiles {pfunction ""}} {
   }
 }
 
+## Set IP version from CORE_VERSION.
+#
+# \param[file] - The file that defines CORE_VERSION
+#
+proc ad_set_ip_version_from_file {file} {
+
+  set f [open $file]
+  set data [read $f]
+  close $f
+
+  regsub -all {/\*.*?\*/} $data "" data
+  regsub -all {\n} $data " " data
+  regsub -all {\s+} $data " " data
+  set pattern {CORE_VERSION\s*=\s*\{16'h([0-9A-Fa-f]+),\s*8'h([0-9A-Fa-f]+),\s*8'h([0-9A-Fa-f]+)\};}
+  set match [regexp $pattern $data match hex_major hex_minor hex_patch]
+
+  if {$match} {
+    set major [expr 0x$hex_major]
+    set minor [expr 0x$hex_minor]
+    set patch [expr 0x$hex_patch]
+    set_module_property VERSION $major.$minor.$patch
+  } else {
+    send_message WARNING "Failed to get CORE_VERSION from $file to set version"
+  }
+}
+
 ## Infer an AXI4 Lite memory mapped interface.
 #
 # \param[aclk] - name of the interface clock
diff --git a/library/scripts/adi_ip_lattice.tcl b/library/scripts/adi_ip_lattice.tcl
index 7c934774ad9..20f551f4959 100755
--- a/library/scripts/adi_ip_lattice.tcl
+++ b/library/scripts/adi_ip_lattice.tcl
@@ -841,6 +841,48 @@ namespace eval ipl {
         return [ipl::setnode $path $nodeid $node $desc]
     }
 
+###############################################################################
+## Returns the semantic version of the IP Core. It takes a single parameter,
+## the file that defines CORE_VERSION, where the value is extracted from.
+#
+# \opt[ip] -ip $ip
+# \opt[file] -file "axi_some_ip.v"
+###############################################################################
+    proc set_ip_version_from_file {args} {
+        array set opt [list -ip "$::ipl::ip" \
+            -file "" \
+        {*}$args]
+
+        set optl {
+            -ip
+        }
+        set argl {}
+        foreach op $optl {
+            set argl [list {*}$argl $op $opt($op)]
+        }
+        set file $opt(-file)
+
+        set f [open $file]
+        set data [read $f]
+        close $f
+
+        regsub -all {/\*.*?\*/} $data "" data
+        regsub -all {\n} $data " " data
+        regsub -all {\s+} $data " " data
+        set pattern {CORE_VERSION\s*=\s*\{16'h([0-9A-Fa-f]+),\s*8'h([0-9A-Fa-f]+),\s*8'h([0-9A-Fa-f]+)\};}
+        set match [regexp $pattern $data match hex_major hex_minor hex_patch]
+
+        if {$match} {
+            set major [expr 0x$hex_major]
+            set minor [expr 0x$hex_minor]
+            set patch [expr 0x$hex_patch]
+            return $major.$minor.$patch
+        } else {
+            puts "WARNING, Failed to get CORE_VERSION from $file to set version"
+            return "1.0"
+        }
+    }
+
 ###############################################################################
 ## Sets the IP structure with the specified general IP parameters.
 ## You can check the Lattice Propel IP Packager documentation for parameter
diff --git a/library/scripts/adi_ip_xilinx.tcl b/library/scripts/adi_ip_xilinx.tcl
index 991dcd95582..8ea0d285d83 100644
--- a/library/scripts/adi_ip_xilinx.tcl
+++ b/library/scripts/adi_ip_xilinx.tcl
@@ -410,6 +410,33 @@ proc adi_ip_properties {ip_name} {
   ipx::save_core
 }
 
+## Set IP version from CORE_VERSION.
+#
+# \param[file] - The file that defines CORE_VERSION
+#
+proc adi_set_ip_version_from_file {file} {
+
+  set cc [ipx::current_core]
+  set f [open $file]
+  set data [read $f]
+  close $f
+
+  regsub -all {/\*.*?\*/} $data "" data
+  regsub -all {\n} $data " " data
+  regsub -all {\s+} $data " " data
+  set pattern {CORE_VERSION\s*=\s*\{16'h([0-9A-Fa-f]+),\s*8'h([0-9A-Fa-f]+),\s*8'h([0-9A-Fa-f]+)\};}
+  set match [regexp $pattern $data match hex_major hex_minor hex_patch]
+
+  if {$match} {
+    set major [expr 0x$hex_major]
+    set minor [expr 0x$hex_minor]
+    set patch [expr 0x$hex_patch]
+    set_property version $major.$minor.$patch $cc
+  } else {
+    puts [format "WARNING: Failed to get CORE_VERSION from %s to set version" $file]
+  }
+}
+
 ## Create/overwrite temporary files containing particular build case dependencies.
 #
 #  DO NOT USE FOR: axi_dmac/jesd204/axi_clkgen
diff --git a/library/spi_engine/axi_spi_engine/axi_spi_engine.v b/library/spi_engine/axi_spi_engine/axi_spi_engine.v
index 378b982007a..4864ecbac32 100644
--- a/library/spi_engine/axi_spi_engine/axi_spi_engine.v
+++ b/library/spi_engine/axi_spi_engine/axi_spi_engine.v
@@ -133,7 +133,9 @@ module axi_spi_engine #(
   input [7:0] offload_sync_data
 );
 
-  localparam PCORE_VERSION = 'h010501;
+  localparam [31:0] CORE_VERSION = {16'h0001,     /* MAJOR */
+                                     8'h05,       /* MINOR */
+                                     8'h01};      /* PATCH */
   localparam S_AXI = 0;
   localparam UP_FIFO = 1;
 
@@ -342,7 +344,7 @@ module axi_spi_engine #(
   reg [7:0] cmd_fifo_address_width = CMD_FIFO_ADDRESS_WIDTH;
   always @(posedge clk) begin
     case (up_raddr_s)
-      8'h00: up_rdata_ff <= PCORE_VERSION;
+      8'h00: up_rdata_ff <= CORE_VERSION;
       8'h01: up_rdata_ff <= ID;
       8'h02: up_rdata_ff <= up_scratch;
       8'h03: up_rdata_ff <= {8'b0, NUM_OF_SDI, DATA_WIDTH};
diff --git a/library/spi_engine/axi_spi_engine/axi_spi_engine_hw.tcl b/library/spi_engine/axi_spi_engine/axi_spi_engine_hw.tcl
index 8f9e2f5d450..8ed0dddd8ab 100644
--- a/library/spi_engine/axi_spi_engine/axi_spi_engine_hw.tcl
+++ b/library/spi_engine/axi_spi_engine/axi_spi_engine_hw.tcl
@@ -19,6 +19,7 @@ ad_ip_files axi_spi_engine [list\
   $ad_hdl_dir/library/intel/common/up_rst_constr.sdc \
   axi_spi_engine_constr.sdc \
   axi_spi_engine.v]
+ad_set_ip_version_from_file "axi_spi_engine.v"
 
 # parameters
 
diff --git a/library/spi_engine/axi_spi_engine/axi_spi_engine_ip.tcl b/library/spi_engine/axi_spi_engine/axi_spi_engine_ip.tcl
index b775c377c78..25d429bac29 100644
--- a/library/spi_engine/axi_spi_engine/axi_spi_engine_ip.tcl
+++ b/library/spi_engine/axi_spi_engine/axi_spi_engine_ip.tcl
@@ -19,6 +19,7 @@ adi_ip_files axi_spi_engine [list \
 ]
 
 adi_ip_properties axi_spi_engine
+adi_set_ip_version_from_file "axi_spi_engine.v"
 adi_ip_ttcl axi_spi_engine "axi_spi_engine_constr.ttcl"
 
 adi_ip_add_core_dependencies [list \
diff --git a/library/spi_engine/axi_spi_engine/axi_spi_engine_ltt.tcl b/library/spi_engine/axi_spi_engine/axi_spi_engine_ltt.tcl
index 1cdcb38f060..c02c9cd03bb 100755
--- a/library/spi_engine/axi_spi_engine/axi_spi_engine_ltt.tcl
+++ b/library/spi_engine/axi_spi_engine/axi_spi_engine_ltt.tcl
@@ -8,12 +8,13 @@ source $ad_hdl_dir/library/scripts/adi_ip_lattice.tcl
 
 set mod_data [ipl::parse_module ./axi_spi_engine.v]
 set ip $::ipl::ip
+set version [ipl::set_ip_version_from_file -file "axi_spi_engine.v"]
 
 set ip [ipl::add_ports_from_module -ip $ip -mod_data $mod_data]
 # set ip [ipl::add_parameters_from_module -ip $ip -mod_data $mod_data]
 
 set ip [ipl::general \
-    -vlnv "analog.com:ip:axi_spi_engine:1.0" \
+    -vlnv "analog.com:ip:vlnv "analog.com:ip:axi_spi_engine:$version" \
     -category "ADI" \
     -keywords "ADI IP" \
     -min_radiant_version "2023.2" \
diff --git a/library/xilinx/axi_adxcvr/axi_adxcvr_ip.tcl b/library/xilinx/axi_adxcvr/axi_adxcvr_ip.tcl
index fefe97af640..794cfcfe03a 100644
--- a/library/xilinx/axi_adxcvr/axi_adxcvr_ip.tcl
+++ b/library/xilinx/axi_adxcvr/axi_adxcvr_ip.tcl
@@ -21,6 +21,7 @@ set_property used_in_simulation false [get_files $ad_hdl_dir/library/scripts/adi
 set_property used_in_synthesis false [get_files $ad_hdl_dir/library/scripts/adi_xilinx_device_info_enc.tcl]
 
 adi_ip_properties axi_adxcvr
+adi_set_ip_version_from_file "axi_adxcvr_up.v"
 adi_ip_infer_mm_interfaces axi_adxcvr
 
 adi_init_bd_tcl
diff --git a/library/xilinx/axi_adxcvr/axi_adxcvr_up.v b/library/xilinx/axi_adxcvr/axi_adxcvr_up.v
index c4c76c18f48..8cd37955c2e 100644
--- a/library/xilinx/axi_adxcvr/axi_adxcvr_up.v
+++ b/library/xilinx/axi_adxcvr/axi_adxcvr_up.v
@@ -135,7 +135,9 @@ module axi_adxcvr_up #(
 
   // parameters
 
-  localparam  [31:0]  VERSION = 32'h00110561;
+  localparam [31:0] CORE_VERSION = {16'h0011,     /* MAJOR */
+                                     8'h05,       /* MINOR */
+                                     8'h61};      /* PATCH */
 
   // internal registers
 
@@ -530,7 +532,7 @@ module axi_adxcvr_up #(
       up_rreq_d <= up_rreq;
       if (up_rreq == 1'b1) begin
         case (up_raddr)
-          10'h000: up_rdata_d <= VERSION;
+          10'h000: up_rdata_d <= CORE_VERSION;
           10'h001: up_rdata_d <= ID;
           10'h002: up_rdata_d <= up_scratch;
           10'h004: up_rdata_d <= {30'd0, up_bufstatus_rst, up_resetn};
diff --git a/library/xilinx/axi_xcvrlb/axi_xcvrlb.v b/library/xilinx/axi_xcvrlb/axi_xcvrlb.v
index 87ffe489468..82f5dbc8e61 100644
--- a/library/xilinx/axi_xcvrlb/axi_xcvrlb.v
+++ b/library/xilinx/axi_xcvrlb/axi_xcvrlb.v
@@ -102,7 +102,9 @@ module axi_xcvrlb #(
 
   // parameters
 
-  localparam  [31:0]  VERSION = 32'h00100161;
+  localparam [31:0] CORE_VERSION = {16'h0010,     /* MAJOR */
+                                     8'h01,       /* MINOR */
+                                     8'h61};      /* PATCH */
 
   // defaults
 
@@ -149,7 +151,7 @@ module axi_xcvrlb #(
       up_rack <= up_rreq_s;
       if (up_rreq_s == 1'b1) begin
         case (up_raddr_s)
-          10'h000: up_rdata <= VERSION;
+          10'h000: up_rdata <= CORE_VERSION;
           10'h002: up_rdata <= up_scratch;
           10'h004: up_rdata <= {31'd0, up_resetn};
           10'h005: up_rdata <= up_status;
diff --git a/library/xilinx/axi_xcvrlb/axi_xcvrlb_ip.tcl b/library/xilinx/axi_xcvrlb/axi_xcvrlb_ip.tcl
index a2c60747e64..70c460acc96 100644
--- a/library/xilinx/axi_xcvrlb/axi_xcvrlb_ip.tcl
+++ b/library/xilinx/axi_xcvrlb/axi_xcvrlb_ip.tcl
@@ -19,6 +19,7 @@ adi_ip_files axi_xcvrlb [list \
   "axi_xcvrlb.v" ]
 
 adi_ip_properties_lite axi_xcvrlb
+adi_set_ip_version_from_file "axi_xcvrlb.v"
 
 adi_init_bd_tcl
 adi_ip_bd axi_xcvrlb "bd/bd.tcl"