diff --git a/projects/cn0561/README.md b/projects/cn0561/README.md index 932bb53d10..703ce846af 100644 --- a/projects/cn0561/README.md +++ b/projects/cn0561/README.md @@ -3,6 +3,8 @@ - Evaluation board product page: TO BE ADDED - System documentation: TO BE ADDED - HDL project documentation: https://analogdevicesinc.github.io/hdl/projects/cn0561/index.html +- Evaluation board VADJ for FMC connector: 1.8V +- Evaluation board VIO for ARDUINO connector: 3.3V ## Supported parts diff --git a/projects/cn0561/coraz7s/README.md b/projects/cn0561/coraz7s/README.md index e61c8a702a..8425572c2f 100644 --- a/projects/cn0561/coraz7s/README.md +++ b/projects/cn0561/coraz7s/README.md @@ -1,5 +1,9 @@ + + # CN0561/CORAZ7S HDL Project +- VIO with which it was tested in hardware: 3.3V + ## Building the project ``` diff --git a/projects/cn0561/de10nano/README.md b/projects/cn0561/de10nano/README.md index dabd1f7cbc..26c59d8e39 100644 --- a/projects/cn0561/de10nano/README.md +++ b/projects/cn0561/de10nano/README.md @@ -1,5 +1,9 @@ + + # CN0561/DE10NANO HDL Project +- VIO with which it was tested in hardware: 3.3V + ## Building the project ``` diff --git a/projects/cn0561/zed/README.md b/projects/cn0561/zed/README.md index c08350bef4..eb37da9cf5 100644 --- a/projects/cn0561/zed/README.md +++ b/projects/cn0561/zed/README.md @@ -1,5 +1,9 @@ + + # CN0561/ZED HDL Project +- VADJ with which it was tested in hardware: 1.8V + ## Building the project ``` diff --git a/projects/cn0561/zed/system_constr.xdc b/projects/cn0561/zed/system_constr.xdc index 0f7d44310d..3a2c83d4d0 100644 --- a/projects/cn0561/zed/system_constr.xdc +++ b/projects/cn0561/zed/system_constr.xdc @@ -1,33 +1,33 @@ ############################################################################### -## Copyright (C) 2022-2023 Analog Devices, Inc. All rights reserved. +## Copyright (C) 2022-2025 Analog Devices, Inc. All rights reserved. ### SPDX short identifier: ADIBSD ############################################################################### # cn0561 SPI configuration interface -set_property -dict {PACKAGE_PIN N22 IOSTANDARD LVCMOS25} [get_ports cn0561_spi_sdi]; ## FMC_LPC_LA03_P -set_property -dict {PACKAGE_PIN M22 IOSTANDARD LVCMOS25} [get_ports cn0561_spi_sdo]; ## FMC_LPC_LA04_N -set_property -dict {PACKAGE_PIN N19 IOSTANDARD LVCMOS25} [get_ports cn0561_spi_sclk]; ## FMC_LPC_LA01_P_CC -set_property -dict {PACKAGE_PIN J18 IOSTANDARD LVCMOS25} [get_ports cn0561_spi_cs]; ## FMC_LPC_LA05_P +set_property -dict {PACKAGE_PIN N22 IOSTANDARD LVCMOS18} [get_ports cn0561_spi_sdi]; ## FMC_LPC_LA03_P +set_property -dict {PACKAGE_PIN M22 IOSTANDARD LVCMOS18} [get_ports cn0561_spi_sdo]; ## FMC_LPC_LA04_N +set_property -dict {PACKAGE_PIN N19 IOSTANDARD LVCMOS18} [get_ports cn0561_spi_sclk]; ## FMC_LPC_LA01_P_CC +set_property -dict {PACKAGE_PIN J18 IOSTANDARD LVCMOS18} [get_ports cn0561_spi_cs]; ## FMC_LPC_LA05_P # cn0561 data interface -set_property -dict {PACKAGE_PIN L18 IOSTANDARD LVCMOS25 IOB TRUE} [get_ports cn0561_dclk]; ## FMC_LPC_CLK0_M2C_P -set_property -dict {PACKAGE_PIN M20 IOSTANDARD LVCMOS25 IOB TRUE} [get_ports cn0561_din[0]]; ## FMC_LPC_LA00_N_CC -set_property -dict {PACKAGE_PIN J21 IOSTANDARD LVCMOS25 IOB TRUE} [get_ports cn0561_din[1]]; ## FMC_LPC_LA06_N -set_property -dict {PACKAGE_PIN P17 IOSTANDARD LVCMOS25 IOB TRUE} [get_ports cn0561_din[2]]; ## FMC_LPC_LA02_P -set_property -dict {PACKAGE_PIN P18 IOSTANDARD LVCMOS25 IOB TRUE} [get_ports cn0561_din[3]]; ## FMC_LPC_LA02_N -set_property -dict {PACKAGE_PIN M19 IOSTANDARD LVCMOS25} [get_ports cn0561_odr]; ## FMC_LPC_LA00_P_CC +set_property -dict {PACKAGE_PIN L18 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports cn0561_dclk]; ## FMC_LPC_CLK0_M2C_P +set_property -dict {PACKAGE_PIN M20 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports cn0561_din[0]]; ## FMC_LPC_LA00_N_CC +set_property -dict {PACKAGE_PIN J21 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports cn0561_din[1]]; ## FMC_LPC_LA06_N +set_property -dict {PACKAGE_PIN P17 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports cn0561_din[2]]; ## FMC_LPC_LA02_P +set_property -dict {PACKAGE_PIN P18 IOSTANDARD LVCMOS18 IOB TRUE} [get_ports cn0561_din[3]]; ## FMC_LPC_LA02_N +set_property -dict {PACKAGE_PIN M19 IOSTANDARD LVCMOS18} [get_ports cn0561_odr]; ## FMC_LPC_LA00_P_CC # cn0561 GPIO lines -set_property -dict {PACKAGE_PIN J20 IOSTANDARD LVCMOS25} [get_ports cn0561_resetn]; ## FMC_LPC_LA16_P -set_property -dict {PACKAGE_PIN T16 IOSTANDARD LVCMOS25} [get_ports cn0561_pdn]; ## FMC_LPC_LA07_P -set_property -dict {PACKAGE_PIN M21 IOSTANDARD LVCMOS25} [get_ports cn0561_mode]; ## FMC_LPC_LA04_P -set_property -dict {PACKAGE_PIN R19 IOSTANDARD LVCMOS25} [get_ports cn0561_gpio0]; ## FMC_LPC_LA10_P -set_property -dict {PACKAGE_PIN T19 IOSTANDARD LVCMOS25} [get_ports cn0561_gpio1]; ## FMC_LPC_LA10_N -set_property -dict {PACKAGE_PIN N17 IOSTANDARD LVCMOS25} [get_ports cn0561_gpio2]; ## FMC_LPC_LA11_P -set_property -dict {PACKAGE_PIN P20 IOSTANDARD LVCMOS25} [get_ports cn0561_gpio4]; ## FMC_LPC_LA12_P -set_property -dict {PACKAGE_PIN P21 IOSTANDARD LVCMOS25} [get_ports cn0561_gpio5]; ## FMC_LPC_LA12_N -set_property -dict {PACKAGE_PIN L17 IOSTANDARD LVCMOS25} [get_ports cn0561_gpio6]; ## FMC_LPC_LA13_P -set_property -dict {PACKAGE_PIN M17 IOSTANDARD LVCMOS25} [get_ports cn0561_gpio7]; ## FMC_LPC_LA13_N -set_property -dict {PACKAGE_PIN L21 IOSTANDARD LVCMOS25} [get_ports cn0561_pinbspi]; ## FMC_LPC_LA06_P +set_property -dict {PACKAGE_PIN J20 IOSTANDARD LVCMOS18} [get_ports cn0561_resetn]; ## FMC_LPC_LA16_P +set_property -dict {PACKAGE_PIN T16 IOSTANDARD LVCMOS18} [get_ports cn0561_pdn]; ## FMC_LPC_LA07_P +set_property -dict {PACKAGE_PIN M21 IOSTANDARD LVCMOS18} [get_ports cn0561_mode]; ## FMC_LPC_LA04_P +set_property -dict {PACKAGE_PIN R19 IOSTANDARD LVCMOS18} [get_ports cn0561_gpio0]; ## FMC_LPC_LA10_P +set_property -dict {PACKAGE_PIN T19 IOSTANDARD LVCMOS18} [get_ports cn0561_gpio1]; ## FMC_LPC_LA10_N +set_property -dict {PACKAGE_PIN N17 IOSTANDARD LVCMOS18} [get_ports cn0561_gpio2]; ## FMC_LPC_LA11_P +set_property -dict {PACKAGE_PIN P20 IOSTANDARD LVCMOS18} [get_ports cn0561_gpio4]; ## FMC_LPC_LA12_P +set_property -dict {PACKAGE_PIN P21 IOSTANDARD LVCMOS18} [get_ports cn0561_gpio5]; ## FMC_LPC_LA12_N +set_property -dict {PACKAGE_PIN L17 IOSTANDARD LVCMOS18} [get_ports cn0561_gpio6]; ## FMC_LPC_LA13_P +set_property -dict {PACKAGE_PIN M17 IOSTANDARD LVCMOS18} [get_ports cn0561_gpio7]; ## FMC_LPC_LA13_N +set_property -dict {PACKAGE_PIN L21 IOSTANDARD LVCMOS18} [get_ports cn0561_pinbspi]; ## FMC_LPC_LA06_P