diff --git a/docs/library/jesd204/index.rst b/docs/library/jesd204/index.rst index 5b918249b18..0dc26c54de1 100644 --- a/docs/library/jesd204/index.rst +++ b/docs/library/jesd204/index.rst @@ -421,7 +421,6 @@ HDL Example Projects - :git-hdl:`Intel Arria 10 SoC ` - :git-hdl:`Intel A10Gx (RETIRED) ` - - :git-hdl:`AMD Xilinx KC705 ` - :git-hdl:`AMD Xilinx KCU105 ` - :git-hdl:`AMD Xilinx VC707 (RETIRED) ` - :git-hdl:`AMD Xilinx ZC706 ` diff --git a/docs/projects/ad9467_fmc/index.rst b/docs/projects/ad9467_fmc/index.rst index 3092aa449fd..20756ddf137 100644 --- a/docs/projects/ad9467_fmc/index.rst +++ b/docs/projects/ad9467_fmc/index.rst @@ -28,9 +28,15 @@ Supported devices Supported carriers ------------------------------------------------------------------------------- -- :xilinx:`KC705` LPC slot +- :xilinx:`KC705` LPC slot * - `ZedBoard `__ +.. admonition:: Legend + :class: note + + - ``*`` removed; last release that supports this project on this carrier is + :git-hdl:`hdl_2023_r2 ` + Block design ------------------------------------------------------------------------------- diff --git a/docs/projects/daq2/index.rst b/docs/projects/daq2/index.rst index ec1560769b0..1ad1bb5ce8c 100644 --- a/docs/projects/daq2/index.rst +++ b/docs/projects/daq2/index.rst @@ -42,7 +42,7 @@ Supported carriers - Carrier - FMC slot * - :adi:`AD-FMCDAQ2-EBZ ` - - :xilinx:`KC705` + - :xilinx:`KC705` * - FMC HPC * - - :xilinx:`KCU105` @@ -54,6 +54,12 @@ Supported carriers - :xilinx:`ZCU102` - FMC HPC0 +.. admonition:: Legend + :class: note + + - ``*`` removed; last release that supports this project on this carrier is + :git-hdl:`hdl_2023_r2 ` + Block design ------------------------------------------------------------------------------- diff --git a/docs/projects/fmcomms2/index.rst b/docs/projects/fmcomms2/index.rst index 4099b715987..6db8048881f 100644 --- a/docs/projects/fmcomms2/index.rst +++ b/docs/projects/fmcomms2/index.rst @@ -56,7 +56,7 @@ Supported carriers - Carrier - FMC slot * - FMCOMMS2/3/4 - - :xilinx:`KC705` + - :xilinx:`KC705` * - FMC LPC * - - :xilinx:`KCU105` @@ -77,6 +77,12 @@ Supported carriers - `ZedBoard `__ - FMC LPC +.. admonition:: Legend + :class: note + + - ``*`` removed; last release that supports this project on this carrier is + :git-hdl:`hdl_2023_r2 ` + Block design ------------------------------------------------------------------------------- diff --git a/docs/user_guide/build_hdl.rst b/docs/user_guide/build_hdl.rst index 83aa5871271..0299c977c43 100644 --- a/docs/user_guide/build_hdl.rst +++ b/docs/user_guide/build_hdl.rst @@ -1038,7 +1038,7 @@ In general, always run ``make`` within a project folder such as not be a need for you to run ``make`` inside the library or root folders. The ``make`` framework passes the top level 'targets' to any sub-makes inside its sub-folders. What this means, is that if you run ``make`` inside -**hdl/projects/daq2**, it builds all the carriers (**kc705**, **a10soc**, +**hdl/projects/daq2**, it builds all the carriers (**a10soc**, **kcu105**, **zc706** to **zcu102**) instead of just the target carrier. The following targets/arguments are supported: diff --git a/projects/ad9467_fmc/kc705/Makefile b/projects/ad9467_fmc/kc705/Makefile deleted file mode 100644 index 9a82b731ba1..00000000000 --- a/projects/ad9467_fmc/kc705/Makefile +++ /dev/null @@ -1,22 +0,0 @@ -#################################################################################### -## Copyright (c) 2018 - 2023 Analog Devices, Inc. -### SPDX short identifier: BSD-1-Clause -## Auto-generated, do not modify! -#################################################################################### - -PROJECT_NAME := ad9467_fmc_kc705 - -M_DEPS += ../common/ad9467_spi.v -M_DEPS += ../common/ad9467_bd.tcl -M_DEPS += ../../scripts/adi_pd.tcl -M_DEPS += ../../common/kc705/kc705_system_mig.prj -M_DEPS += ../../common/kc705/kc705_system_constr.xdc -M_DEPS += ../../common/kc705/kc705_system_bd.tcl -M_DEPS += ../../../library/common/ad_iobuf.v - -LIB_DEPS += axi_ad9467 -LIB_DEPS += axi_dmac -LIB_DEPS += axi_sysid -LIB_DEPS += sysid_rom - -include ../../scripts/project-xilinx.mk diff --git a/projects/ad9467_fmc/kc705/README.md b/projects/ad9467_fmc/kc705/README.md deleted file mode 100644 index f8a9e0da937..00000000000 --- a/projects/ad9467_fmc/kc705/README.md +++ /dev/null @@ -1,10 +0,0 @@ -# AD9467-FMC/KC705 HDL Project - -## Building the project - -``` -cd projects/ad9467_fmc/kc705 -make -``` - -Corresponding device tree: [kc705_ad9467_fmc.dts](https://github.com/analogdevicesinc/linux/blob/main/arch/microblaze/boot/dts/kc705_ad9467_fmc.dts) diff --git a/projects/ad9467_fmc/kc705/system_bd.tcl b/projects/ad9467_fmc/kc705/system_bd.tcl deleted file mode 100644 index 5aa4329326f..00000000000 --- a/projects/ad9467_fmc/kc705/system_bd.tcl +++ /dev/null @@ -1,15 +0,0 @@ -############################################################################### -## Copyright (C) 2014-2023 Analog Devices, Inc. All rights reserved. -### SPDX short identifier: ADIBSD -############################################################################### - -source $ad_hdl_dir/projects/common/kc705/kc705_system_bd.tcl -source ../common/ad9467_bd.tcl -source $ad_hdl_dir/projects/scripts/adi_pd.tcl - -#system ID -ad_ip_parameter axi_sysid_0 CONFIG.ROM_ADDR_BITS 9 -ad_ip_parameter rom_sys_0 CONFIG.PATH_TO_FILE "$mem_init_sys_file_path/mem_init_sys.txt" -ad_ip_parameter rom_sys_0 CONFIG.ROM_ADDR_BITS 9 - -sysid_gen_sys_init_file diff --git a/projects/ad9467_fmc/kc705/system_constr.xdc b/projects/ad9467_fmc/kc705/system_constr.xdc deleted file mode 100644 index 40a5384bac9..00000000000 --- a/projects/ad9467_fmc/kc705/system_constr.xdc +++ /dev/null @@ -1,38 +0,0 @@ -############################################################################### -## Copyright (C) 2014-2023 Analog Devices, Inc. All rights reserved. -### SPDX short identifier: ADIBSD -############################################################################### - -# ad9467 - -set_property -dict {PACKAGE_PIN AF22 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_clk_in_p] ; ## FMC_LPC_CLK0_M2C_P -set_property -dict {PACKAGE_PIN AG23 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_clk_in_n] ; ## FMC_LPC_CLK0_M2C_N -set_property -dict {PACKAGE_PIN AJ22 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_or_p] ; ## FMC_LPC_LA08_P -set_property -dict {PACKAGE_PIN AJ23 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_or_n] ; ## FMC_LPC_LA08_N -set_property -dict {PACKAGE_PIN AE24 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_n[0]] ; ## FMC_LPC_LA00_CC_N -set_property -dict {PACKAGE_PIN AD23 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_p[0]] ; ## FMC_LPC_LA00_CC_P -set_property -dict {PACKAGE_PIN AE23 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_p[1]] ; ## FMC_LPC_LA01_CC_P -set_property -dict {PACKAGE_PIN AF23 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_n[1]] ; ## FMC_LPC_LA01_CC_N -set_property -dict {PACKAGE_PIN AF20 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_p[2]] ; ## FMC_LPC_LA02_P -set_property -dict {PACKAGE_PIN AF21 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_n[2]] ; ## FMC_LPC_LA02_N -set_property -dict {PACKAGE_PIN AG20 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_p[3]] ; ## FMC_LPC_LA03_P -set_property -dict {PACKAGE_PIN AH20 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_n[3]] ; ## FMC_LPC_LA03_N -set_property -dict {PACKAGE_PIN AH21 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_p[4]] ; ## FMC_LPC_LA04_P -set_property -dict {PACKAGE_PIN AJ21 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_n[4]] ; ## FMC_LPC_LA04_N -set_property -dict {PACKAGE_PIN AG22 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_p[5]] ; ## FMC_LPC_LA05_P -set_property -dict {PACKAGE_PIN AH22 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_n[5]] ; ## FMC_LPC_LA05_N -set_property -dict {PACKAGE_PIN AK20 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_p[6]] ; ## FMC_LPC_LA06_P -set_property -dict {PACKAGE_PIN AK21 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_n[6]] ; ## FMC_LPC_LA06_N -set_property -dict {PACKAGE_PIN AG25 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_p[7]] ; ## FMC_LPC_LA07_P -set_property -dict {PACKAGE_PIN AH25 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports adc_data_in_n[7]] ; ## FMC_LPC_LA07_N - -## spi - -set_property -dict {PACKAGE_PIN AC30 IOSTANDARD LVCMOS25} [get_ports spi_csn_adc] ; ## FMC_LPC_LA33_N -set_property -dict {PACKAGE_PIN AC29 IOSTANDARD LVCMOS25} [get_ports spi_csn_clk] ; ## FMC_LPC_LA33_P -set_property -dict {PACKAGE_PIN AA30 IOSTANDARD LVCMOS25} [get_ports spi_clk] ; ## FMC_LPC_LA32_N -set_property -dict {PACKAGE_PIN Y30 IOSTANDARD LVCMOS25} [get_ports spi_sdio] ; ## FMC_LPC_LA32_P - -# clocks -create_clock -name adc_clk -period 4.00 [get_ports adc_clk_in_p] - diff --git a/projects/ad9467_fmc/kc705/system_project.tcl b/projects/ad9467_fmc/kc705/system_project.tcl deleted file mode 100644 index 045605c52bb..00000000000 --- a/projects/ad9467_fmc/kc705/system_project.tcl +++ /dev/null @@ -1,20 +0,0 @@ -############################################################################### -## Copyright (C) 2014-2023 Analog Devices, Inc. All rights reserved. -### SPDX short identifier: ADIBSD -############################################################################### - -# load script -source ../../../scripts/adi_env.tcl -source $ad_hdl_dir/projects/scripts/adi_project_xilinx.tcl -source $ad_hdl_dir/projects/scripts/adi_board.tcl - -adi_project ad9467_fmc_kc705 -adi_project_files ad9467_fmc_kc705 [list \ - "../common/ad9467_spi.v" \ - "$ad_hdl_dir/library/common/ad_iobuf.v" \ - "system_top.v" \ - "system_constr.xdc" \ - "$ad_hdl_dir/projects/common/kc705/kc705_system_constr.xdc"] - -adi_project_run ad9467_fmc_kc705 - diff --git a/projects/ad9467_fmc/kc705/system_top.v b/projects/ad9467_fmc/kc705/system_top.v deleted file mode 100644 index bf4ad66c1c0..00000000000 --- a/projects/ad9467_fmc/kc705/system_top.v +++ /dev/null @@ -1,203 +0,0 @@ -// *************************************************************************** -// *************************************************************************** -// Copyright (C) 2014-2023 Analog Devices, Inc. All rights reserved. -// -// In this HDL repository, there are many different and unique modules, consisting -// of various HDL (Verilog or VHDL) components. The individual modules are -// developed independently, and may be accompanied by separate and unique license -// terms. -// -// The user should read each of these license terms, and understand the -// freedoms and responsibilities that he or she has by using this source/core. -// -// This core is distributed in the hope that it will be useful, but WITHOUT ANY -// WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR -// A PARTICULAR PURPOSE. -// -// Redistribution and use of source or resulting binaries, with or without modification -// of this file, are permitted under one of the following two license terms: -// -// 1. The GNU General Public License version 2 as published by the -// Free Software Foundation, which can be found in the top level directory -// of this repository (LICENSE_GPL2), and also online at: -// -// -// OR -// -// 2. An ADI specific BSD license, which can be found in the top level directory -// of this repository (LICENSE_ADIBSD), and also on-line at: -// https://github.com/analogdevicesinc/hdl/blob/main/LICENSE_ADIBSD -// This will allow to generate bit files and not release the source code, -// as long as it attaches to an ADI device. -// -// *************************************************************************** -// *************************************************************************** - -`timescale 1ns/100ps - -module system_top ( - - input sys_rst, - input sys_clk_p, - input sys_clk_n, - - input uart_sin, - output uart_sout, - - output [ 2:0] ddr3_1_n, - output [ 1:0] ddr3_1_p, - output ddr3_reset_n, - output [13:0] ddr3_addr, - output [ 2:0] ddr3_ba, - output ddr3_cas_n, - output ddr3_ras_n, - output ddr3_we_n, - output [ 0:0] ddr3_ck_n, - output [ 0:0] ddr3_ck_p, - output [ 0:0] ddr3_cke, - output [ 0:0] ddr3_cs_n, - output [ 7:0] ddr3_dm, - inout [63:0] ddr3_dq, - inout [ 7:0] ddr3_dqs_n, - inout [ 7:0] ddr3_dqs_p, - output [ 0:0] ddr3_odt, - - output mdio_mdc, - inout mdio_mdio, - output mii_rst_n, - input mii_col, - input mii_crs, - input mii_rx_clk, - input mii_rx_er, - input mii_rx_dv, - input [ 3:0] mii_rxd, - input mii_tx_clk, - output mii_tx_en, - output [ 3:0] mii_txd, - - output [26:1] linear_flash_addr, - output linear_flash_adv_ldn, - output linear_flash_ce_n, - inout [15:0] linear_flash_dq_io, - output linear_flash_oen, - output linear_flash_wen, - - output fan_pwm, - - inout [ 6:0] gpio_lcd, - inout [16:0] gpio_bd, - - output iic_rstn, - inout iic_scl, - inout iic_sda, - - input adc_clk_in_n, - input adc_clk_in_p, - input [ 7:0] adc_data_in_n, - input [ 7:0] adc_data_in_p, - input adc_data_or_n, - input adc_data_or_p, - output spi_clk, - output spi_csn_adc, - output spi_csn_clk, - inout spi_sdio -); - - // internal signals - wire [ 7:0] spi_csn; - wire spi_miso; - wire spi_mosi; - - wire [63:0] gpio_i; - wire [63:0] gpio_o; - wire [63:0] gpio_t; - - assign ddr3_1_p = 2'b11; - assign ddr3_1_n = 3'b000; - assign fan_pwm = 1'b1; - assign iic_rstn = 1'b1; - - assign spi_csn_adc = spi_csn[0]; - assign spi_csn_clk = spi_csn[1]; - - ad9467_spi i_spi ( - .spi_csn(spi_csn[1:0]), - .spi_clk(spi_clk), - .spi_mosi(spi_mosi), - .spi_miso(spi_miso), - .spi_sdio(spi_sdio)); - - ad_iobuf #( - .DATA_WIDTH(17) - ) i_iobuf_sw_led ( - .dio_t (gpio_t[16:0]), - .dio_i (gpio_o[16:0]), - .dio_o (gpio_i[16:0]), - .dio_p (gpio_bd)); - - assign gpio_i[63:32] = gpio_o[63:32]; - assign gpio_i[31:17] = gpio_o[31:17]; - - system_wrapper i_system_wrapper ( - .ddr3_addr (ddr3_addr), - .ddr3_ba (ddr3_ba), - .ddr3_cas_n (ddr3_cas_n), - .ddr3_ck_n (ddr3_ck_n), - .ddr3_ck_p (ddr3_ck_p), - .ddr3_cke (ddr3_cke), - .ddr3_cs_n (ddr3_cs_n), - .ddr3_dm (ddr3_dm), - .ddr3_dq (ddr3_dq), - .ddr3_dqs_n (ddr3_dqs_n), - .ddr3_dqs_p (ddr3_dqs_p), - .ddr3_odt (ddr3_odt), - .ddr3_ras_n (ddr3_ras_n), - .ddr3_reset_n (ddr3_reset_n), - .ddr3_we_n (ddr3_we_n), - .gpio_lcd_tri_io (gpio_lcd), - .gpio0_o (gpio_o[31:0]), - .gpio0_t (gpio_t[31:0]), - .gpio0_i (gpio_i[31:0]), - .gpio1_o (gpio_o[63:32]), - .gpio1_t (gpio_t[63:32]), - .gpio1_i (gpio_i[63:32]), - .iic_main_scl_io (iic_scl), - .iic_main_sda_io (iic_sda), - .mdio_mdc (mdio_mdc), - .mdio_mdio_io (mdio_mdio), - .mii_col (mii_col), - .mii_crs (mii_crs), - .mii_rst_n (mii_rst_n), - .mii_rx_clk (mii_rx_clk), - .mii_rx_dv (mii_rx_dv), - .mii_rx_er (mii_rx_er), - .mii_rxd (mii_rxd), - .mii_tx_clk (mii_tx_clk), - .mii_tx_en (mii_tx_en), - .mii_txd (mii_txd), - .linear_flash_addr (linear_flash_addr), - .linear_flash_adv_ldn (linear_flash_adv_ldn), - .linear_flash_ce_n (linear_flash_ce_n), - .linear_flash_dq_io (linear_flash_dq_io), - .linear_flash_oen (linear_flash_oen), - .linear_flash_wen (linear_flash_wen), - .sys_clk_n (sys_clk_n), - .sys_clk_p (sys_clk_p), - .sys_rst (sys_rst), - .uart_sin (uart_sin), - .uart_sout (uart_sout), - .adc_clk_in_n (adc_clk_in_n), - .adc_clk_in_p (adc_clk_in_p), - .adc_data_in_n (adc_data_in_n), - .adc_data_in_p (adc_data_in_p), - .adc_data_or_n (adc_data_or_n), - .adc_data_or_p (adc_data_or_p), - .spi_clk_i (1'b0), - .spi_clk_o (spi_clk), - .spi_csn_i (1'b1), - .spi_csn_o (spi_csn), - .spi_sdi_i (spi_miso), - .spi_sdo_i (1'b0), - .spi_sdo_o (spi_mosi)); - - endmodule diff --git a/projects/adv7511/README.md b/projects/adv7511/README.md index 140614c77a6..1300de3c7f6 100755 --- a/projects/adv7511/README.md +++ b/projects/adv7511/README.md @@ -12,4 +12,4 @@ ## Building the project -Please enter the folder for the FPGA carrier you want to use and read the README.md. \ No newline at end of file +Please enter the folder for the FPGA carrier you want to use and read the README.md. diff --git a/projects/common/kc705/Makefile b/projects/common/kc705/Makefile deleted file mode 100755 index 809f2c8abba..00000000000 --- a/projects/common/kc705/Makefile +++ /dev/null @@ -1,18 +0,0 @@ -#################################################################################### -## Copyright (c) 2018 - 2023 Analog Devices, Inc. -### SPDX short identifier: BSD-1-Clause -## Auto-generated, do not modify! -#################################################################################### - -PROJECT_NAME := template_kc705 - -M_DEPS += ../../scripts/adi_pd.tcl -M_DEPS += ../../common/kc705/kc705_system_mig.prj -M_DEPS += ../../common/kc705/kc705_system_constr.xdc -M_DEPS += ../../common/kc705/kc705_system_bd.tcl -M_DEPS += ../../../library/common/ad_iobuf.v - -LIB_DEPS += axi_sysid -LIB_DEPS += sysid_rom - -include ../../scripts/project-xilinx.mk diff --git a/projects/common/kc705/kc705_fmc_hpc.txt b/projects/common/kc705/kc705_fmc_hpc.txt deleted file mode 100755 index 26c265c3f75..00000000000 --- a/projects/common/kc705/kc705_fmc_hpc.txt +++ /dev/null @@ -1,220 +0,0 @@ -FMC_pin FMC_port_name FPGA_pin FPGA_port_name Comments - -H4 FMC_CLK0_M2C_P D27 IO_L13P_T2_MRCC_16 - -H5 FMC_CLK0_M2C_N C27 IO_L13N_T2_MRCC_16 - -G2 FMC_CLK1_M2C_P D17 IO_L13P_T2_MRCC_17 - -G3 FMC_CLK1_M2C_N D18 IO_L13N_T2_MRCC_17 - -B1 CLK_DIR #N/A #N/A - -K4 CLK2_IO_P #N/A #N/A - -K5 CLK2_IO_N #N/A #N/A - -J2 CLK3_IO_P #N/A #N/A - -J3 CLK3_IO_N #N/A #N/A - -G6 FMC_LA00_CC_P C25 IO_L12P_T1_MRCC_16 - -G7 FMC_LA00_CC_N B25 IO_L12N_T1_MRCC_16 - -D8 FMC_LA01_CC_P D26 IO_L11P_T1_SRCC_16 - -D9 FMC_LA01_CC_N C26 IO_L11N_T1_SRCC_16 - -H7 FMC_LA02_P H24 IO_L19P_T3_16 - -H8 FMC_LA02_N H25 IO_L19N_T3_VREF_16 - -G9 FMC_LA03_P H26 IO_L23P_T3_16 - -G10 FMC_LA03_N H27 IO_L23N_T3_16 - -H10 FMC_LA04_P G28 IO_L20P_T3_16 - -H11 FMC_LA04_N F28 IO_L20N_T3_16 - -D11 FMC_LA05_P G29 IO_L22P_T3_16 - -D12 FMC_LA05_N F30 IO_L22N_T3_16 - -C10 FMC_LA06_P H30 IO_L24P_T3_16 - -C11 FMC_LA06_N G30 IO_L24N_T3_16 - -H13 FMC_LA07_P E28 IO_L14P_T2_SRCC_16 - -H14 FMC_LA07_N D28 IO_L14N_T2_SRCC_16 - -G12 FMC_LA08_P E29 IO_L18P_T2_16 - -G13 FMC_LA08_N E30 IO_L18N_T2_16 - -D14 FMC_LA09_P B30 IO_L17P_T2_16 - -D15 FMC_LA09_N A30 IO_L17N_T2_16 - -C14 FMC_LA10_P D29 IO_L16P_T2_16 - -C15 FMC_LA10_N C30 IO_L16N_T2_16 - -H16 FMC_LA11_P G27 IO_L21P_T3_DQS_16 - -H17 FMC_LA11_N F27 IO_L21N_T3_DQS_16 - -G15 FMC_LA12_P C29 IO_L15P_T2_DQS_16 - -G16 FMC_LA12_N B29 IO_L15N_T2_DQS_16 - -D17 FMC_LA13_P A25 IO_L10P_T1_16 - -D18 FMC_LA13_N A26 IO_L10N_T1_16 - -C18 FMC_LA14_P B28 IO_L9P_T1_DQS_16 - -C19 FMC_LA14_N A28 IO_L9N_T1_DQS_16 - -H19 FMC_LA15_P C24 IO_L8P_T1_16 - -H20 FMC_LA15_N B24 IO_L8N_T1_16 - -G18 FMC_LA16_P B27 IO_L7P_T1_16 - -G19 FMC_LA16_N A27 IO_L7N_T1_16 - -D20 FMC_LA17_CC_P F20 IO_L12P_T1_MRCC_17 - -D21 FMC_LA17_CC_N E20 IO_L12N_T1_MRCC_17 - -C22 FMC_LA18_CC_P F21 IO_L11P_T1_SRCC_17 - -C23 FMC_LA18_CC_N E21 IO_L11N_T1_SRCC_17 - -H22 FMC_LA19_P G18 IO_L16P_T2_17 - -H23 FMC_LA19_N F18 IO_L16N_T2_17 - -G21 FMC_LA20_P E19 IO_L14P_T2_SRCC_17 - -G22 FMC_LA20_N D19 IO_L14N_T2_SRCC_17 - -H25 FMC_LA21_P A20 IO_L21P_T3_DQS_17 - -H26 FMC_LA21_N A21 IO_L21N_T3_DQS_17 - -G24 FMC_LA22_P C20 IO_L19P_T3_17 - -G25 FMC_LA22_N B20 IO_L19N_T3_VREF_17 - -D23 FMC_LA23_P B22 IO_L23P_T3_17 - -D24 FMC_LA23_N A22 IO_L23N_T3_17 - -H28 FMC_LA24_P A16 IO_L20P_T3_17 - -H29 FMC_LA24_N A17 IO_L20N_T3_17 - -G27 FMC_LA25_P G17 IO_L18P_T2_17 - -G28 FMC_LA25_N F17 IO_L18N_T2_17 - -D26 FMC_LA26_P B18 IO_L22P_T3_17 - -D27 FMC_LA26_N A18 IO_L22N_T3_17 - -C26 FMC_LA27_P C19 IO_L24P_T3_17 - -C27 FMC_LA27_N B19 IO_L24N_T3_17 - -H31 FMC_LA28_P D16 IO_L15P_T2_DQS_17 - -H32 FMC_LA28_N C16 IO_L15N_T2_DQS_17 - -G30 FMC_LA29_P C17 IO_L17P_T2_17 - -G31 FMC_LA29_N B17 IO_L17N_T2_17 - -H34 FMC_LA30_P D22 IO_L10P_T1_17 - -H35 FMC_LA30_N C22 IO_L10N_T1_17 - -G33 FMC_LA31_P G22 IO_L9P_T1_DQS_17 - -G34 FMC_LA31_N F22 IO_L9N_T1_DQS_17 - -H37 FMC_LA32_P D21 IO_L8P_T1_17 - -H38 FMC_LA32_N C21 IO_L8N_T1_17 - -G36 FMC_LA33_P H21 IO_L7P_T1_17 - -G37 FMC_LA33_N H22 IO_L7N_T1_17 - -F4 FMC_HA00_CC_P D12 IO_L13P_T2_MRCC_18 - -F5 FMC_HA00_CC_N D13 IO_L13N_T2_MRCC_18 - -E2 FMC_HA01_CC_P H14 IO_L11P_T1_SRCC_18 - -E3 FMC_HA01_CC_N G14 IO_L11N_T1_SRCC_18 - -K7 FMC_HA02_P D11 IO_L18P_T2_18 - -K8 FMC_HA02_N C11 IO_L18N_T2_18 - -J6 FMC_HA03_P C12 IO_L15P_T2_DQS_18 - -J7 FMC_HA03_N B12 IO_L15N_T2_DQS_18 - -F7 FMC_HA04_P F11 IO_L16P_T2_18 - -F8 FMC_HA04_N E11 IO_L16N_T2_18 - -E6 FMC_HA05_P F15 IO_L19P_T3_18 - -E7 FMC_HA05_N E16 IO_L19N_T3_VREF_18 - -K10 FMC_HA06_P D14 IO_L21P_T3_DQS_18 - -K11 FMC_HA06_N C14 IO_L21N_T3_DQS_18 - -J9 FMC_HA07_P B14 IO_L24P_T3_18 - -J10 FMC_HA07_N A15 IO_L24N_T3_18 - -F10 FMC_HA08_P E14 IO_L20P_T3_18 - -F11 FMC_HA08_N E15 IO_L20N_T3_18 - -E9 FMC_HA09_P F12 IO_L14P_T2_SRCC_18 - -E10 FMC_HA09_N E13 IO_L14N_T2_SRCC_18 - -K13 FMC_HA10_P A11 IO_L17P_T2_18 - -K14 FMC_HA10_N A12 IO_L17N_T2_18 - -J12 FMC_HA11_P B13 IO_L22P_T3_18 - -J13 FMC_HA11_N A13 IO_L22N_T3_18 - -F13 FMC_HA12_P C15 IO_L23P_T3_18 - -F14 FMC_HA12_N B15 IO_L23N_T3_18 - -E12 FMC_HA13_P L16 IO_L1P_T0_18 - -E13 FMC_HA13_N K16 IO_L1N_T0_18 - -J15 FMC_HA14_P J16 IO_L9P_T1_DQS_18 - -J16 FMC_HA14_N H16 IO_L9N_T1_DQS_18 - -F16 FMC_HA15_P H15 IO_L7P_T1_18 - -F17 FMC_HA15_N G15 IO_L7N_T1_18 - -E15 FMC_HA16_P L15 IO_L2P_T0_18 - -E16 FMC_HA16_N K15 IO_L2N_T0_18 - -K16 FMC_HA17_CC_P G13 IO_L12P_T1_MRCC_18 - -K17 FMC_HA17_CC_N F13 IO_L12N_T1_MRCC_18 - -J18 FMC_HA18_P K14 IO_L5P_T0_18 - -J19 FMC_HA18_N J14 IO_L5N_T0_18 - -F19 FMC_HA19_P H11 IO_L10P_T1_18 - -F20 FMC_HA19_N H12 IO_L10N_T1_18 - -E18 FMC_HA20_P K13 IO_L4P_T0_18 - -E19 FMC_HA20_N J13 IO_L4N_T0_18 - -K19 FMC_HA21_P J11 IO_L8P_T1_18 - -K20 FMC_HA21_N J12 IO_L8N_T1_18 - -J21 FMC_HA22_P L11 IO_L6P_T0_18 - -J22 FMC_HA22_N K11 IO_L6N_T0_VREF_18 - -K22 FMC_HA23_P L12 IO_L3P_T0_DQS_18 - -K23 FMC_HA23_N L13 IO_L3N_T0_DQS_18 - -K25 FMC_HB00_CC_P #N/A #N/A - -K26 FMC_HB00_CC_N #N/A #N/A - -J24 FMC_HB01_P #N/A #N/A - -J25 FMC_HB01_N #N/A #N/A - -F22 FMC_HB02_P #N/A #N/A - -F23 FMC_HB02_N #N/A #N/A - -E21 FMC_HB03_P #N/A #N/A - -E22 FMC_HB03_N #N/A #N/A - -F25 FMC_HB04_P #N/A #N/A - -F26 FMC_HB04_N #N/A #N/A - -E24 FMC_HB05_P #N/A #N/A - -E25 FMC_HB05_N #N/A #N/A - -K28 FMC_HB06_CC_P #N/A #N/A - -K29 FMC_HB06_CC_N #N/A #N/A - -J27 FMC_HB07_P #N/A #N/A - -J28 FMC_HB07_N #N/A #N/A - -F28 FMC_HB08_P #N/A #N/A - -F29 FMC_HB08_N #N/A #N/A - -E27 FMC_HB09_P #N/A #N/A - -E28 FMC_HB09_N #N/A #N/A - -K31 FMC_HB10_P #N/A #N/A - -K32 FMC_HB10_N #N/A #N/A - -J30 FMC_HB11_P #N/A #N/A - -J31 FMC_HB11_N #N/A #N/A - -F31 FMC_HB12_P #N/A #N/A - -F32 FMC_HB12_N #N/A #N/A - -E30 FMC_HB13_P #N/A #N/A - -E31 FMC_HB13_N #N/A #N/A - -K34 FMC_HB14_P #N/A #N/A - -K35 FMC_HB14_N #N/A #N/A - -J33 FMC_HB15_P #N/A #N/A - -J34 FMC_HB15_N #N/A #N/A - -F34 FMC_HB16_P #N/A #N/A - -F35 FMC_HB16_N #N/A #N/A - -K37 FMC_HB17_CC_P #N/A #N/A - -K38 FMC_HB17_CC_N #N/A #N/A - -J36 FMC_HB18_P #N/A #N/A - -J37 FMC_HB18_N #N/A #N/A - -E33 FMC_HB19_P #N/A #N/A - -E34 FMC_HB19_N #N/A #N/A - -F37 FMC_HB20_P #N/A #N/A - -F38 FMC_HB20_N #N/A #N/A - -E36 FMC_HB21_P #N/A #N/A - -E37 FMC_HB21_N #N/A #N/A - -D4 FMC_GBTCLK0_M2C_P C8 MGTREFCLK0P_118 - -D5 FMC_GBTCLK0_M2C_N C7 MGTREFCLK0N_118 - -B20 FMC_GBTCLK1_M2C_P E8 MGTREFCLK1P_118 - -B21 FMC_GBTCLK1_M2C_N E7 MGTREFCLK1N_118 - -C2 FMC_DP0_C2M_P D2 MGTXTXP0_118 - -C3 FMC_DP0_C2M_N D1 MGTXTXN0_118 - -C6 FMC_DP0_M2C_P E4 MGTXRXP0_118 - -C7 FMC_DP0_M2C_N E3 MGTXRXN0_118 - -A22 FMC_DP1_C2M_P C4 MGTXTXP1_118 - -A23 FMC_DP1_C2M_N C3 MGTXTXN1_118 - -A2 FMC_DP1_M2C_P D6 MGTXRXP1_118 - -A3 FMC_DP1_M2C_N D5 MGTXRXN1_118 - -A26 FMC_DP2_C2M_P B2 MGTXTXP2_118 - -A27 FMC_DP2_C2M_N B1 MGTXTXN2_118 - -A6 FMC_DP2_M2C_P B6 MGTXRXP2_118 - -A7 FMC_DP2_M2C_N B5 MGTXRXN2_118 - -A30 FMC_DP3_C2M_P A4 MGTXTXP3_118 - -A31 FMC_DP3_C2M_N A3 MGTXTXN3_118 - -A10 FMC_DP3_M2C_P A8 MGTXRXP3_118 - -A11 FMC_DP3_M2C_N A7 MGTXRXN3_118 - -A34 FMC_DP4_C2M_P #N/A #N/A - -A35 FMC_DP4_C2M_N #N/A #N/A - -A14 FMC_DP4_M2C_P #N/A #N/A - -A15 FMC_DP4_M2C_N #N/A #N/A - -A38 FMC_DP5_C2M_P #N/A #N/A - -A39 FMC_DP5_C2M_N #N/A #N/A - -A18 FMC_DP5_M2C_P #N/A #N/A - -A19 FMC_DP5_M2C_N #N/A #N/A - -B36 FMC_DP6_C2M_P #N/A #N/A - -B37 FMC_DP6_C2M_N #N/A #N/A - -B16 FMC_DP6_M2C_P #N/A #N/A - -B17 FMC_DP6_M2C_N #N/A #N/A - -B32 FMC_DP7_C2M_P #N/A #N/A - -B33 FMC_DP7_C2M_N #N/A #N/A - -B12 FMC_DP7_M2C_P #N/A #N/A - -B13 FMC_DP7_M2C_N #N/A #N/A - -B28 FMC_DP8_C2M_P #N/A #N/A - -B29 FMC_DP8_C2M_N #N/A #N/A - -B8 FMC_DP8_M2C_P #N/A #N/A - -B9 FMC_DP8_M2C_N #N/A #N/A - -B24 FMC_DP9_C2M_P #N/A #N/A - -B25 FMC_DP9_C2M_N #N/A #N/A - -B4 FMC_DP9_M2C_P #N/A #N/A - -B5 FMC_DP9_M2C_N #N/A #N/A - -C30 FMC_SCL #N/A #N/A - -C31 FMC_SDA #N/A #N/A - -D1 PG_C2M #N/A #N/A - -F1 FMC_PG_M2C J29 IO_L7P_T1_AD10P_15 - -H2 FMC_PRSNT_M2C_L M20 IO_L6P_T0_15 - \ No newline at end of file diff --git a/projects/common/kc705/kc705_fmc_lpc.txt b/projects/common/kc705/kc705_fmc_lpc.txt deleted file mode 100755 index a8ea3517148..00000000000 --- a/projects/common/kc705/kc705_fmc_lpc.txt +++ /dev/null @@ -1,84 +0,0 @@ -FMC_pin FMC_port_name FPGA_pin FPGA_port_name Comments - -H4 FMC_CLK0_M2C_P AF22 IO_L13P_T2_MRCC_12 - -H5 FMC_CLK0_M2C_N AG23 IO_L13N_T2_MRCC_12 - -G2 FMC_CLK1_M2C_P AG29 IO_L13P_T2_MRCC_13 - -G3 FMC_CLK1_M2C_N AH29 IO_L13N_T2_MRCC_13 - -G6 FMC_LA00_CC_P AD23 IO_L12P_T1_MRCC_12 - -G7 FMC_LA00_CC_N AE24 IO_L12N_T1_MRCC_12 - -D8 FMC_LA01_CC_P AE23 IO_L11P_T1_SRCC_12 - -D9 FMC_LA01_CC_N AF23 IO_L11N_T1_SRCC_12 - -H7 FMC_LA02_P AF20 IO_L19P_T3_12 - -H8 FMC_LA02_N AF21 IO_L19N_T3_VREF_12 - -G9 FMC_LA03_P AG20 IO_L22P_T3_12 - -G10 FMC_LA03_N AH20 IO_L22N_T3_12 - -H10 FMC_LA04_P AH21 IO_L23P_T3_12 - -H11 FMC_LA04_N AJ21 IO_L23N_T3_12 - -D11 FMC_LA05_P AG22 IO_L20P_T3_12 - -D12 FMC_LA05_N AH22 IO_L20N_T3_12 - -C10 FMC_LA06_P AK20 IO_L24P_T3_12 - -C11 FMC_LA06_N AK21 IO_L24N_T3_12 - -H13 FMC_LA07_P AG25 IO_L18P_T2_12 - -H14 FMC_LA07_N AH25 IO_L18N_T2_12 - -G12 FMC_LA08_P AJ22 IO_L21P_T3_DQS_1 - -G13 FMC_LA08_N AJ23 IO_L21N_T3_DQS_1 - -D14 FMC_LA09_P AK23 IO_L17P_T2_12 - -D15 FMC_LA09_N AK24 IO_L17N_T2_12 - -C14 FMC_LA10_P AJ24 IO_L15P_T2_DQS_1 - -C15 FMC_LA10_N AK25 IO_L15N_T2_DQS_1 - -H16 FMC_LA11_P AE25 IO_L16P_T2_12 - -H17 FMC_LA11_N AF25 IO_L16N_T2_12 - -G15 FMC_LA12_P AA20 IO_L6P_T0_12 - -G16 FMC_LA12_N AB20 IO_L6N_T0_VREF_1 - -D17 FMC_LA13_P AB24 IO_L7P_T1_12 - -D18 FMC_LA13_N AC25 IO_L7N_T1_12 - -C18 FMC_LA14_P AD21 IO_L10P_T1_12 - -C19 FMC_LA14_N AE21 IO_L10N_T1_12 - -H19 FMC_LA15_P AC24 IO_L9P_T1_DQS_12 - -H20 FMC_LA15_N AD24 IO_L9N_T1_DQS_12 - -G18 FMC_LA16_P AC22 IO_L8P_T1_12 - -G19 FMC_LA16_N AD22 IO_L8N_T1_12 - -D20 FMC_LA17_CC_P AB27 IO_L12P_T1_MRCC_13 - -D21 FMC_LA17_CC_N AC27 IO_L12N_T1_MRCC_13 - -C22 FMC_LA18_CC_P AD27 IO_L11P_T1_SRCC_13 - -C23 FMC_LA18_CC_N AD28 IO_L11N_T1_SRCC_13 - -H22 FMC_LA19_P AJ26 IO_L24P_T3_13 - -H23 FMC_LA19_N AK26 IO_L24N_T3_13 - -G21 FMC_LA20_P AF26 IO_L23P_T3_13 - -G22 FMC_LA20_N AF27 IO_L23N_T3_13 - -H25 FMC_LA21_P AG27 IO_L21P_T3_DQS_13 - -H26 FMC_LA21_N AG28 IO_L21N_T3_DQS_13 - -G24 FMC_LA22_P AJ27 IO_L20P_T3_13 - -G25 FMC_LA22_N AK28 IO_L20N_T3_13 - -D23 FMC_LA23_P AH26 IO_L22P_T3_13 - -D24 FMC_LA23_N AH27 IO_L22N_T3_13 - -H28 FMC_LA24_P AG30 IO_L18P_T2_13 - -H29 FMC_LA24_N AH30 IO_L18N_T2_13 - -G27 FMC_LA25_P AC26 IO_L19P_T3_13 - -G28 FMC_LA25_N AD26 IO_L19N_T3_VREF_13 - -D26 FMC_LA26_P AK29 IO_L15P_T2_DQS_13 - -D27 FMC_LA26_N AK30 IO_L15N_T2_DQS_13 - -C26 FMC_LA27_P AJ28 IO_L17P_T2_13 - -C27 FMC_LA27_N AJ29 IO_L17N_T2_13 - -H31 FMC_LA28_P AE30 IO_L16P_T2_13 - -H32 FMC_LA28_N AF30 IO_L16N_T2_13 - -G30 FMC_LA29_P AE28 IO_L14P_T2_SRCC_13 - -G31 FMC_LA29_N AF28 IO_L14N_T2_SRCC_13 - -H34 FMC_LA30_P AB29 IO_L10P_T1_13 - -H35 FMC_LA30_N AB30 IO_L10N_T1_13 - -G33 FMC_LA31_P AD29 IO_L9P_T1_DQS_13 - -G34 FMC_LA31_N AE29 IO_L9N_T1_DQS_13 - -H37 FMC_LA32_P Y30 IO_L8P_T1_13 - -H38 FMC_LA32_N AA30 IO_L8N_T1_13 - -G36 FMC_LA33_P AC29 IO_L7P_T1_13 - -G37 FMC_LA33_N AC30 IO_L7N_T1_13 - -C30 FMC_SCL #N/A #N/A - -C31 FMC_SDA #N/A #N/A - -D4 FMC_GBTCLK0_M2C_P N8 MGTREFCLK1P_116 - -D5 FMC_GBTCLK0_M2C_N N7 MGTREFCLK1N_116 - -C2 FMC_DP0_C2M_P F2 MGTXTXP3_117 - -C3 FMC_DP0_C2M_N F1 MGTXTXN3_117 - -C6 FMC_DP0_M2C_P F6 MGTXRXP3_117 - -C7 FMC_DP0_M2C_N F5 MGTXRXN3_117 - -D1 PG_C2M #N/A #N/A - -H2 FMC_PRSNT_M2C_L J22 IO_L5N_T0_AD2N_15 - \ No newline at end of file diff --git a/projects/common/kc705/kc705_system_bd.tcl b/projects/common/kc705/kc705_system_bd.tcl deleted file mode 100644 index ec4e1c194b9..00000000000 --- a/projects/common/kc705/kc705_system_bd.tcl +++ /dev/null @@ -1,296 +0,0 @@ -############################################################################### -## Copyright (C) 2014-2025 Analog Devices, Inc. All rights reserved. -### SPDX short identifier: ADIBSD -############################################################################### - -set CACHE_COHERENCY false - -# create board design -# interface ports - -create_bd_port -dir I -type rst sys_rst -create_bd_port -dir I sys_clk_p -create_bd_port -dir I sys_clk_n - -create_bd_intf_port -mode Master -vlnv xilinx.com:interface:ddrx_rtl:1.0 ddr3 - -create_bd_intf_port -mode Master -vlnv xilinx.com:interface:mdio_rtl:1.0 mdio -create_bd_intf_port -mode Master -vlnv xilinx.com:interface:mii_rtl:1.0 mii - -create_bd_intf_port -mode Master -vlnv xilinx.com:interface:gpio_rtl:1.0 gpio_lcd - -create_bd_intf_port -mode Master -vlnv xilinx.com:interface:iic_rtl:1.0 iic_main - -create_bd_port -dir I uart_sin -create_bd_port -dir O uart_sout - -create_bd_intf_port -mode Master -vlnv xilinx.com:interface:emc_rtl:1.0 linear_flash - -create_bd_port -dir O -from 7 -to 0 spi_csn_o -create_bd_port -dir I -from 7 -to 0 spi_csn_i -create_bd_port -dir I spi_clk_i -create_bd_port -dir O spi_clk_o -create_bd_port -dir I spi_sdo_i -create_bd_port -dir O spi_sdo_o -create_bd_port -dir I spi_sdi_i - -create_bd_port -dir I -from 31 -to 0 gpio0_i -create_bd_port -dir O -from 31 -to 0 gpio0_o -create_bd_port -dir O -from 31 -to 0 gpio0_t -create_bd_port -dir I -from 31 -to 0 gpio1_i -create_bd_port -dir O -from 31 -to 0 gpio1_o -create_bd_port -dir O -from 31 -to 0 gpio1_t - -# io settings - -set_property -dict [list CONFIG.POLARITY {ACTIVE_HIGH}] [get_bd_ports sys_rst] - -# instance: microblaze - processor - -ad_ip_instance microblaze sys_mb -ad_ip_parameter sys_mb CONFIG.G_TEMPLATE_LIST 4 -ad_ip_parameter sys_mb CONFIG.C_DCACHE_FORCE_TAG_LUTRAM 1 - -# instance: microblaze - local memory & bus - -ad_ip_instance lmb_v10 sys_dlmb -ad_ip_instance lmb_v10 sys_ilmb - -ad_ip_instance lmb_bram_if_cntlr sys_dlmb_cntlr -ad_ip_parameter sys_dlmb_cntlr CONFIG.C_ECC 0 - -ad_ip_instance lmb_bram_if_cntlr sys_ilmb_cntlr -ad_ip_parameter sys_ilmb_cntlr CONFIG.C_ECC 0 - -ad_ip_instance blk_mem_gen sys_lmb_bram -ad_ip_parameter sys_lmb_bram CONFIG.Memory_Type True_Dual_Port_RAM -ad_ip_parameter sys_lmb_bram CONFIG.use_bram_block BRAM_Controller - -# instance: microblaze- mdm - -ad_ip_instance mdm sys_mb_debug -ad_ip_parameter sys_mb_debug CONFIG.C_USE_UART 1 - -# instance: system reset/clocks - -ad_ip_instance proc_sys_reset sys_rstgen -ad_ip_parameter sys_rstgen CONFIG.C_EXT_RST_WIDTH 1 -ad_ip_instance proc_sys_reset sys_200m_rstgen -ad_ip_parameter sys_200m_rstgen CONFIG.C_EXT_RST_WIDTH 1 - -# instance: ddr (mig) - -ad_ip_instance mig_7series axi_ddr_cntrl -set axi_ddr_cntrl_dir [get_property IP_DIR [get_ips [get_property CONFIG.Component_Name [get_bd_cells axi_ddr_cntrl]]]] -file copy -force $ad_hdl_dir/projects/common/kc705/kc705_system_mig.prj "$axi_ddr_cntrl_dir/" -ad_ip_parameter axi_ddr_cntrl CONFIG.XML_INPUT_FILE kc705_system_mig.prj - -# instance: default peripherals - -ad_ip_instance axi_ethernetlite axi_ethernet -ad_ip_parameter axi_ethernet CONFIG.USE_BOARD_FLOW true -ad_ip_parameter axi_ethernet CONFIG.MII_BOARD_INTERFACE mii -ad_ip_parameter axi_ethernet CONFIG.MDIO_BOARD_INTERFACE mdio_mdc - -ad_ip_instance axi_iic axi_iic_main - -ad_ip_instance axi_uartlite axi_uart -ad_ip_parameter axi_uart CONFIG.C_BAUDRATE 115200 - -ad_ip_instance axi_timer axi_timer - -ad_ip_instance axi_gpio axi_gpio_lcd -ad_ip_parameter axi_gpio_lcd CONFIG.C_GPIO_WIDTH 7 -ad_ip_parameter axi_gpio_lcd CONFIG.C_INTERRUPT_PRESENT 1 - -ad_ip_instance axi_quad_spi axi_spi -ad_ip_parameter axi_spi CONFIG.C_USE_STARTUP 0 -ad_ip_parameter axi_spi CONFIG.C_NUM_SS_BITS 8 -ad_ip_parameter axi_spi CONFIG.C_SCK_RATIO 8 - -ad_ip_instance axi_gpio axi_gpio -ad_ip_parameter axi_gpio CONFIG.C_IS_DUAL 1 -ad_ip_parameter axi_gpio CONFIG.C_GPIO_WIDTH 32 -ad_ip_parameter axi_gpio CONFIG.C_GPIO2_WIDTH 32 -ad_ip_parameter axi_gpio CONFIG.C_INTERRUPT_PRESENT 1 - -# instance: interrupt - -ad_ip_instance axi_intc axi_intc -ad_ip_parameter axi_intc CONFIG.C_HAS_FAST 0 - -ad_ip_instance xlconcat sys_concat_intc -ad_ip_parameter sys_concat_intc CONFIG.NUM_PORTS 16 - -# linear flash - -ad_ip_instance axi_emc axi_linear_flash -ad_ip_parameter axi_linear_flash CONFIG.USE_BOARD_FLOW true -ad_ip_parameter axi_linear_flash CONFIG.EMC_BOARD_INTERFACE linear_flash -ad_ip_parameter axi_linear_flash CONFIG.C_MEM0_TYPE 2 -ad_ip_parameter axi_linear_flash CONFIG.C_S_AXI_MEM_ID_WIDTH 0 -ad_ip_parameter axi_linear_flash CONFIG.C_THZCE_PS_MEM_0 20000 -ad_ip_parameter axi_linear_flash CONFIG.C_TLZWE_PS_MEM_0 0 -ad_ip_parameter axi_linear_flash CONFIG.C_TWC_PS_MEM_0 19000 -ad_ip_parameter axi_linear_flash CONFIG.C_WR_REC_TIME_MEM_0 0 -ad_ip_parameter axi_linear_flash CONFIG.C_TWP_PS_MEM_0 50000 -ad_ip_parameter axi_linear_flash CONFIG.C_TWPH_PS_MEM_0 20000 -ad_ip_parameter axi_linear_flash CONFIG.C_TPACC_PS_FLASH_0 25000 -ad_ip_parameter axi_linear_flash CONFIG.C_TCEDV_PS_MEM_0 100000 -ad_ip_parameter axi_linear_flash CONFIG.C_TAVDV_PS_MEM_0 100000 -ad_ip_parameter axi_linear_flash CONFIG.C_THZOE_PS_MEM_0 15000 - -# system id - -ad_ip_instance axi_sysid axi_sysid_0 -ad_ip_instance sysid_rom rom_sys_0 - -ad_connect axi_sysid_0/rom_addr rom_sys_0/rom_addr -ad_connect axi_sysid_0/sys_rom_data rom_sys_0/rom_data -ad_connect sys_cpu_clk rom_sys_0/clk - -# connections - -ad_connect sys_mb_debug/Debug_SYS_Rst sys_rstgen/mb_debug_sys_rst -ad_connect sys_rstgen/mb_reset sys_mb/Reset -ad_connect sys_rstgen/bus_struct_reset sys_dlmb/SYS_Rst -ad_connect sys_rstgen/bus_struct_reset sys_ilmb/SYS_Rst -ad_connect sys_rstgen/bus_struct_reset sys_dlmb_cntlr/LMB_Rst -ad_connect sys_rstgen/bus_struct_reset sys_ilmb_cntlr/LMB_Rst - -# microblaze local memory - -ad_connect sys_dlmb/LMB_Sl_0 sys_dlmb_cntlr/SLMB -ad_connect sys_ilmb/LMB_Sl_0 sys_ilmb_cntlr/SLMB -ad_connect sys_dlmb_cntlr/BRAM_PORT sys_lmb_bram/BRAM_PORTA -ad_connect sys_ilmb_cntlr/BRAM_PORT sys_lmb_bram/BRAM_PORTB -ad_connect sys_mb/DLMB sys_dlmb/LMB_M -ad_connect sys_mb/ILMB sys_ilmb/LMB_M - -# microblaze debug & interrupt - -ad_connect sys_mb_debug/MBDEBUG_0 sys_mb/DEBUG -ad_connect axi_intc/interrupt sys_mb/INTERRUPT -ad_connect sys_concat_intc/dout axi_intc/intr - -# defaults (peripherals) - -ad_connect axi_ddr_cntrl/mmcm_locked sys_rstgen/dcm_locked -ad_connect axi_ddr_cntrl/mmcm_locked sys_200m_rstgen/dcm_locked - -ad_connect sys_cpu_clk axi_ddr_cntrl/ui_addn_clk_0 -ad_connect sys_200m_clk axi_ddr_cntrl/ui_clk -ad_connect sys_cpu_resetn axi_ddr_cntrl/aresetn -ad_connect sys_cpu_reset sys_rstgen/peripheral_reset -ad_connect sys_cpu_resetn sys_rstgen/peripheral_aresetn -ad_connect sys_200m_reset sys_200m_rstgen/peripheral_reset -ad_connect sys_200m_resetn sys_200m_rstgen/peripheral_aresetn - -# generic system clocks pointers - -set sys_cpu_clk [get_bd_nets sys_cpu_clk] -set sys_dma_clk [get_bd_nets sys_200m_clk] -set sys_iodelay_clk [get_bd_nets sys_200m_clk] - -set sys_cpu_reset [get_bd_nets sys_cpu_reset] -set sys_cpu_resetn [get_bd_nets sys_cpu_resetn] -set sys_dma_reset [get_bd_nets sys_200m_reset] -set sys_dma_resetn [get_bd_nets sys_200m_resetn] -set sys_iodelay_reset [get_bd_nets sys_200m_reset] -set sys_iodelay_resetn [get_bd_nets sys_200m_resetn] - -ad_connect sys_cpu_clk sys_rstgen/slowest_sync_clk -ad_connect sys_200m_clk sys_200m_rstgen/slowest_sync_clk -ad_connect sys_cpu_clk sys_mb/Clk -ad_connect sys_cpu_clk sys_dlmb/LMB_Clk -ad_connect sys_cpu_clk sys_ilmb/LMB_Clk -ad_connect sys_cpu_clk sys_dlmb_cntlr/LMB_Clk -ad_connect sys_cpu_clk sys_ilmb_cntlr/LMB_Clk -ad_connect sys_cpu_clk axi_spi/ext_spi_clk - -# defaults (interrupts) - -ad_connect sys_concat_intc/In0 axi_timer/interrupt -ad_connect sys_concat_intc/In1 axi_ethernet/ip2intc_irpt -ad_connect sys_concat_intc/In2 GND -ad_connect sys_concat_intc/In3 GND -ad_connect sys_concat_intc/In4 axi_uart/interrupt -ad_connect sys_concat_intc/In5 axi_gpio_lcd/ip2intc_irpt -ad_connect sys_concat_intc/In6 GND -ad_connect sys_concat_intc/In7 GND -ad_connect sys_concat_intc/In8 GND -ad_connect sys_concat_intc/In9 axi_iic_main/iic2intc_irpt -ad_connect sys_concat_intc/In10 axi_spi/ip2intc_irpt -ad_connect sys_concat_intc/In11 axi_gpio/ip2intc_irpt -ad_connect sys_concat_intc/In12 GND -ad_connect sys_concat_intc/In13 GND -ad_connect sys_concat_intc/In14 GND -ad_connect sys_concat_intc/In15 GND - -# defaults (external interface) - -ad_connect sys_rst sys_rstgen/ext_reset_in -ad_connect sys_rst axi_ddr_cntrl/sys_rst -ad_connect sys_200m_rst sys_200m_rstgen/ext_reset_in -ad_connect sys_200m_rst axi_ddr_cntrl/ui_clk_sync_rst -ad_connect sys_clk_p axi_ddr_cntrl/sys_clk_p -ad_connect sys_clk_n axi_ddr_cntrl/sys_clk_n -ad_connect ddr3 axi_ddr_cntrl/DDR3 -ad_connect mdio axi_ethernet/mdio -ad_connect mii axi_ethernet/mii -ad_connect uart_sin axi_uart/rx -ad_connect uart_sout axi_uart/tx -ad_connect gpio_lcd axi_gpio_lcd/gpio -ad_connect iic_main axi_iic_main/iic - -ad_connect spi_csn_i axi_spi/ss_i -ad_connect spi_csn_o axi_spi/ss_o -ad_connect spi_clk_i axi_spi/sck_i -ad_connect spi_clk_o axi_spi/sck_o -ad_connect spi_sdo_i axi_spi/io0_i -ad_connect spi_sdo_o axi_spi/io0_o -ad_connect spi_sdi_i axi_spi/io1_i -ad_connect gpio0_i axi_gpio/gpio_io_i -ad_connect gpio0_o axi_gpio/gpio_io_o -ad_connect gpio0_t axi_gpio/gpio_io_t -ad_connect gpio1_i axi_gpio/gpio2_io_i -ad_connect gpio1_o axi_gpio/gpio2_io_o -ad_connect gpio1_t axi_gpio/gpio2_io_t - -# linear_flash - -ad_connect axi_linear_flash/EMC_INTF linear_flash - -ad_connect sys_cpu_resetn axi_linear_flash/s_axi_aresetn -ad_connect sys_cpu_clk axi_linear_flash/s_axi_aclk -ad_connect sys_cpu_clk axi_linear_flash/rdclk - -# address map - -ad_cpu_interconnect 0x41400000 sys_mb_debug -ad_cpu_interconnect 0x40E00000 axi_ethernet -ad_cpu_interconnect 0x40010000 axi_gpio_lcd -ad_cpu_interconnect 0x41200000 axi_intc -ad_cpu_interconnect 0x41C00000 axi_timer -ad_cpu_interconnect 0x40600000 axi_uart -ad_cpu_interconnect 0x41600000 axi_iic_main -ad_cpu_interconnect 0x45000000 axi_sysid_0 -ad_cpu_interconnect 0x40000000 axi_gpio -ad_cpu_interconnect 0x44A70000 axi_spi -ad_cpu_interconnect 0x60000000 axi_linear_flash - -ad_mem_hp0_interconnect sys_200m_clk axi_ddr_cntrl/S_AXI -ad_mem_hp0_interconnect sys_cpu_clk sys_mb/M_AXI_DC -ad_mem_hp0_interconnect sys_cpu_clk sys_mb/M_AXI_IC - -create_bd_addr_seg -range 0x20000 -offset 0x0 [get_bd_addr_spaces sys_mb/Data] \ - [get_bd_addr_segs sys_dlmb_cntlr/SLMB/Mem] SEG_dlmb_cntlr -create_bd_addr_seg -range 0x20000 -offset 0x0 [get_bd_addr_spaces sys_mb/Instruction] \ - [get_bd_addr_segs sys_ilmb_cntlr/SLMB/Mem] SEG_ilmb_cntlr - -set_property range 0x8000000 [get_bd_addr_segs {sys_mb/Data/SEG_data_axi_linear_flash}] -set_property range 0x2000 [get_bd_addr_segs {sys_mb/Data/SEG_data_axi_ethernet}] - -ad_connect axi_ddr_cntrl/device_temp_i GND - - diff --git a/projects/common/kc705/kc705_system_constr.xdc b/projects/common/kc705/kc705_system_constr.xdc deleted file mode 100644 index f840b7cc19d..00000000000 --- a/projects/common/kc705/kc705_system_constr.xdc +++ /dev/null @@ -1,98 +0,0 @@ -############################################################################### -## Copyright (C) 2014-2023 Analog Devices, Inc. All rights reserved. -### SPDX short identifier: ADIBSD -############################################################################### - -# constraints - -set_property -dict {PACKAGE_PIN AB7 IOSTANDARD LVCMOS15} [get_ports sys_rst] - -# clocks - -set_property -dict {PACKAGE_PIN AD12 IOSTANDARD DIFF_SSTL15} [get_ports sys_clk_p] -set_property -dict {PACKAGE_PIN AD11 IOSTANDARD DIFF_SSTL15} [get_ports sys_clk_n] - -# ddr - -set_property -dict {PACKAGE_PIN AF11 IOSTANDARD SSTL15} [get_ports {ddr3_1_p[0]}] -set_property -dict {PACKAGE_PIN AE8 IOSTANDARD SSTL15} [get_ports {ddr3_1_p[1]}] -set_property -dict {PACKAGE_PIN AE11 IOSTANDARD SSTL15} [get_ports {ddr3_1_n[0]}] -set_property -dict {PACKAGE_PIN AE10 IOSTANDARD SSTL15} [get_ports {ddr3_1_n[1]}] -set_property -dict {PACKAGE_PIN AC10 IOSTANDARD SSTL15} [get_ports {ddr3_1_n[2]}] - -set_property slave_banks {32 34} [get_iobanks 33] - -# ethernet - -set_property -dict {PACKAGE_PIN L20 IOSTANDARD LVCMOS25} [get_ports mii_rst_n] -set_property -dict {PACKAGE_PIN W19 IOSTANDARD LVCMOS25} [get_ports mii_col] -set_property -dict {PACKAGE_PIN R30 IOSTANDARD LVCMOS25} [get_ports mii_crs] -set_property -dict {PACKAGE_PIN R23 IOSTANDARD LVCMOS25} [get_ports mdio_mdc] -set_property -dict {PACKAGE_PIN J21 IOSTANDARD LVCMOS25} [get_ports mdio_mdio] -set_property -dict {PACKAGE_PIN U27 IOSTANDARD LVCMOS25} [get_ports mii_rx_clk] -set_property -dict {PACKAGE_PIN R28 IOSTANDARD LVCMOS25} [get_ports mii_rx_dv] -set_property -dict {PACKAGE_PIN V26 IOSTANDARD LVCMOS25} [get_ports mii_rx_er] -set_property -dict {PACKAGE_PIN U30 IOSTANDARD LVCMOS25} [get_ports mii_rxd[0]] -set_property -dict {PACKAGE_PIN U25 IOSTANDARD LVCMOS25} [get_ports mii_rxd[1]] -set_property -dict {PACKAGE_PIN T25 IOSTANDARD LVCMOS25} [get_ports mii_rxd[2]] -set_property -dict {PACKAGE_PIN U28 IOSTANDARD LVCMOS25} [get_ports mii_rxd[3]] -set_property -dict {PACKAGE_PIN M28 IOSTANDARD LVCMOS25} [get_ports mii_tx_clk] -set_property -dict {PACKAGE_PIN M27 IOSTANDARD LVCMOS25} [get_ports mii_tx_en] -set_property -dict {PACKAGE_PIN N27 IOSTANDARD LVCMOS25} [get_ports mii_txd[0]] -set_property -dict {PACKAGE_PIN N25 IOSTANDARD LVCMOS25} [get_ports mii_txd[1]] -set_property -dict {PACKAGE_PIN M29 IOSTANDARD LVCMOS25} [get_ports mii_txd[2]] -set_property -dict {PACKAGE_PIN L28 IOSTANDARD LVCMOS25} [get_ports mii_txd[3]] - -# uart - -set_property -dict {PACKAGE_PIN M19 IOSTANDARD LVCMOS25} [get_ports uart_sin] -set_property -dict {PACKAGE_PIN K24 IOSTANDARD LVCMOS25} [get_ports uart_sout] - -# fan - -set_property -dict {PACKAGE_PIN L26 IOSTANDARD LVCMOS25} [get_ports fan_pwm] - -# lcd - -set_property -dict {PACKAGE_PIN AB10 IOSTANDARD LVCMOS15} [get_ports gpio_lcd[6]] -set_property -dict {PACKAGE_PIN Y11 IOSTANDARD LVCMOS15} [get_ports gpio_lcd[5]] -set_property -dict {PACKAGE_PIN AB13 IOSTANDARD LVCMOS15} [get_ports gpio_lcd[4]] -set_property -dict {PACKAGE_PIN Y10 IOSTANDARD LVCMOS15} [get_ports gpio_lcd[3]] -set_property -dict {PACKAGE_PIN AA11 IOSTANDARD LVCMOS15} [get_ports gpio_lcd[2]] -set_property -dict {PACKAGE_PIN AA10 IOSTANDARD LVCMOS15} [get_ports gpio_lcd[1]] -set_property -dict {PACKAGE_PIN AA13 IOSTANDARD LVCMOS15} [get_ports gpio_lcd[0]] - -# sw & led - -set_property -dict {PACKAGE_PIN Y29 IOSTANDARD LVCMOS25} [get_ports gpio_bd[0]] -set_property -dict {PACKAGE_PIN W29 IOSTANDARD LVCMOS25} [get_ports gpio_bd[1]] -set_property -dict {PACKAGE_PIN AA28 IOSTANDARD LVCMOS25} [get_ports gpio_bd[2]] -set_property -dict {PACKAGE_PIN Y28 IOSTANDARD LVCMOS25} [get_ports gpio_bd[3]] -set_property -dict {PACKAGE_PIN AA12 IOSTANDARD LVCMOS15} [get_ports gpio_bd[4]] -set_property -dict {PACKAGE_PIN AG5 IOSTANDARD LVCMOS15} [get_ports gpio_bd[5]] -set_property -dict {PACKAGE_PIN AB12 IOSTANDARD LVCMOS15} [get_ports gpio_bd[6]] -set_property -dict {PACKAGE_PIN AC6 IOSTANDARD LVCMOS15} [get_ports gpio_bd[7]] -set_property -dict {PACKAGE_PIN G12 IOSTANDARD LVCMOS25} [get_ports gpio_bd[8]] -set_property -dict {PACKAGE_PIN AB8 IOSTANDARD LVCMOS15} [get_ports gpio_bd[9]] -set_property -dict {PACKAGE_PIN AA8 IOSTANDARD LVCMOS15} [get_ports gpio_bd[10]] -set_property -dict {PACKAGE_PIN AC9 IOSTANDARD LVCMOS15} [get_ports gpio_bd[11]] -set_property -dict {PACKAGE_PIN AB9 IOSTANDARD LVCMOS15} [get_ports gpio_bd[12]] -set_property -dict {PACKAGE_PIN AE26 IOSTANDARD LVCMOS25} [get_ports gpio_bd[13]] -set_property -dict {PACKAGE_PIN G19 IOSTANDARD LVCMOS25} [get_ports gpio_bd[14]] -set_property -dict {PACKAGE_PIN E18 IOSTANDARD LVCMOS25} [get_ports gpio_bd[15]] -set_property -dict {PACKAGE_PIN F16 IOSTANDARD LVCMOS25} [get_ports gpio_bd[16]] - -# iic - -set_property -dict {PACKAGE_PIN P23 IOSTANDARD LVCMOS25} [get_ports iic_rstn] -set_property -dict {PACKAGE_PIN K21 IOSTANDARD LVCMOS25 DRIVE 8 SLEW SLOW} [get_ports iic_scl] -set_property -dict {PACKAGE_PIN L21 IOSTANDARD LVCMOS25 DRIVE 8 SLEW SLOW} [get_ports iic_sda] - -#Setting the Configuration Bank Voltage Select -set_property CFGBVS VCCO [current_design] -set_property CONFIG_VOLTAGE 2.5 [current_design] - -# Create SPI clock -create_generated_clock -name spi_clk \ - -source [get_pins i_system_wrapper/system_i/axi_spi/ext_spi_clk] \ - -divide_by 2 [get_pins i_system_wrapper/system_i/axi_spi/sck_o] diff --git a/projects/common/kc705/kc705_system_mig.prj b/projects/common/kc705/kc705_system_mig.prj deleted file mode 100644 index 74c44543df7..00000000000 --- a/projects/common/kc705/kc705_system_mig.prj +++ /dev/null @@ -1,203 +0,0 @@ - - - - system_axi_ddr_cntrl_0 - 1 - 1 - OFF - 1024 - ON - Disabled - xc7k325t-ffg900/-2 - 2.3 - Differential - Use System Clock - ACTIVE HIGH - FALSE - 0 - 40 Ohms - 1 - - DDR3_SDRAM/SODIMMs/MT8JTF12864HZ-1G6 - 1250 - 2.0V - 4:1 - 200 - 1 - 800 - 8.000 - 1 - 1 - 1 - 1 - 64 - 1 - 1 - Disabled - Normal - FALSE - - 14 - 10 - 3 - 1.5V - 1073741824 - BANK_ROW_COLUMN - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 8 - Fixed - Sequential - 11 - Normal - No - Slow Exit - Enable - RZQ/7 - Disable - Enable - RZQ/6 - 0 - Disabled - Enabled - Output Buffer Enabled - Full Array - 8 - Enabled - Normal - Dynamic ODT off - AXI - - RD_PRI_REG - 30 - 512 - 3 - 0 - - - - diff --git a/projects/common/kc705/system_bd.tcl b/projects/common/kc705/system_bd.tcl deleted file mode 100755 index 064ca17add1..00000000000 --- a/projects/common/kc705/system_bd.tcl +++ /dev/null @@ -1,14 +0,0 @@ -############################################################################### -## Copyright (C) 2022-2023 Analog Devices, Inc. All rights reserved. -### SPDX short identifier: ADIBSD -############################################################################### - -source $ad_hdl_dir/projects/scripts/adi_pd.tcl -source $ad_hdl_dir/projects/common/kc705/kc705_system_bd.tcl - -#system ID -ad_ip_parameter axi_sysid_0 CONFIG.ROM_ADDR_BITS 9 -ad_ip_parameter rom_sys_0 CONFIG.PATH_TO_FILE "$mem_init_sys_file_path/mem_init_sys.txt" -ad_ip_parameter rom_sys_0 CONFIG.ROM_ADDR_BITS 9 - -sysid_gen_sys_init_file diff --git a/projects/common/kc705/system_project.tcl b/projects/common/kc705/system_project.tcl deleted file mode 100755 index f2268ab419c..00000000000 --- a/projects/common/kc705/system_project.tcl +++ /dev/null @@ -1,16 +0,0 @@ -############################################################################### -## Copyright (C) 2022-2023 Analog Devices, Inc. All rights reserved. -### SPDX short identifier: ADIBSD -############################################################################### - -source ../../../scripts/adi_env.tcl -source $ad_hdl_dir/projects/scripts/adi_project_xilinx.tcl -source $ad_hdl_dir/projects/scripts/adi_board.tcl - -adi_project template_kc705 -adi_project_files template_kc705 [list \ - "$ad_hdl_dir/library/common/ad_iobuf.v" \ - "$ad_hdl_dir/projects/common/kc705/kc705_system_constr.xdc" \ - "system_top.v" ] - -adi_project_run template_kc705 diff --git a/projects/common/kc705/system_top.v b/projects/common/kc705/system_top.v deleted file mode 100755 index 3cae0edaf9c..00000000000 --- a/projects/common/kc705/system_top.v +++ /dev/null @@ -1,181 +0,0 @@ -// *************************************************************************** -// *************************************************************************** -// Copyright (C) 2022-2023 Analog Devices, Inc. All rights reserved. -// -// In this HDL repository, there are many different and unique modules, consisting -// of various HDL (Verilog or VHDL) components. The individual modules are -// developed independently, and may be accompanied by separate and unique license -// terms. -// -// The user should read each of these license terms, and understand the -// freedoms and responsibilities that he or she has by using this source/core. -// -// This core is distributed in the hope that it will be useful, but WITHOUT ANY -// WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR -// A PARTICULAR PURPOSE. -// -// Redistribution and use of source or resulting binaries, with or without modification -// of this file, are permitted under one of the following two license terms: -// -// 1. The GNU General Public License version 2 as published by the -// Free Software Foundation, which can be found in the top level directory -// of this repository (LICENSE_GPL2), and also online at: -// -// -// OR -// -// 2. An ADI specific BSD license, which can be found in the top level directory -// of this repository (LICENSE_ADIBSD), and also on-line at: -// https://github.com/analogdevicesinc/hdl/blob/main/LICENSE_ADIBSD -// This will allow to generate bit files and not release the source code, -// as long as it attaches to an ADI device. -// -// *************************************************************************** -// *************************************************************************** - -`timescale 1ns/100ps - -module system_top ( - - input sys_rst, - input sys_clk_p, - input sys_clk_n, - - input uart_sin, - output uart_sout, - - output [ 2:0] ddr3_1_n, - output [ 1:0] ddr3_1_p, - output ddr3_reset_n, - output [13:0] ddr3_addr, - output [ 2:0] ddr3_ba, - output ddr3_cas_n, - output ddr3_ras_n, - output ddr3_we_n, - output ddr3_ck_n, - output ddr3_ck_p, - output ddr3_cke, - output ddr3_cs_n, - output [ 7:0] ddr3_dm, - inout [63:0] ddr3_dq, - inout [ 7:0] ddr3_dqs_n, - inout [ 7:0] ddr3_dqs_p, - output ddr3_odt, - - output mdio_mdc, - inout mdio_mdio, - output mii_rst_n, - input mii_col, - input mii_crs, - input mii_rx_clk, - input mii_rx_er, - input mii_rx_dv, - input [ 3:0] mii_rxd, - input mii_tx_clk, - output mii_tx_en, - output [ 3:0] mii_txd, - - output [26:1] linear_flash_addr, - output linear_flash_adv_ldn, - output linear_flash_ce_n, - inout [15:0] linear_flash_dq_io, - output linear_flash_oen, - output linear_flash_wen, - - output fan_pwm, - - inout [ 6:0] gpio_lcd, - inout [16:0] gpio_bd, - - output iic_rstn, - inout iic_scl, - inout iic_sda -); - - // internal signals - wire [63:0] gpio_i; - wire [63:0] gpio_o; - wire [63:0] gpio_t; - - assign gpio_i[63:32] = gpio_o[63:32]; - assign gpio_i[31:17] = gpio_o[31:17]; - - // default logic - assign ddr3_1_p = 2'b11; - assign ddr3_1_n = 3'b000; - assign fan_pwm = 1'b1; - assign iic_rstn = 1'b1; - - // instantiations - ad_iobuf #( - .DATA_WIDTH (17) - ) i_iobuf_bd ( - .dio_t (gpio_t[16:0]), - .dio_i (gpio_o[16:0]), - .dio_o (gpio_i[16:0]), - .dio_p (gpio_bd)); - - system_wrapper i_system_wrapper ( - .ddr3_addr (ddr3_addr), - .ddr3_ba (ddr3_ba), - .ddr3_cas_n (ddr3_cas_n), - .ddr3_ck_n (ddr3_ck_n), - .ddr3_ck_p (ddr3_ck_p), - .ddr3_cke (ddr3_cke), - .ddr3_cs_n (ddr3_cs_n), - .ddr3_dm (ddr3_dm), - .ddr3_dq (ddr3_dq), - .ddr3_dqs_n (ddr3_dqs_n), - .ddr3_dqs_p (ddr3_dqs_p), - .ddr3_odt (ddr3_odt), - .ddr3_ras_n (ddr3_ras_n), - .ddr3_reset_n (ddr3_reset_n), - .ddr3_we_n (ddr3_we_n), - - .gpio0_i (gpio_i[31:0]), - .gpio0_o (gpio_o[31:0]), - .gpio0_t (gpio_t[31:0]), - .gpio1_i (gpio_i[63:32]), - .gpio1_o (gpio_o[63:32]), - .gpio1_t (gpio_t[63:32]), - .gpio_lcd_tri_io (gpio_lcd), - - .iic_main_scl_io (iic_scl), - .iic_main_sda_io (iic_sda), - - .linear_flash_addr (linear_flash_addr), - .linear_flash_adv_ldn (linear_flash_adv_ldn), - .linear_flash_ce_n (linear_flash_ce_n), - .linear_flash_dq_io (linear_flash_dq_io), - .linear_flash_oen (linear_flash_oen), - .linear_flash_wen (linear_flash_wen), - - .mdio_mdc (mdio_mdc), - .mdio_mdio_io (mdio_mdio), - .mii_col (mii_col), - .mii_crs (mii_crs), - .mii_rst_n (mii_rst_n), - .mii_rx_clk (mii_rx_clk), - .mii_rx_dv (mii_rx_dv), - .mii_rx_er (mii_rx_er), - .mii_rxd (mii_rxd), - .mii_tx_clk (mii_tx_clk), - .mii_tx_en (mii_tx_en), - .mii_txd (mii_txd), - - .sys_clk_n (sys_clk_n), - .sys_clk_p (sys_clk_p), - .sys_rst (sys_rst), - - .uart_sin (uart_sin), - .uart_sout (uart_sout), - - .spi_clk_i (), - .spi_clk_o (), - .spi_csn_i (1'b1), - .spi_csn_o (), - .spi_sdi_i (1'b0), - .spi_sdo_i (1'b0), - .spi_sdo_o ()); - -endmodule diff --git a/projects/daq2/kc705/Makefile b/projects/daq2/kc705/Makefile deleted file mode 100644 index a89211d9ba4..00000000000 --- a/projects/daq2/kc705/Makefile +++ /dev/null @@ -1,37 +0,0 @@ -#################################################################################### -## Copyright (c) 2018 - 2023 Analog Devices, Inc. -### SPDX short identifier: BSD-1-Clause -## Auto-generated, do not modify! -#################################################################################### - -PROJECT_NAME := daq2_kc705 - -M_DEPS += ../common/daq2_spi.v -M_DEPS += ../common/daq2_bd.tcl -M_DEPS += ../../scripts/adi_pd.tcl -M_DEPS += ../../common/xilinx/data_offload_bd.tcl -M_DEPS += ../../common/kc705/kc705_system_mig.prj -M_DEPS += ../../common/kc705/kc705_system_constr.xdc -M_DEPS += ../../common/kc705/kc705_system_bd.tcl -M_DEPS += ../../../library/util_hbm/scripts/adi_util_hbm.tcl -M_DEPS += ../../../library/jesd204/scripts/jesd204.tcl -M_DEPS += ../../../library/common/ad_iobuf.v - -LIB_DEPS += axi_dmac -LIB_DEPS += axi_sysid -LIB_DEPS += data_offload -LIB_DEPS += jesd204/ad_ip_jesd204_tpl_adc -LIB_DEPS += jesd204/ad_ip_jesd204_tpl_dac -LIB_DEPS += jesd204/axi_jesd204_rx -LIB_DEPS += jesd204/axi_jesd204_tx -LIB_DEPS += jesd204/jesd204_rx -LIB_DEPS += jesd204/jesd204_tx -LIB_DEPS += sysid_rom -LIB_DEPS += util_do_ram -LIB_DEPS += util_hbm -LIB_DEPS += util_pack/util_cpack2 -LIB_DEPS += util_pack/util_upack2 -LIB_DEPS += xilinx/axi_adxcvr -LIB_DEPS += xilinx/util_adxcvr - -include ../../scripts/project-xilinx.mk diff --git a/projects/daq2/kc705/README.md b/projects/daq2/kc705/README.md deleted file mode 100644 index ae2484f169e..00000000000 --- a/projects/daq2/kc705/README.md +++ /dev/null @@ -1,41 +0,0 @@ -# DAQ2/KC705 HDL Project - -## Building the project - -The parameters configurable through the `make` command, can be found below, as well as in the **system_project.tcl** file; it contains the default configuration. - -``` -cd projects/daq2/kc705 -make -``` - -This device operates in single link JESD204B mode, meaning 8b10b link layer encoding, using the ADI IP as Physical layer. - -All of the RX link modes can be found in the [AD9680 data sheet](https://www.analog.com/media/en/technical-documentation/data-sheets/AD9680.pdf), Table 26. We offer support for only a few of them. - -All of the TX link modes can be found in the [AD9144 data sheet](https://www.analog.com/media/en/technical-documentation/data-sheets/AD9144.pdf), Table 35. We offer support for only a few of them. - -If other configurations are desired, then the parameters from the HDL project (see below) need to be changed, as well as the Linux/no-OS project configurations. - -The overwritable parameters from the environment are: - -- [RX/TX]_JESD_M - [RX/TX] number of converters per link -- [RX/TX]_JESD_L - [RX/TX] number of lanes per link -- [RX/TX]_JESD_S - [RX/TX] number of samples per converter per frame - -### Example configurations - -#### Default configuration - -This specific command is equivalent to running `make` only: - -``` -make RX_JESD_M=2 \ -RX_JESD_L=4 \ -RX_JESD_S=1 \ -TX_JESD_M=2 \ -TX_JESD_L=4 \ -TX_JESD_S=1 -``` - -Corresponding device tree: [kc705_fmcdaq2.dts](https://github.com/analogdevicesinc/linux/blob/main/arch/microblaze/boot/dts/kc705_fmcdaq2.dts) \ No newline at end of file diff --git a/projects/daq2/kc705/system_bd.tcl b/projects/daq2/kc705/system_bd.tcl deleted file mode 100644 index 01b93914cc9..00000000000 --- a/projects/daq2/kc705/system_bd.tcl +++ /dev/null @@ -1,37 +0,0 @@ -############################################################################### -## Copyright (C) 2014-2023 Analog Devices, Inc. All rights reserved. -### SPDX short identifier: ADIBSD -############################################################################### - -## Offload attributes -set adc_offload_type 0 -set adc_offload_size [expr 512 * 1024] - -set dac_offload_type 0 -set dac_offload_size [expr 512 * 1024] - -set plddr_offload_axi_data_width 0 - -## NOTE: With this configuration the #36Kb BRAM utilization is at ~70% - -source $ad_hdl_dir/projects/common/kc705/kc705_system_bd.tcl -source ../common/daq2_bd.tcl -source $ad_hdl_dir/projects/scripts/adi_pd.tcl - -#system ID -ad_ip_parameter axi_sysid_0 CONFIG.ROM_ADDR_BITS 9 -ad_ip_parameter rom_sys_0 CONFIG.PATH_TO_FILE "$mem_init_sys_file_path/mem_init_sys.txt" -ad_ip_parameter rom_sys_0 CONFIG.ROM_ADDR_BITS 9 - -set sys_cstring "RX:M=$ad_project_params(RX_JESD_M)\ -L=$ad_project_params(RX_JESD_L)\ -S=$ad_project_params(RX_JESD_S)\ -TX:M=$ad_project_params(TX_JESD_M)\ -L=$ad_project_params(TX_JESD_L)\ -S=$ad_project_params(TX_JESD_S)\ -ADC_OFFLOAD:TYPE=$adc_offload_type\ -SIZE=$adc_offload_size\ -DAC_OFFLOAD:TYPE=$dac_offload_type\ -SIZE=$dac_offload_size" - -sysid_gen_sys_init_file $sys_cstring diff --git a/projects/daq2/kc705/system_constr.xdc b/projects/daq2/kc705/system_constr.xdc deleted file mode 100644 index 26717731329..00000000000 --- a/projects/daq2/kc705/system_constr.xdc +++ /dev/null @@ -1,65 +0,0 @@ -############################################################################### -## Copyright (C) 2014-2023 Analog Devices, Inc. All rights reserved. -### SPDX short identifier: ADIBSD -############################################################################### - -# daq2 - -set_property -dict {PACKAGE_PIN E8} [get_ports rx_ref_clk_p] ; ## B20 FMC_HPC_GBTCLK1_M2C_P -set_property -dict {PACKAGE_PIN E7} [get_ports rx_ref_clk_n] ; ## B21 FMC_HPC_GBTCLK1_M2C_N -set_property -dict {PACKAGE_PIN A8} [get_ports rx_data_p[0]] ; ## A10 FMC_HPC_DP3_M2C_P -set_property -dict {PACKAGE_PIN A7} [get_ports rx_data_n[0]] ; ## A11 FMC_HPC_DP3_M2C_N -set_property -dict {PACKAGE_PIN E4} [get_ports rx_data_p[1]] ; ## C06 FMC_HPC_DP0_M2C_P -set_property -dict {PACKAGE_PIN E3} [get_ports rx_data_n[1]] ; ## C07 FMC_HPC_DP0_M2C_N -set_property -dict {PACKAGE_PIN B6} [get_ports rx_data_p[2]] ; ## A06 FMC_HPC_DP2_M2C_P -set_property -dict {PACKAGE_PIN B5} [get_ports rx_data_n[2]] ; ## A07 FMC_HPC_DP2_M2C_N -set_property -dict {PACKAGE_PIN D6} [get_ports rx_data_p[3]] ; ## A02 FMC_HPC_DP1_M2C_P -set_property -dict {PACKAGE_PIN D5} [get_ports rx_data_n[3]] ; ## A03 FMC_HPC_DP1_M2C_N -set_property -dict {PACKAGE_PIN D26 IOSTANDARD LVDS_25} [get_ports rx_sync_p] ; ## D08 FMC_HPC_LA01_CC_P -set_property -dict {PACKAGE_PIN C26 IOSTANDARD LVDS_25} [get_ports rx_sync_n] ; ## D09 FMC_HPC_LA01_CC_N -set_property -dict {PACKAGE_PIN H26 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_sysref_p] ; ## G09 FMC_HPC_LA03_P -set_property -dict {PACKAGE_PIN H27 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_sysref_n] ; ## G10 FMC_HPC_LA03_N - -set_property -dict {PACKAGE_PIN C8} [get_ports tx_ref_clk_p] ; ## D04 FMC_HPC_GBTCLK0_M2C_P -set_property -dict {PACKAGE_PIN C7} [get_ports tx_ref_clk_n] ; ## D05 FMC_HPC_GBTCLK0_M2C_N -set_property -dict {PACKAGE_PIN A4} [get_ports tx_data_p[0]] ; ## A30 FMC_HPC_DP3_C2M_P (tx_data_p[0]) -set_property -dict {PACKAGE_PIN A3} [get_ports tx_data_n[0]] ; ## A31 FMC_HPC_DP3_C2M_N (tx_data_n[0]) -set_property -dict {PACKAGE_PIN D2} [get_ports tx_data_p[1]] ; ## C02 FMC_HPC_DP0_C2M_P (tx_data_p[3]) -set_property -dict {PACKAGE_PIN D1} [get_ports tx_data_n[1]] ; ## C03 FMC_HPC_DP0_C2M_N (tx_data_n[3]) -set_property -dict {PACKAGE_PIN B2} [get_ports tx_data_p[2]] ; ## A26 FMC_HPC_DP2_C2M_P (tx_data_p[1]) -set_property -dict {PACKAGE_PIN B1} [get_ports tx_data_n[2]] ; ## A27 FMC_HPC_DP2_C2M_N (tx_data_n[1]) -set_property -dict {PACKAGE_PIN C4} [get_ports tx_data_p[3]] ; ## A22 FMC_HPC_DP1_C2M_P (tx_data_p[2]) -set_property -dict {PACKAGE_PIN C3} [get_ports tx_data_n[3]] ; ## A23 FMC_HPC_DP1_C2M_N (tx_data_n[2]) -set_property -dict {PACKAGE_PIN H24 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports tx_sync_p] ; ## H07 FMC_HPC_LA02_P -set_property -dict {PACKAGE_PIN H25 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports tx_sync_n] ; ## H08 FMC_HPC_LA02_N -set_property -dict {PACKAGE_PIN G28 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports tx_sysref_p] ; ## H10 FMC_HPC_LA04_P -set_property -dict {PACKAGE_PIN F28 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports tx_sysref_n] ; ## H11 FMC_HPC_LA04_N - -set_property -dict {PACKAGE_PIN G29 IOSTANDARD LVCMOS25} [get_ports spi_csn_clk] ; ## D11 FMC_HPC_LA05_P -set_property -dict {PACKAGE_PIN D29 IOSTANDARD LVCMOS25} [get_ports spi_csn_dac] ; ## C14 FMC_HPC_LA10_P -set_property -dict {PACKAGE_PIN A30 IOSTANDARD LVCMOS25} [get_ports spi_csn_adc] ; ## D15 FMC_HPC_LA09_N -set_property -dict {PACKAGE_PIN F30 IOSTANDARD LVCMOS25} [get_ports spi_clk] ; ## D12 FMC_HPC_LA05_N -set_property -dict {PACKAGE_PIN B30 IOSTANDARD LVCMOS25} [get_ports spi_sdio] ; ## D14 FMC_HPC_LA09_P -set_property -dict {PACKAGE_PIN E30 IOSTANDARD LVCMOS25} [get_ports spi_dir] ; ## G13 FMC_HPC_LA08_N - -set_property -dict {PACKAGE_PIN E29 IOSTANDARD LVCMOS25} [get_ports clkd_sync] ; ## G12 FMC_HPC_LA08_P -set_property -dict {PACKAGE_PIN C30 IOSTANDARD LVCMOS25} [get_ports dac_reset] ; ## C15 FMC_HPC_LA10_N -set_property -dict {PACKAGE_PIN B29 IOSTANDARD LVCMOS25} [get_ports dac_txen] ; ## G16 FMC_HPC_LA12_N -set_property -dict {PACKAGE_PIN H30 IOSTANDARD LVCMOS25} [get_ports adc_pd] ; ## C10 FMC_HPC_LA06_P - -set_property -dict {PACKAGE_PIN A25 IOSTANDARD LVCMOS25} [get_ports clkd_status[0]] ; ## D17 FMC_HPC_LA13_P -set_property -dict {PACKAGE_PIN A26 IOSTANDARD LVCMOS25} [get_ports clkd_status[1]] ; ## D18 FMC_HPC_LA13_N -set_property -dict {PACKAGE_PIN C29 IOSTANDARD LVCMOS25} [get_ports dac_irq] ; ## G15 FMC_HPC_LA12_P -set_property -dict {PACKAGE_PIN G27 IOSTANDARD LVCMOS25} [get_ports adc_fda] ; ## H16 FMC_HPC_LA11_P -set_property -dict {PACKAGE_PIN F27 IOSTANDARD LVCMOS25} [get_ports adc_fdb] ; ## H17 FMC_HPC_LA11_N - -set_property -dict {PACKAGE_PIN E28 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports trig_p] ; ## H13 FMC_HPC_LA07_P -set_property -dict {PACKAGE_PIN D28 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports trig_n] ; ## H14 FMC_HPC_LA07_N - -# clocks - -create_clock -name tx_ref_clk -period 2.00 [get_ports tx_ref_clk_p] -create_clock -name rx_ref_clk -period 2.00 [get_ports rx_ref_clk_p] -create_clock -name tx_div_clk -period 4.00 [get_pins i_system_wrapper/system_i/util_daq2_xcvr/inst/i_xch_0/i_gtxe2_channel/TXOUTCLK] -create_clock -name rx_div_clk -period 4.00 [get_pins i_system_wrapper/system_i/util_daq2_xcvr/inst/i_xch_0/i_gtxe2_channel/RXOUTCLK] - diff --git a/projects/daq2/kc705/system_project.tcl b/projects/daq2/kc705/system_project.tcl deleted file mode 100644 index e561303e50a..00000000000 --- a/projects/daq2/kc705/system_project.tcl +++ /dev/null @@ -1,43 +0,0 @@ -############################################################################### -## Copyright (C) 2014-2023 Analog Devices, Inc. All rights reserved. -### SPDX short identifier: ADIBSD -############################################################################### - -source ../../../scripts/adi_env.tcl -source $ad_hdl_dir/projects/scripts/adi_project_xilinx.tcl -source $ad_hdl_dir/projects/scripts/adi_board.tcl - -# get_env_param retrieves parameter value from the environment if exists, -# other case use the default value -# -# Use over-writable parameters from the environment. -# -# e.g. -# make RX_JESD_L=4 RX_JESD_M=2 TX_JESD_L=4 TX_JESD_M=2 - -# Parameter description: -# [RX/TX]_JESD_M : Number of converters per link -# [RX/TX]_JESD_L : Number of lanes per link -# [RX/TX]_JESD_S : Number of samples per frame - -adi_project daq2_kc705 0 [list \ - RX_JESD_M [get_env_param RX_JESD_M 2 ] \ - RX_JESD_L [get_env_param RX_JESD_L 4 ] \ - RX_JESD_S [get_env_param RX_JESD_S 1 ] \ - TX_JESD_M [get_env_param TX_JESD_M 2 ] \ - TX_JESD_L [get_env_param TX_JESD_L 4 ] \ - TX_JESD_S [get_env_param TX_JESD_S 1 ] \ -] - -adi_project_files daq2_kc705 [list \ - "../common/daq2_spi.v" \ - "system_top.v" \ - "system_constr.xdc"\ - "$ad_hdl_dir/library/common/ad_iobuf.v" \ - "$ad_hdl_dir/projects/common/kc705/kc705_system_constr.xdc" ] - -adi_project_run daq2_kc705 - -## To improve timing in the axi_ad9680_offload component -set_property strategy Performance_Retiming [get_runs impl_1] - diff --git a/projects/daq2/kc705/system_top.v b/projects/daq2/kc705/system_top.v deleted file mode 100644 index e70475a03e9..00000000000 --- a/projects/daq2/kc705/system_top.v +++ /dev/null @@ -1,319 +0,0 @@ -// *************************************************************************** -// *************************************************************************** -// Copyright (C) 2014-2023 Analog Devices, Inc. All rights reserved. -// -// In this HDL repository, there are many different and unique modules, consisting -// of various HDL (Verilog or VHDL) components. The individual modules are -// developed independently, and may be accompanied by separate and unique license -// terms. -// -// The user should read each of these license terms, and understand the -// freedoms and responsibilities that he or she has by using this source/core. -// -// This core is distributed in the hope that it will be useful, but WITHOUT ANY -// WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR -// A PARTICULAR PURPOSE. -// -// Redistribution and use of source or resulting binaries, with or without modification -// of this file, are permitted under one of the following two license terms: -// -// 1. The GNU General Public License version 2 as published by the -// Free Software Foundation, which can be found in the top level directory -// of this repository (LICENSE_GPL2), and also online at: -// -// -// OR -// -// 2. An ADI specific BSD license, which can be found in the top level directory -// of this repository (LICENSE_ADIBSD), and also on-line at: -// https://github.com/analogdevicesinc/hdl/blob/main/LICENSE_ADIBSD -// This will allow to generate bit files and not release the source code, -// as long as it attaches to an ADI device. -// -// *************************************************************************** -// *************************************************************************** - -`timescale 1ns/100ps - -module system_top ( - - input sys_rst, - input sys_clk_p, - input sys_clk_n, - - input uart_sin, - output uart_sout, - - output [ 2:0] ddr3_1_n, - output [ 1:0] ddr3_1_p, - output ddr3_reset_n, - output [13:0] ddr3_addr, - output [ 2:0] ddr3_ba, - output ddr3_cas_n, - output ddr3_ras_n, - output ddr3_we_n, - output ddr3_ck_n, - output ddr3_ck_p, - output ddr3_cke, - output ddr3_cs_n, - output [ 7:0] ddr3_dm, - inout [63:0] ddr3_dq, - inout [ 7:0] ddr3_dqs_n, - inout [ 7:0] ddr3_dqs_p, - output ddr3_odt, - - output mdio_mdc, - inout mdio_mdio, - output mii_rst_n, - input mii_col, - input mii_crs, - input mii_rx_clk, - input mii_rx_er, - input mii_rx_dv, - input [ 3:0] mii_rxd, - input mii_tx_clk, - output mii_tx_en, - output [ 3:0] mii_txd, - - output [26:1] linear_flash_addr, - output linear_flash_adv_ldn, - output linear_flash_ce_n, - inout [15:0] linear_flash_dq_io, - output linear_flash_oen, - output linear_flash_wen, - - output fan_pwm, - - inout [ 6:0] gpio_lcd, - inout [16:0] gpio_bd, - - output iic_rstn, - inout iic_scl, - inout iic_sda, - - input rx_ref_clk_p, - input rx_ref_clk_n, - input rx_sysref_p, - input rx_sysref_n, - output rx_sync_p, - output rx_sync_n, - input [ 3:0] rx_data_p, - input [ 3:0] rx_data_n, - - input tx_ref_clk_p, - input tx_ref_clk_n, - input tx_sysref_p, - input tx_sysref_n, - input tx_sync_p, - input tx_sync_n, - output [ 3:0] tx_data_p, - output [ 3:0] tx_data_n, - - input trig_p, - input trig_n, - - inout adc_fdb, - inout adc_fda, - inout dac_irq, - inout [ 1:0] clkd_status, - - inout adc_pd, - inout dac_txen, - inout dac_reset, - inout clkd_sync, - - output spi_csn_clk, - output spi_csn_dac, - output spi_csn_adc, - output spi_clk, - inout spi_sdio, - output spi_dir -); - - // internal signals - - wire [63:0] gpio_i; - wire [63:0] gpio_o; - wire [63:0] gpio_t; - wire [ 7:0] spi_csn; - wire spi_mosi; - wire spi_miso; - wire trig; - wire rx_ref_clk; - wire rx_sysref; - wire rx_sync; - wire tx_ref_clk; - wire tx_sysref; - wire tx_sync; - - // spi - - assign spi_csn_adc = spi_csn[2]; - assign spi_csn_dac = spi_csn[1]; - assign spi_csn_clk = spi_csn[0]; - - // default logic - - assign ddr3_1_p = 2'b11; - assign ddr3_1_n = 3'b000; - assign fan_pwm = 1'b1; - assign iic_rstn = 1'b1; - - // instantiations - - IBUFDS_GTE2 i_ibufds_rx_ref_clk ( - .CEB (1'd0), - .I (rx_ref_clk_p), - .IB (rx_ref_clk_n), - .O (rx_ref_clk), - .ODIV2 ()); - - IBUFDS i_ibufds_rx_sysref ( - .I (rx_sysref_p), - .IB (rx_sysref_n), - .O (rx_sysref)); - - OBUFDS i_obufds_rx_sync ( - .I (rx_sync), - .O (rx_sync_p), - .OB (rx_sync_n)); - - IBUFDS_GTE2 i_ibufds_tx_ref_clk ( - .CEB (1'd0), - .I (tx_ref_clk_p), - .IB (tx_ref_clk_n), - .O (tx_ref_clk), - .ODIV2 ()); - - IBUFDS i_ibufds_tx_sysref ( - .I (tx_sysref_p), - .IB (tx_sysref_n), - .O (tx_sysref)); - - IBUFDS i_ibufds_tx_sync ( - .I (tx_sync_p), - .IB (tx_sync_n), - .O (tx_sync)); - - daq2_spi i_spi ( - .spi_csn (spi_csn[2:0]), - .spi_clk (spi_clk), - .spi_mosi (spi_mosi), - .spi_miso (spi_miso), - .spi_sdio (spi_sdio), - .spi_dir (spi_dir)); - - IBUFDS i_ibufds_trig ( - .I (trig_p), - .IB (trig_n), - .O (trig)); - - assign gpio_i[43] = trig; - - ad_iobuf #( - .DATA_WIDTH(9) - ) i_iobuf ( - .dio_t ({gpio_t[42:40], gpio_t[38], gpio_t[36:32]}), - .dio_i ({gpio_o[42:40], gpio_o[38], gpio_o[36:32]}), - .dio_o ({gpio_i[42:40], gpio_i[38], gpio_i[36:32]}), - .dio_p ({ adc_pd, // 42 - dac_txen, // 41 - dac_reset, // 40 - clkd_sync, // 38 - adc_fdb, // 36 - adc_fda, // 35 - dac_irq, // 34 - clkd_status})); // 33-32 - - ad_iobuf #( - .DATA_WIDTH(17) - ) i_iobuf_bd ( - .dio_t (gpio_t[16:0]), - .dio_i (gpio_o[16:0]), - .dio_o (gpio_i[16:0]), - .dio_p (gpio_bd)); - - assign gpio_i[63:44] = gpio_o[63:44]; - assign gpio_i[39] = gpio_o[39]; - assign gpio_i[37] = gpio_o[37]; - assign gpio_i[31:17] = gpio_o[31:17]; - - system_wrapper i_system_wrapper ( - .ddr3_addr (ddr3_addr), - .ddr3_ba (ddr3_ba), - .ddr3_cas_n (ddr3_cas_n), - .ddr3_ck_n (ddr3_ck_n), - .ddr3_ck_p (ddr3_ck_p), - .ddr3_cke (ddr3_cke), - .ddr3_cs_n (ddr3_cs_n), - .ddr3_dm (ddr3_dm), - .ddr3_dq (ddr3_dq), - .ddr3_dqs_n (ddr3_dqs_n), - .ddr3_dqs_p (ddr3_dqs_p), - .ddr3_odt (ddr3_odt), - .ddr3_ras_n (ddr3_ras_n), - .ddr3_reset_n (ddr3_reset_n), - .ddr3_we_n (ddr3_we_n), - .gpio0_i (gpio_i[31:0]), - .gpio0_o (gpio_o[31:0]), - .gpio0_t (gpio_t[31:0]), - .gpio1_i (gpio_i[63:32]), - .gpio1_o (gpio_o[63:32]), - .gpio1_t (gpio_t[63:32]), - .gpio_lcd_tri_io (gpio_lcd), - .iic_main_scl_io (iic_scl), - .iic_main_sda_io (iic_sda), - .linear_flash_addr (linear_flash_addr), - .linear_flash_adv_ldn (linear_flash_adv_ldn), - .linear_flash_ce_n (linear_flash_ce_n), - .linear_flash_dq_io (linear_flash_dq_io), - .linear_flash_oen (linear_flash_oen), - .linear_flash_wen (linear_flash_wen), - .mdio_mdc (mdio_mdc), - .mdio_mdio_io (mdio_mdio), - .mii_col (mii_col), - .mii_crs (mii_crs), - .mii_rst_n (mii_rst_n), - .mii_rx_clk (mii_rx_clk), - .mii_rx_dv (mii_rx_dv), - .mii_rx_er (mii_rx_er), - .mii_rxd (mii_rxd), - .mii_tx_clk (mii_tx_clk), - .mii_tx_en (mii_tx_en), - .mii_txd (mii_txd), - .rx_data_0_n (rx_data_n[0]), - .rx_data_0_p (rx_data_p[0]), - .rx_data_1_n (rx_data_n[1]), - .rx_data_1_p (rx_data_p[1]), - .rx_data_2_n (rx_data_n[2]), - .rx_data_2_p (rx_data_p[2]), - .rx_data_3_n (rx_data_n[3]), - .rx_data_3_p (rx_data_p[3]), - .rx_ref_clk_0 (rx_ref_clk), - .rx_sync_0 (rx_sync), - .rx_sysref_0 (rx_sysref), - .spi_clk_i (spi_clk), - .spi_clk_o (spi_clk), - .spi_csn_i (spi_csn), - .spi_csn_o (spi_csn), - .spi_sdi_i (spi_miso), - .spi_sdo_i (spi_mosi), - .spi_sdo_o (spi_mosi), - .sys_clk_n (sys_clk_n), - .sys_clk_p (sys_clk_p), - .sys_rst (sys_rst), - .tx_data_0_n (tx_data_n[0]), - .tx_data_0_p (tx_data_p[0]), - .tx_data_1_n (tx_data_n[1]), - .tx_data_1_p (tx_data_p[1]), - .tx_data_2_n (tx_data_n[2]), - .tx_data_2_p (tx_data_p[2]), - .tx_data_3_n (tx_data_n[3]), - .tx_data_3_p (tx_data_p[3]), - .tx_ref_clk_0 (tx_ref_clk), - .tx_sync_0 (tx_sync), - .tx_sysref_0 (tx_sysref), - .uart_sin (uart_sin), - .uart_sout (uart_sout)); - -endmodule diff --git a/projects/fmcomms2/kc705/Makefile b/projects/fmcomms2/kc705/Makefile deleted file mode 100644 index c5b09224d52..00000000000 --- a/projects/fmcomms2/kc705/Makefile +++ /dev/null @@ -1,28 +0,0 @@ -#################################################################################### -## Copyright (c) 2018 - 2023 Analog Devices, Inc. -### SPDX short identifier: BSD-1-Clause -## Auto-generated, do not modify! -#################################################################################### - -PROJECT_NAME := fmcomms2_kc705 - -M_DEPS += ../common/fmcomms2_bd.tcl -M_DEPS += ../../scripts/adi_pd.tcl -M_DEPS += ../../common/kc705/kc705_system_mig.prj -M_DEPS += ../../common/kc705/kc705_system_constr.xdc -M_DEPS += ../../common/kc705/kc705_system_bd.tcl -M_DEPS += ../../../library/common/ad_iobuf.v -M_DEPS += ../../../library/axi_ad9361/axi_ad9361_delay.tcl - -LIB_DEPS += axi_ad9361 -LIB_DEPS += axi_dmac -LIB_DEPS += axi_sysid -LIB_DEPS += sysid_rom -LIB_DEPS += util_pack/util_cpack2 -LIB_DEPS += util_pack/util_upack2 -LIB_DEPS += util_rfifo -LIB_DEPS += util_tdd_sync -LIB_DEPS += util_wfifo -LIB_DEPS += xilinx/util_clkdiv - -include ../../scripts/project-xilinx.mk diff --git a/projects/fmcomms2/kc705/README.md b/projects/fmcomms2/kc705/README.md deleted file mode 100644 index dfa0bb3d1ab..00000000000 --- a/projects/fmcomms2/kc705/README.md +++ /dev/null @@ -1,13 +0,0 @@ -# FMCOMMS2/KC705 HDL Project - -## Building the project - -``` -cd projects/fmcomms2/kc705 -make -``` - -Corresponding device trees: - -- for FMCOMMS2/3: [kc705_fmcomms2-3.dts](https://github.com/analogdevicesinc/linux/blob/main/arch/microblaze/boot/dts/kc705_fmcomms2-3.dts) -- for FMCOMMS4: [kc705_fmcomms4.dts](https://github.com/analogdevicesinc/linux/blob/main/arch/microblaze/boot/dts/kc705_fmcomms4.dts) \ No newline at end of file diff --git a/projects/fmcomms2/kc705/system_bd.tcl b/projects/fmcomms2/kc705/system_bd.tcl deleted file mode 100644 index f640983a6ed..00000000000 --- a/projects/fmcomms2/kc705/system_bd.tcl +++ /dev/null @@ -1,17 +0,0 @@ -############################################################################### -## Copyright (C) 2014-2023 Analog Devices, Inc. All rights reserved. -### SPDX short identifier: ADIBSD -############################################################################### - -source $ad_hdl_dir/projects/common/kc705/kc705_system_bd.tcl -source ../common/fmcomms2_bd.tcl -source $ad_hdl_dir/projects/scripts/adi_pd.tcl - -#system ID -ad_ip_parameter axi_sysid_0 CONFIG.ROM_ADDR_BITS 9 -ad_ip_parameter rom_sys_0 CONFIG.PATH_TO_FILE "$mem_init_sys_file_path/mem_init_sys.txt" -ad_ip_parameter rom_sys_0 CONFIG.ROM_ADDR_BITS 9 - -sysid_gen_sys_init_file - -ad_ip_parameter axi_ad9361 CONFIG.ADC_INIT_DELAY 31 diff --git a/projects/fmcomms2/kc705/system_constr.xdc b/projects/fmcomms2/kc705/system_constr.xdc deleted file mode 100644 index 7682515f026..00000000000 --- a/projects/fmcomms2/kc705/system_constr.xdc +++ /dev/null @@ -1,69 +0,0 @@ -############################################################################### -## Copyright (C) 2014-2023 Analog Devices, Inc. All rights reserved. -### SPDX short identifier: ADIBSD -############################################################################### - -# constraints -# ad9361 - -set_property -dict {PACKAGE_PIN AD23 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_clk_in_p] ; ## G6 FMC_LPC_LA00_CC_P -set_property -dict {PACKAGE_PIN AE24 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_clk_in_n] ; ## G7 FMC_LPC_LA00_CC_N -set_property -dict {PACKAGE_PIN AE23 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_frame_in_p] ; ## D8 FMC_LPC_LA01_CC_P -set_property -dict {PACKAGE_PIN AF23 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_frame_in_n] ; ## D9 FMC_LPC_LA01_CC_N -set_property -dict {PACKAGE_PIN AF20 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_data_in_p[0]] ; ## H7 FMC_LPC_LA02_P -set_property -dict {PACKAGE_PIN AF21 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_data_in_n[0]] ; ## H8 FMC_LPC_LA02_N -set_property -dict {PACKAGE_PIN AG20 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_data_in_p[1]] ; ## G9 FMC_LPC_LA03_P -set_property -dict {PACKAGE_PIN AH20 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_data_in_n[1]] ; ## G10 FMC_LPC_LA03_N -set_property -dict {PACKAGE_PIN AH21 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_data_in_p[2]] ; ## H10 FMC_LPC_LA04_P -set_property -dict {PACKAGE_PIN AJ21 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_data_in_n[2]] ; ## H11 FMC_LPC_LA04_N -set_property -dict {PACKAGE_PIN AG22 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_data_in_p[3]] ; ## D11 FMC_LPC_LA05_P -set_property -dict {PACKAGE_PIN AH22 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_data_in_n[3]] ; ## D12 FMC_LPC_LA05_N -set_property -dict {PACKAGE_PIN AK20 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_data_in_p[4]] ; ## C10 FMC_LPC_LA06_P -set_property -dict {PACKAGE_PIN AK21 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_data_in_n[4]] ; ## C11 FMC_LPC_LA06_N -set_property -dict {PACKAGE_PIN AG25 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_data_in_p[5]] ; ## H13 FMC_LPC_LA07_P -set_property -dict {PACKAGE_PIN AH25 IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_ports rx_data_in_n[5]] ; ## H14 FMC_LPC_LA07_N -set_property -dict {PACKAGE_PIN AJ22 IOSTANDARD LVDS_25} [get_ports tx_clk_out_p] ; ## G12 FMC_LPC_LA08_P -set_property -dict {PACKAGE_PIN AJ23 IOSTANDARD LVDS_25} [get_ports tx_clk_out_n] ; ## G13 FMC_LPC_LA08_N -set_property -dict {PACKAGE_PIN AK23 IOSTANDARD LVDS_25} [get_ports tx_frame_out_p] ; ## D14 FMC_LPC_LA09_P -set_property -dict {PACKAGE_PIN AK24 IOSTANDARD LVDS_25} [get_ports tx_frame_out_n] ; ## D15 FMC_LPC_LA09_N -set_property -dict {PACKAGE_PIN AE25 IOSTANDARD LVDS_25} [get_ports tx_data_out_p[0]] ; ## H16 FMC_LPC_LA11_P -set_property -dict {PACKAGE_PIN AF25 IOSTANDARD LVDS_25} [get_ports tx_data_out_n[0]] ; ## H17 FMC_LPC_LA11_N -set_property -dict {PACKAGE_PIN AA20 IOSTANDARD LVDS_25} [get_ports tx_data_out_p[1]] ; ## G15 FMC_LPC_LA12_P -set_property -dict {PACKAGE_PIN AB20 IOSTANDARD LVDS_25} [get_ports tx_data_out_n[1]] ; ## G16 FMC_LPC_LA12_N -set_property -dict {PACKAGE_PIN AB24 IOSTANDARD LVDS_25} [get_ports tx_data_out_p[2]] ; ## D17 FMC_LPC_LA13_P -set_property -dict {PACKAGE_PIN AC25 IOSTANDARD LVDS_25} [get_ports tx_data_out_n[2]] ; ## D18 FMC_LPC_LA13_N -set_property -dict {PACKAGE_PIN AJ24 IOSTANDARD LVDS_25} [get_ports tx_data_out_p[3]] ; ## C14 FMC_LPC_LA10_P -set_property -dict {PACKAGE_PIN AK25 IOSTANDARD LVDS_25} [get_ports tx_data_out_n[3]] ; ## C15 FMC_LPC_LA10_N -set_property -dict {PACKAGE_PIN AD21 IOSTANDARD LVDS_25} [get_ports tx_data_out_p[4]] ; ## C18 FMC_LPC_LA14_P -set_property -dict {PACKAGE_PIN AE21 IOSTANDARD LVDS_25} [get_ports tx_data_out_n[4]] ; ## C19 FMC_LPC_LA14_N -set_property -dict {PACKAGE_PIN AC24 IOSTANDARD LVDS_25} [get_ports tx_data_out_p[5]] ; ## H19 FMC_LPC_LA15_P -set_property -dict {PACKAGE_PIN AD24 IOSTANDARD LVDS_25} [get_ports tx_data_out_n[5]] ; ## H20 FMC_LPC_LA15_N - -set_property -dict {PACKAGE_PIN AF26 IOSTANDARD LVCMOS25} [get_ports gpio_status[0]] ; ## G21 FMC_LPC_LA20_P -set_property -dict {PACKAGE_PIN AF27 IOSTANDARD LVCMOS25} [get_ports gpio_status[1]] ; ## G22 FMC_LPC_LA20_N -set_property -dict {PACKAGE_PIN AG27 IOSTANDARD LVCMOS25} [get_ports gpio_status[2]] ; ## H25 FMC_LPC_LA21_P -set_property -dict {PACKAGE_PIN AG28 IOSTANDARD LVCMOS25} [get_ports gpio_status[3]] ; ## H26 FMC_LPC_LA21_N -set_property -dict {PACKAGE_PIN AJ27 IOSTANDARD LVCMOS25} [get_ports gpio_status[4]] ; ## G24 FMC_LPC_LA22_P -set_property -dict {PACKAGE_PIN AK28 IOSTANDARD LVCMOS25} [get_ports gpio_status[5]] ; ## G25 FMC_LPC_LA22_N -set_property -dict {PACKAGE_PIN AH26 IOSTANDARD LVCMOS25} [get_ports gpio_status[6]] ; ## D23 FMC_LPC_LA23_P -set_property -dict {PACKAGE_PIN AH27 IOSTANDARD LVCMOS25} [get_ports gpio_status[7]] ; ## D24 FMC_LPC_LA23_N -set_property -dict {PACKAGE_PIN AG30 IOSTANDARD LVCMOS25} [get_ports gpio_ctl[0]] ; ## H28 FMC_LPC_LA24_P -set_property -dict {PACKAGE_PIN AH30 IOSTANDARD LVCMOS25} [get_ports gpio_ctl[1]] ; ## H29 FMC_LPC_LA24_N -set_property -dict {PACKAGE_PIN AC26 IOSTANDARD LVCMOS25} [get_ports gpio_ctl[2]] ; ## G27 FMC_LPC_LA25_P -set_property -dict {PACKAGE_PIN AD26 IOSTANDARD LVCMOS25} [get_ports gpio_ctl[3]] ; ## G28 FMC_LPC_LA25_N -set_property -dict {PACKAGE_PIN AJ26 IOSTANDARD LVCMOS25} [get_ports gpio_en_agc] ; ## H22 FMC_LPC_LA19_P -set_property -dict {PACKAGE_PIN AK26 IOSTANDARD LVCMOS25} [get_ports gpio_sync] ; ## H23 FMC_LPC_LA19_N -set_property -dict {PACKAGE_PIN AE30 IOSTANDARD LVCMOS25} [get_ports gpio_resetb] ; ## H31 FMC_LPC_LA28_P - -set_property -dict {PACKAGE_PIN AC22 IOSTANDARD LVCMOS25} [get_ports enable] ; ## G18 FMC_LPC_LA16_P -set_property -dict {PACKAGE_PIN AD22 IOSTANDARD LVCMOS25} [get_ports txnrx] ; ## G19 FMC_LPC_LA16_N - -set_property -dict {PACKAGE_PIN AK29 IOSTANDARD LVCMOS25 PULLTYPE PULLUP} [get_ports spi_csn_0] ; ## D26 FMC_LPC_LA26_P -set_property -dict {PACKAGE_PIN AK30 IOSTANDARD LVCMOS25} [get_ports spi_clk] ; ## D27 FMC_LPC_LA26_N -set_property -dict {PACKAGE_PIN AJ28 IOSTANDARD LVCMOS25} [get_ports spi_mosi] ; ## C26 FMC_LPC_LA27_P -set_property -dict {PACKAGE_PIN AJ29 IOSTANDARD LVCMOS25} [get_ports spi_miso] ; ## C27 FMC_LPC_LA27_N - -# clocks - -create_clock -name rx_clk -period 4 [get_ports rx_clk_in_p] - diff --git a/projects/fmcomms2/kc705/system_project.tcl b/projects/fmcomms2/kc705/system_project.tcl deleted file mode 100644 index c17f6583729..00000000000 --- a/projects/fmcomms2/kc705/system_project.tcl +++ /dev/null @@ -1,19 +0,0 @@ -############################################################################### -## Copyright (C) 2014-2023 Analog Devices, Inc. All rights reserved. -### SPDX short identifier: ADIBSD -############################################################################### - -source ../../../scripts/adi_env.tcl -source $ad_hdl_dir/projects/scripts/adi_project_xilinx.tcl -source $ad_hdl_dir/projects/scripts/adi_board.tcl - -adi_project fmcomms2_kc705 -adi_project_files fmcomms2_kc705 [list \ - "system_top.v" \ - "system_constr.xdc"\ - "$ad_hdl_dir/library/common/ad_iobuf.v" \ - "$ad_hdl_dir/projects/common/kc705/kc705_system_constr.xdc" ] - -adi_project_run fmcomms2_kc705 -source $ad_hdl_dir/library/axi_ad9361/axi_ad9361_delay.tcl - diff --git a/projects/fmcomms2/kc705/system_top.v b/projects/fmcomms2/kc705/system_top.v deleted file mode 100644 index 605e7057560..00000000000 --- a/projects/fmcomms2/kc705/system_top.v +++ /dev/null @@ -1,241 +0,0 @@ -// *************************************************************************** -// *************************************************************************** -// Copyright (C) 2014-2023 Analog Devices, Inc. All rights reserved. -// -// In this HDL repository, there are many different and unique modules, consisting -// of various HDL (Verilog or VHDL) components. The individual modules are -// developed independently, and may be accompanied by separate and unique license -// terms. -// -// The user should read each of these license terms, and understand the -// freedoms and responsibilities that he or she has by using this source/core. -// -// This core is distributed in the hope that it will be useful, but WITHOUT ANY -// WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR -// A PARTICULAR PURPOSE. -// -// Redistribution and use of source or resulting binaries, with or without modification -// of this file, are permitted under one of the following two license terms: -// -// 1. The GNU General Public License version 2 as published by the -// Free Software Foundation, which can be found in the top level directory -// of this repository (LICENSE_GPL2), and also online at: -// -// -// OR -// -// 2. An ADI specific BSD license, which can be found in the top level directory -// of this repository (LICENSE_ADIBSD), and also on-line at: -// https://github.com/analogdevicesinc/hdl/blob/main/LICENSE_ADIBSD -// This will allow to generate bit files and not release the source code, -// as long as it attaches to an ADI device. -// -// *************************************************************************** -// *************************************************************************** - -`timescale 1ns/100ps - -module system_top ( - - input sys_rst, - input sys_clk_p, - input sys_clk_n, - - input uart_sin, - output uart_sout, - - output [ 2:0] ddr3_1_n, - output [ 1:0] ddr3_1_p, - output ddr3_reset_n, - output [13:0] ddr3_addr, - output [ 2:0] ddr3_ba, - output ddr3_cas_n, - output ddr3_ras_n, - output ddr3_we_n, - output [ 0:0] ddr3_ck_n, - output [ 0:0] ddr3_ck_p, - output [ 0:0] ddr3_cke, - output [ 0:0] ddr3_cs_n, - output [ 7:0] ddr3_dm, - inout [63:0] ddr3_dq, - inout [ 7:0] ddr3_dqs_n, - inout [ 7:0] ddr3_dqs_p, - output [ 0:0] ddr3_odt, - - output mdio_mdc, - inout mdio_mdio, - output mii_rst_n, - input mii_col, - input mii_crs, - input mii_rx_clk, - input mii_rx_er, - input mii_rx_dv, - input [ 3:0] mii_rxd, - input mii_tx_clk, - output mii_tx_en, - output [ 3:0] mii_txd, - - output [26:1] linear_flash_addr, - output linear_flash_adv_ldn, - output linear_flash_ce_n, - inout [15:0] linear_flash_dq_io, - output linear_flash_oen, - output linear_flash_wen, - - output fan_pwm, - - inout [ 6:0] gpio_lcd, - inout [16:0] gpio_bd, - - output iic_rstn, - inout iic_scl, - inout iic_sda, - - input rx_clk_in_p, - input rx_clk_in_n, - input rx_frame_in_p, - input rx_frame_in_n, - input [ 5:0] rx_data_in_p, - input [ 5:0] rx_data_in_n, - - output tx_clk_out_p, - output tx_clk_out_n, - output tx_frame_out_p, - output tx_frame_out_n, - output [ 5:0] tx_data_out_p, - output [ 5:0] tx_data_out_n, - - output txnrx, - output enable, - - inout gpio_resetb, - inout gpio_sync, - inout gpio_en_agc, - inout [ 3:0] gpio_ctl, - inout [ 7:0] gpio_status, - - output spi_csn_0, - output spi_clk, - output spi_mosi, - input spi_miso -); - - // internal signals - - wire [63:0] gpio_i; - wire [63:0] gpio_o; - wire [63:0] gpio_t; - wire [ 7:0] spi_csn; - wire tdd_sync_t; - wire tdd_sync_o; - wire tdd_sync_i; - - // default logic - - assign ddr3_1_p = 2'b11; - assign ddr3_1_n = 3'b000; - assign fan_pwm = 1'b1; - assign iic_rstn = 1'b1; - assign spi_csn_0 = spi_csn[0]; - - // instantiations - - ad_iobuf #( - .DATA_WIDTH(15) - ) i_iobuf ( - .dio_t (gpio_t[46:32]), - .dio_i (gpio_o[46:32]), - .dio_o (gpio_i[46:32]), - .dio_p ({ gpio_resetb, - gpio_sync, - gpio_en_agc, - gpio_ctl, - gpio_status})); - - ad_iobuf #( - .DATA_WIDTH(17) - ) i_iobuf_bd ( - .dio_t (gpio_t[16:0]), - .dio_i (gpio_o[16:0]), - .dio_o (gpio_i[16:0]), - .dio_p (gpio_bd)); - - assign gpio_i[63:47] = gpio_o[63:47]; - assign gpio_i[31:17] = gpio_o[31:17]; - - system_wrapper i_system_wrapper ( - .ddr3_addr (ddr3_addr), - .ddr3_ba (ddr3_ba), - .ddr3_cas_n (ddr3_cas_n), - .ddr3_ck_n (ddr3_ck_n), - .ddr3_ck_p (ddr3_ck_p), - .ddr3_cke (ddr3_cke), - .ddr3_cs_n (ddr3_cs_n), - .ddr3_dm (ddr3_dm), - .ddr3_dq (ddr3_dq), - .ddr3_dqs_n (ddr3_dqs_n), - .ddr3_dqs_p (ddr3_dqs_p), - .ddr3_odt (ddr3_odt), - .ddr3_ras_n (ddr3_ras_n), - .ddr3_reset_n (ddr3_reset_n), - .ddr3_we_n (ddr3_we_n), - .gpio_lcd_tri_io (gpio_lcd), - .iic_main_scl_io (iic_scl), - .iic_main_sda_io (iic_sda), - .gpio0_o (gpio_o[31:0]), - .gpio0_t (gpio_t[31:0]), - .gpio0_i (gpio_i[31:0]), - .gpio1_o (gpio_o[63:32]), - .gpio1_t (gpio_t[63:32]), - .gpio1_i (gpio_i[63:32]), - .mdio_mdc (mdio_mdc), - .mdio_mdio_io (mdio_mdio), - .mii_col (mii_col), - .mii_crs (mii_crs), - .mii_rst_n (mii_rst_n), - .mii_rx_clk (mii_rx_clk), - .mii_rx_dv (mii_rx_dv), - .mii_rx_er (mii_rx_er), - .mii_rxd (mii_rxd), - .mii_tx_clk (mii_tx_clk), - .mii_tx_en (mii_tx_en), - .mii_txd (mii_txd), - .linear_flash_addr (linear_flash_addr), - .linear_flash_adv_ldn (linear_flash_adv_ldn), - .linear_flash_ce_n (linear_flash_ce_n), - .linear_flash_dq_io (linear_flash_dq_io), - .linear_flash_oen (linear_flash_oen), - .linear_flash_wen (linear_flash_wen), - .sys_clk_n (sys_clk_n), - .sys_clk_p (sys_clk_p), - .sys_rst (sys_rst), - .spi_clk_i (), - .spi_clk_o (spi_clk), - .spi_csn_i (spi_csn), - .spi_csn_o (spi_csn), - .spi_sdi_i (spi_miso), - .spi_sdo_i (spi_mosi), - .spi_sdo_o (spi_mosi), - .rx_clk_in_n (rx_clk_in_n), - .rx_clk_in_p (rx_clk_in_p), - .rx_data_in_n (rx_data_in_n), - .rx_data_in_p (rx_data_in_p), - .rx_frame_in_n (rx_frame_in_n), - .rx_frame_in_p (rx_frame_in_p), - .tx_clk_out_n (tx_clk_out_n), - .tx_clk_out_p (tx_clk_out_p), - .tx_data_out_n (tx_data_out_n), - .tx_data_out_p (tx_data_out_p), - .tx_frame_out_n (tx_frame_out_n), - .tx_frame_out_p (tx_frame_out_p), - .tdd_sync_i (1'b0), - .tdd_sync_o (), - .tdd_sync_t (), - .uart_sin (uart_sin), - .uart_sout (uart_sout), - .enable (enable), - .txnrx (txnrx), - .up_enable (gpio_o[47]), - .up_txnrx (gpio_o[48])); - -endmodule diff --git a/projects/scripts/adi_project_xilinx.tcl b/projects/scripts/adi_project_xilinx.tcl index d29c2eaf752..06b7a4802d2 100644 --- a/projects/scripts/adi_project_xilinx.tcl +++ b/projects/scripts/adi_project_xilinx.tcl @@ -45,7 +45,7 @@ set p_prcfg_status "" # \param[parameter_list] - a list of global parameters (parameters of the # system_top module) # -# Supported carrier names are: ac701, kc705, vc707, vcu118, vcu128, kcu105, zed, +# Supported carrier names are: ac701, vc707, vcu118, vcu128, kcu105, zed, # microzed, zc702, zc706, mitx405, zcu102. # proc adi_project {project_name {mode 0} {parameter_list {}} } { @@ -58,10 +58,6 @@ proc adi_project {project_name {mode 0} {parameter_list {}} } { set device "xc7a200tfbg676-2" set board [lindex [lsearch -all -inline [get_board_parts] *ac701*] end] } - if [regexp "_kc705" $project_name] { - set device "xc7k325tffg900-2" - set board [lindex [lsearch -all -inline [get_board_parts] *kc705*] end] - } if [regexp "_vc707" $project_name] { set device "xc7vx485tffg1761-2" set board [lindex [lsearch -all -inline [get_board_parts] *vc707*] end]