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projects/fmcomms8:Add READMEs.
Signed-off-by: Capota Bianca <bianca-ramona.capota@analog.com>
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projects/fmcomms8/README.md

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# FMCOMMS8 HDL Project
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- Evaluation board product page: [EVAL-AD-FMCOMMS8-EBZ](https://www.analog.com/eval-ad-fmcomms8-ebz)
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- System documentation: https://wiki.analog.com/resources/eval/user-guides/ad-fmcomms8-ebz/quick-start-guide
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- HDL project documentation: https://analogdevicesinc.github.io/hdl/projects/fmcomms8/index.html
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## Supported parts
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| Part name | Description |
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|------------------------------------------------|--------------------------------------------------------------|
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| [ADRV9009](https://www.analog.com/adrv9009) | Integrated Dual RF Tx, Rx, and Observation Rx |
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## Building the project
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Please enter the folder for the FPGA carrier you want to use and read the README.md.

projects/fmcomms8/Readme.md

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projects/fmcomms8/a10soc/README.md

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# FMCOMMS8/A10SOC HDL Project
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## Building the project
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```
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cd projects/fmcomms8/a10soc
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make
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```
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Corresponding device trees: [socfpga_arria10_socdk_fmcomms8.dts](https://github.com/analogdevicesinc/linux/blob/main/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_socdk_fmcomms8.dts)

projects/fmcomms8/zcu102/README.md

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# FMCOMMS8/ZCU102 HDL Project
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## Building the project
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```
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cd projects/fmcomms8/zcu102
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make
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```
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All of the RX/TX link modes can be found in the [ADRV9009 data sheet](https://www.analog.com/media/en/technical-documentation/data-sheets/ADRV9009.pdf). We offer support for only a few of them.
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The overwritable parameters from the environment:
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- [RX/TX/RX_OS]_JESD_M - [RX/TX/RX_OS] number of converters per link
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- [RX/TX/RX_OS]_JESD_L - [RX/TX/RX_OS] number of lanes per link
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- [RX/TX/RX_OS]_JESD_S - [RX/TX/RX_OS] number of samples per converter per frame
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Corresponding device tree: [zynqmp-zcu102-rev10-adrv9009-fmcomms8-jesd204-fsm.dts](https://github.com/analogdevicesinc/linux/tree/main/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9009-fmcomms8-jesd204-fsm.dts)

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