Skip to content

Commit dd748df

Browse files
docs/library/corundum: Updated IP documentation
Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
1 parent 6226dee commit dd748df

File tree

3 files changed

+203
-42
lines changed

3 files changed

+203
-42
lines changed
Lines changed: 77 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,77 @@
1+
.. _corundum_core:
2+
3+
Corundum Core
4+
================================================================================
5+
6+
.. hdl-component-diagram::
7+
8+
The :git-hdl:`Corundum Core <library/corundum/corundum_core>` is common in all
9+
projects and is used by the Corundum Network Stack. It repackages part of the
10+
`Corundum NIC <https://github.com/ucsdsysnet/corundum>`__ as an IP Core to be
11+
used with the ADI workflow.
12+
13+
Features
14+
--------------------------------------------------------------------------------
15+
16+
* Supports ARM and Microblaze processors
17+
18+
Files
19+
--------------------------------------------------------------------------------
20+
21+
.. list-table::
22+
:header-rows: 1
23+
24+
* - Name
25+
- Description
26+
* - :git-hdl:`library/corundum/corundum_core/corundum.v`
27+
- Verilog source for the Corundum Core top module.
28+
* - :git-hdl:`library/corundum/corundum_core/corundum_ip.tcl`
29+
- TCL script to generate the Vivado IP-integrator project.
30+
* - :git-hdl:`library/corundum/corundum_core/mqnic_app_block.v`
31+
- Verilog source for the Application Core that is found inside the Corundum
32+
core.
33+
* - :git-hdl:`library/corundum/corundum_core/mqnic_app_custom_params.vh`
34+
- Verilog header file used to parameterize the Application Core.
35+
* - :git-hdl:`library/corundum/corundum_core/mqnic_app_custom_ports.vh`
36+
- Verilog header file used to create the ports and interfaces for the
37+
Application Core.
38+
39+
Configuration Parameters
40+
--------------------------------------------------------------------------------
41+
42+
.. hdl-parameters::
43+
44+
Interface
45+
--------------------------------------------------------------------------------
46+
47+
.. hdl-interfaces::
48+
49+
Building
50+
--------------------------------------------------------------------------------
51+
52+
This IP uses `Corundum NIC <https://github.com/ucsdsysnet/corundum>`_
53+
repository, which needs to be cloned alongside the HDL repository.
54+
55+
.. shell::
56+
57+
~/workspace
58+
$git clone https://github.com/ucsdsysnet/corundum.git
59+
$cd hdl/library/corundum/corundum_core
60+
$make
61+
62+
.. admonition:: Publications
63+
64+
The following papers pertain to the Corundum source code:
65+
66+
- J- A. Forencich, A. C. Snoeren, G. Porter, G. Papen, Corundum: An Open-Source 100-Gbps NIC, in FCCM'20.
67+
(`FCCM Paper`_, `FCCM Presentation`_)
68+
- J- A. Forencich, System-Level Considerations for Optical Switching in Data Center Networks. (`Thesis`_)
69+
70+
.. _FCCM Paper: https://www.cse.ucsd.edu/~snoeren/papers/corundum-fccm20.pdf
71+
.. _FCCM Presentation: https://www.fccm.org/past/2020/forums/topic/corundum-an-open-source-100-gbps-nic/
72+
.. _Thesis: https://escholarship.org/uc/item/3mc9070t
73+
74+
References
75+
--------------------------------------------------------------------------------
76+
77+
* HDL IP core at :git-hdl:`library/corundum`
Lines changed: 107 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,107 @@
1+
.. _corundum_ethernet_core:
2+
3+
Corundum Ethernet Core
4+
================================================================================
5+
6+
.. hdl-component-diagram::
7+
8+
The :git-hdl:`Corundum Ethernet Core <library/corundum/ethernet_core>` is used
9+
by the Corundum Network Stack. The Ethernet Core is specific to each FPGA board
10+
and encompasses the Ethernet physical layer and other auxiliary structures such
11+
as SPI and I2C that are required by the Corundum system. The configurations are
12+
based on `Corundum NIC <https://github.com/ucsdsysnet/corundum>`__ reference
13+
designs that were adapted to suit the ADI workflow.
14+
15+
Features
16+
--------------------------------------------------------------------------------
17+
18+
* Supports 100G Ethernet-based systems that uses the CMAC core on the VCU118
19+
board
20+
21+
Files
22+
--------------------------------------------------------------------------------
23+
24+
.. list-table::
25+
:header-rows: 1
26+
27+
* - Name
28+
- Description
29+
* - :git-hdl:`library/corundum/ethernet_core/ethernet_core_vcu118.v`
30+
- Verilog source for the Ethernet Core top module for the VCU118 board.
31+
* - :git-hdl:`library/corundum/ethernet_core/eternet_ip.tcl`
32+
- TCL script to generate the Vivado IP-integrator project.
33+
34+
Configuration Parameters
35+
--------------------------------------------------------------------------------
36+
37+
.. hdl-parameters::
38+
39+
Interface
40+
--------------------------------------------------------------------------------
41+
42+
.. hdl-interfaces::
43+
44+
Building
45+
--------------------------------------------------------------------------------
46+
47+
This IP uses `Corundum NIC <https://github.com/ucsdsysnet/corundum>`_
48+
repository, which needs to be cloned alongside the HDL repository.
49+
50+
.. shell::
51+
52+
~/workspace
53+
$git clone https://github.com/ucsdsysnet/corundum.git
54+
$cd hdl/library/corundum/ethernet_core
55+
56+
An environment variable must be exported for this IP, so Vivado builds the
57+
appropriate configuration.
58+
59+
.. shell::
60+
61+
~/workspace/hdl/library/corundum/ethernet_core
62+
$export BOARD=VCU118
63+
$make
64+
65+
.. attention::
66+
67+
If the Ethernet Core has to be used in a project that is designed for a
68+
different board than the one the IP was originally built for, then the BOARD
69+
variable must be overwritten and the IP rebuilt!
70+
71+
.. hint::
72+
73+
To check what board the IP was built for, check the content of the board.env
74+
file after the build.
75+
76+
.. shell::
77+
78+
~/workspace
79+
$cd hdl/library/corundum/ethernet_core
80+
$cat board.env
81+
82+
.. important::
83+
84+
It is recommended to include the BOARD variable inside the project's Makefile
85+
as it will check if the IP is built with the specified variable, and if not,
86+
it will build/rebuild it.
87+
88+
.. shell::
89+
90+
export BOARD := VCU118
91+
92+
.. admonition:: Publications
93+
94+
The following papers pertain to the Corundum source code:
95+
96+
- J- A. Forencich, A. C. Snoeren, G. Porter, G. Papen, Corundum: An Open-Source 100-Gbps NIC, in FCCM'20.
97+
(`FCCM Paper`_, `FCCM Presentation`_)
98+
- J- A. Forencich, System-Level Considerations for Optical Switching in Data Center Networks. (`Thesis`_)
99+
100+
.. _FCCM Paper: https://www.cse.ucsd.edu/~snoeren/papers/corundum-fccm20.pdf
101+
.. _FCCM Presentation: https://www.fccm.org/past/2020/forums/topic/corundum-an-open-source-100-gbps-nic/
102+
.. _Thesis: https://escholarship.org/uc/item/3mc9070t
103+
104+
References
105+
--------------------------------------------------------------------------------
106+
107+
* HDL IP core at :git-hdl:`library/corundum`

docs/library/corundum/index.rst

Lines changed: 19 additions & 42 deletions
Original file line numberDiff line numberDiff line change
@@ -1,53 +1,33 @@
11
.. _corundum:
22

3-
Corundum
3+
Corundum Network Stack
44
================================================================================
55

6-
.. hdl-component-diagram::
6+
.. toctree::
7+
:hidden:
78

8-
The :git-hdl:`Corundum <library/corundum>` IP core
9-
repackages `Corundum NIC <https://github.com/corundum/corundum>`__ as an IP Core.
9+
Corundum Core <corundum_core/index>
10+
Corundum Ethernet Core <ethernet/index>
1011

11-
Features
12-
--------------------------------------------------------------------------------
13-
14-
* AXI-based configuration
15-
* Vivado compatible
16-
17-
Files
18-
--------------------------------------------------------------------------------
19-
20-
.. list-table::
21-
:header-rows: 1
22-
23-
* - Name
24-
- Description
25-
* - :git-hdl:`library/corundum/corundum.v`
26-
- Verilog source for the Corundum top module.
27-
* - :git-hdl:`library/corundum/corundum_ip.tcl`
28-
- TCL script to generate the Vivado IP-integrator project.
12+
The :git-hdl:`Corundum <library/corundum>` framework repackages
13+
`Corundum NIC <https://github.com/ucsdsysnet/corundum>`__ into 2 separate IP
14+
cores. These cores are the :ref:`corundum_core`, which is common in all projects
15+
that use the Corundum Network Stack and the :ref:`corundum_ethernet_core`, which
16+
is specific to each FPGA board and encompasses the Ethernet physical layer and
17+
other auxiliary structures such as SPI and I2C that are required by the Corundum
18+
system.
2919

30-
Configuration Parameters
20+
Sub-modules
3121
--------------------------------------------------------------------------------
3222

33-
.. hdl-parameters::
23+
* :ref:`corundum_core`
24+
* :ref:`corundum_ethernet_core`
3425

35-
Interface
26+
Software support
3627
--------------------------------------------------------------------------------
3728

38-
.. hdl-interfaces::
39-
40-
Building
41-
--------------------------------------------------------------------------------
42-
43-
This project uses `Corundum NIC <https://github.com/corundum/corundum>`_
44-
and it needs to be cloned alongside this repository.
45-
46-
.. code::
47-
48-
hdl/../> git clone https://github.com/corundum/corundum.git
49-
hdl/../corundum/> git checkout ed4a26e2cbc0a429c45d5cd5ddf1177f86838914
50-
hdl/library/corundum> make &
29+
* :git-linux:`Linux Driver <staging/corundum:drivers/net/mqnic/mqnic_main.c>`:
30+
Linux driver for the Corundum Network Stack.
5131

5232
.. admonition:: Publications
5333

@@ -64,7 +44,4 @@ and it needs to be cloned alongside this repository.
6444
References
6545
--------------------------------------------------------------------------------
6646

67-
* HDL IP core at :git-hdl:`library/corundum`
68-
* HDL project at :git-hdl:`projects/ad_gmsl2eth_sl`
69-
* :ref:`ad_gmsl2eth_sl`
70-
* :adi:`AD-GMSL2ETH-SL`
47+
* HDL IP cores at :git-hdl:`library/corundum`

0 commit comments

Comments
 (0)