projects/scripts/adi_board: ad_cpu_interconnect update (#1542)

- Adds the option to connect multiple AXI4 interfaces to the CPU interconnect from the same IP

Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>

Author: IstvanZsSzekely

projects/scripts/adi_board.tcl

@@ -1060,6 +1060,12 @@ proc ad_hpmx_interconnect {p_sel p_address p_name {p_intf_name {}}} {
   set p_intf_clock ""
   set p_intf_reset ""
 
+  if {$p_intf_name eq ""} {
+    set p_intf_name_bu ""
+  } else {
+    set p_intf_name_bu _${p_intf_name}
+  }
+
   if {$p_hier_cell != {}} {
     set p_intf_name [lrange [split $p_hier_intf "/"] end end]
 
@@ -1161,10 +1167,10 @@ proc ad_hpmx_interconnect {p_sel p_address p_name {p_intf_name {}}} {
           set p_address [expr ($p_address + 0x20000000)]
         }
       }
-      puts "create_bd_addr_seg -range $p_seg_range -offset $p_address $sys_addr_cntrl_space $p_seg_name SEG_data_$p_name"
+      puts "create_bd_addr_seg -range $p_seg_range -offset $p_address $sys_addr_cntrl_space $p_seg_name SEG_data_${p_name}${p_intf_name_bu}"
       create_bd_addr_seg -range $p_seg_range \
         -offset $p_address $sys_addr_cntrl_space \
-        $p_seg_name "SEG_data_${p_name}"
+        $p_seg_name "SEG_data_${p_name}${p_intf_name_bu}"
     } else {
       assign_bd_address $p_seg_name
     }