corundum: Corundum core

Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>

Author: IstvanZsSzekely

library/corundum/corundum_core/Makefile

@@ -0,0 +1,116 @@
+LIBRARY_NAME := corundum_core
+
+XILINX_DEPS += corundum_core_ip.tcl
+
+GENERIC_DEPS += corundum_core.v
+GENERIC_DEPS += mqnic_app_block.v
+GENERIC_DEPS += mqnic_app_custom_params.vh
+GENERIC_DEPS += mqnic_app_custom_ports.vh
+
+EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/mqnic_core_axi.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/mqnic_core.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/mqnic_dram_if.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/mqnic_interface.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/mqnic_interface_tx.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/mqnic_interface_rx.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/mqnic_port.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/mqnic_port_tx.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/mqnic_port_rx.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/mqnic_egress.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/mqnic_ingress.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/mqnic_l2_egress.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/mqnic_l2_ingress.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/mqnic_rx_queue_map.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/mqnic_ptp.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/mqnic_ptp_clock.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/mqnic_ptp_perout.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/mqnic_rb_clk_info.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/cpl_write.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/cpl_op_mux.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/desc_fetch.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/desc_op_mux.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/queue_manager.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/cpl_queue_manager.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/tx_fifo.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/rx_fifo.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/tx_req_mux.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/tx_engine.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/rx_engine.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/tx_checksum.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/rx_hash.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/rx_checksum.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/stats_counter.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/stats_collect.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/stats_dma_if_axi.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/stats_dma_latency.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/mqnic_tx_scheduler_block_rr.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/tx_scheduler_rr.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/rtl/ptp_perout.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/rtl/ptp_td_phc.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/rtl/ptp_td_leaf.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/rtl/ptp_td_rel2tod.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/rtl/mac_ctrl_rx.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/rtl/mac_pause_ctrl_rx.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/rtl/mac_ctrl_tx.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/rtl/mac_pause_ctrl_tx.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/lib/axi/rtl/axil_crossbar.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/lib/axi/rtl/axil_crossbar_addr.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/lib/axi/rtl/axil_crossbar_rd.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/lib/axi/rtl/axil_crossbar_wr.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/lib/axi/rtl/axil_reg_if.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/lib/axi/rtl/axil_reg_if_rd.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/lib/axi/rtl/axil_reg_if_wr.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/lib/axi/rtl/axil_register_rd.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/lib/axi/rtl/axil_register_wr.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/lib/axi/rtl/arbiter.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/lib/axi/rtl/priority_encoder.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/lib/axis/rtl/axis_adapter.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/lib/axis/rtl/axis_arb_mux.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/lib/axis/rtl/axis_async_fifo.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/lib/axis/rtl/axis_async_fifo_adapter.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/lib/axis/rtl/axis_demux.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/lib/axis/rtl/axis_fifo.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/lib/axis/rtl/axis_fifo_adapter.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/lib/axis/rtl/axis_pipeline_fifo.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/lib/pcie/rtl/irq_rate_limit.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/lib/pcie/rtl/dma_if_axi.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/lib/pcie/rtl/dma_if_axi_rd.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/lib/pcie/rtl/dma_if_axi_wr.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/lib/pcie/rtl/dma_if_mux.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/lib/pcie/rtl/dma_if_mux_rd.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/lib/pcie/rtl/dma_if_mux_wr.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/lib/pcie/rtl/dma_if_desc_mux.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/lib/pcie/rtl/dma_ram_demux_rd.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/lib/pcie/rtl/dma_ram_demux_wr.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/lib/pcie/rtl/dma_psdpram.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/lib/pcie/rtl/dma_client_axis_sink.v
+EXTERNAL_DEPS += ../../../../corundum/fpga/lib/pcie/rtl/dma_client_axis_source.v
+
+XILINX_DEPS += ../interfaces/if_ctrl_reg.xml
+XILINX_DEPS += ../interfaces/if_ctrl_reg_rtl.xml
+XILINX_DEPS += ../interfaces/if_ptp.xml
+XILINX_DEPS += ../interfaces/if_ptp_rtl.xml
+XILINX_DEPS += ../interfaces/if_flow_control_tx.xml
+XILINX_DEPS += ../interfaces/if_flow_control_tx_rtl.xml
+XILINX_DEPS += ../interfaces/if_flow_control_rx.xml
+XILINX_DEPS += ../interfaces/if_flow_control_rx_rtl.xml
+XILINX_DEPS += ../interfaces/if_ethernet_ptp.xml
+XILINX_DEPS += ../interfaces/if_ethernet_ptp_rtl.xml
+XILINX_DEPS += ../interfaces/if_axis_tx_ptp.xml
+XILINX_DEPS += ../interfaces/if_axis_tx_ptp_rtl.xml
+XILINX_DEPS += ../interfaces/if_jtag.xml
+XILINX_DEPS += ../interfaces/if_jtag_rtl.xml
+XILINX_DEPS += ../interfaces/if_gpio.xml
+XILINX_DEPS += ../interfaces/if_gpio_rtl.xml
+XILINX_DEPS += ../interfaces/if_axis_dma_desc.xml
+XILINX_DEPS += ../interfaces/if_axis_dma_desc_rtl.xml
+XILINX_DEPS += ../interfaces/if_axis_dma_desc_status.xml
+XILINX_DEPS += ../interfaces/if_axis_dma_desc_status_rtl.xml
+XILINX_DEPS += ../interfaces/if_dma_ram.xml
+XILINX_DEPS += ../interfaces/if_dma_ram_rtl.xml
+XILINX_DEPS += ../interfaces/if_axis_stat.xml
+XILINX_DEPS += ../interfaces/if_axis_stat_rtl.xml
+
+XILINX_INTERFACE_DEPS += corundum/interfaces
+
+include ../../scripts/library.mk