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cn0506: Add VADJ values
Signed-off-by: Stanca Pop <stanca.pop@analog.com>
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projects/cn0506/README.md

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- Evaluation board product page: [EVAL-CN0506](https://www.analog.com/cn0506)
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- System documentation: https://wiki.analog.com/resources/eval/user-guides/circuits-from-the-lab/cn0506
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- HDL project documentation: https://analogdevicesinc.github.io/hdl/projects/cn0506/index.html
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- Evaluation board VADJ range: 1.8V - 3.3V
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## Supported parts
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## Building the project
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Please enter the folder for the FPGA carrier you want to use and read the README.md.
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Please enter the folder for the FPGA carrier you want to use and read the README.md.

projects/cn0506/a10soc/README.md

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# CN0506/A10SOC HDL Project
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<!-- no_build_example, no_no_os -->
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## Building the project
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# CN0506/A10SOC HDL Project
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- Connect on FMC A HPC(V57.1)
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- VADJ = 1.8V
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- VADJ with which it was tested in hardware: 1.8V
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- Only the default configuration is supported in MII mode.
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- Connected to HPS (EMAC1-PHY0 and EMAC2-PHY1).
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## Building the project
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```
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cd projects/cn0506/a10soc
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make
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```
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Corresponding device trees:
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- [socfpga_arria10_socdk_cn0506_mii.dts](https://github.com/analogdevicesinc/linux/blob/main/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_socdk_cn0506_mii.dts)
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- [socfpga_arria10_socdk_cn0506_rgmii.dts](https://github.com/analogdevicesinc/linux/blob/main/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_socdk_cn0506_rgmii.dts)
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- [socfpga_arria10_socdk_cn0506_rgmii.dts](https://github.com/analogdevicesinc/linux/blob/main/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_socdk_cn0506_rgmii.dts)

projects/cn0506/zc706/README.md

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<!-- no_no_os -->
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# CN0506/ZC706 HDL Project
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- Connect on FMC LPC
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- VADJ with which it was tested in hardware: 2.5V
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## Building the project
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The parameters configurable through the `make` command, can be found below, as well as in the **system_project.tcl** file; it contains the default configuration.
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### Example configurations
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- Connect on FMC LPC
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- VADJ = 2.5V
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#### RGMII mode (default)
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- RGMII mode uses a GMII-to-RGMII converter, connected to PS7's Ethernet 0 (PHY 0) and Ethernet 1 (PHY 1)

projects/cn0506/zcu102/README.md

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<!-- no_no_os -->
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# CN0506/ZCU102 HDL Project
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- Connect on FMC1
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- VADJ with which it was tested in hardware: 1.8V
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## Building the project
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The parameters configurable through the `make` command, can be found below, as well as in the **system_project.tcl** file; it contains the default configuration.
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### Example configurations
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- Connect on FMC1
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- VADJ = 1.8V
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#### RGMII mode (default)
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- RGMII mode uses a GMII-to-RGMII converter, connected to PS8's Ethernet 0(PHY 0) and Ethernet 1(PHY 1)
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make INTF_CFG=RMII
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```
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Corresponding device tree: [zynqmp-zcu102-rev10-cn0506-rmii.dts](https://github.com/analogdevicesinc/linux/blob/main/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-cn0506-rmii.dts)
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Corresponding device tree: [zynqmp-zcu102-rev10-cn0506-rmii.dts](https://github.com/analogdevicesinc/linux/blob/main/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-cn0506-rmii.dts)

projects/cn0506/zed/README.md

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<!-- no_no_os -->
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# CN0506/ZED HDL Project
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- Connect on FMC LPC
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- VADJ with which it was tested in hardware: 2.5V
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## Building the project
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The parameters configurable through the `make` command, can be found below, as well as in the **system_project.tcl** file; it contains the default configuration.
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### Example configurations
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- Connect on FMC LPC
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- VADJ = 2.5V
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#### RGMII mode (default)
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- RGMII mode uses a GMII-to-RGMII converter, connected to PS7's Ethernet 0(PHY 0) and Ethernet 1(PHY 1).
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make INTF_CFG=RMII
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```
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Corresponding device tree: [zynq-zed-adv7511-cn0506-rmii.dts](https://github.com/analogdevicesinc/linux/blob/main/arch/arm/boot/dts/xilinx/zynq-zed-adv7511-cn0506-rmii.dts)
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Corresponding device tree: [zynq-zed-adv7511-cn0506-rmii.dts](https://github.com/analogdevicesinc/linux/blob/main/arch/arm/boot/dts/xilinx/zynq-zed-adv7511-cn0506-rmii.dts)

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