@@ -2,19 +2,116 @@ LIBRARY_NAME := ethernet
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XILINX_DEPS += ethernet_ip.tcl
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- EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/mqnic_port_map_mac_axis.v
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- EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/lib/axis/rtl/sync_reset.v
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- EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/cmac_gty_wrapper.v
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- EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/cmac_gty_ch_wrapper.v
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- EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/rb_drp.v
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- EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/cmac_pad.v
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- EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/mac_ts_insert.v
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+ GENERIC_DEPS += ethernet_core_k26.v
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+ GENERIC_DEPS += ethernet_core_vcu118.v
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- EXTERNAL_DEPS += ../../../../corundum/fpga/mqnic/VCU118/fpga_100g/ip/cmac_usplus.tcl
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- EXTERNAL_DEPS += ../../../../corundum/fpga/mqnic/VCU118/fpga_100g/ip/cmac_gty.tcl
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/mqnic_core_axi.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/mqnic_core.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/mqnic_dram_if.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/mqnic_interface.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/mqnic_interface_tx.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/mqnic_interface_rx.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/mqnic_port.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/mqnic_port_tx.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/mqnic_port_rx.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/mqnic_egress.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/mqnic_ingress.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/mqnic_l2_egress.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/mqnic_l2_ingress.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/mqnic_rx_queue_map.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/mqnic_ptp.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/mqnic_ptp_clock.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/mqnic_ptp_perout.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/mqnic_rb_clk_info.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/mqnic_port_map_phy_xgmii.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/cpl_write.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/cpl_op_mux.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/desc_fetch.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/desc_op_mux.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/queue_manager.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/cpl_queue_manager.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/tx_fifo.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/rx_fifo.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/tx_req_mux.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/tx_engine.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/rx_engine.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/tx_checksum.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/rx_hash.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/rx_checksum.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/rb_drp.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/stats_counter.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/stats_collect.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/stats_dma_if_axi.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/stats_dma_latency.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/mqnic_tx_scheduler_block_rr.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/tx_scheduler_rr.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/tdma_scheduler.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/tdma_ber.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/common/rtl/tdma_ber_ch.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/rtl/eth_mac_10g.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/rtl/axis_xgmii_rx_64.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/rtl/axis_xgmii_rx_32.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/rtl/axis_xgmii_tx_64.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/rtl/axis_xgmii_tx_32.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/rtl/mac_ctrl_rx.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/rtl/mac_ctrl_tx.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/rtl/mac_pause_ctrl_rx.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/rtl/mac_pause_ctrl_tx.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/rtl/lfsr.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/rtl/ptp_clock.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/rtl/ptp_clock_cdc.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/rtl/ptp_perout.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/axi/rtl/axil_interconnect.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/axi/rtl/axil_crossbar.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/axi/rtl/axil_crossbar_addr.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/axi/rtl/axil_crossbar_rd.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/axi/rtl/axil_crossbar_wr.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/axi/rtl/axil_reg_if.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/axi/rtl/axil_reg_if_rd.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/axi/rtl/axil_reg_if_wr.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/axi/rtl/axil_register_rd.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/axi/rtl/axil_register_wr.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/axi/rtl/arbiter.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/axi/rtl/priority_encoder.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/lib/axis/rtl/sync_reset.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/lib/axis/rtl/axis_adapter.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/lib/axis/rtl/axis_arb_mux.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/lib/axis/rtl/axis_async_fifo.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/lib/axis/rtl/axis_async_fifo_adapter.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/lib/axis/rtl/axis_demux.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/lib/axis/rtl/axis_fifo.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/lib/axis/rtl/axis_fifo_adapter.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/lib/axis/rtl/axis_pipeline_fifo.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/lib/axis/rtl/axis_register.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/pcie/rtl/irq_rate_limit.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/pcie/rtl/dma_if_axi.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/pcie/rtl/dma_if_axi_rd.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/pcie/rtl/dma_if_axi_wr.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/pcie/rtl/dma_if_mux.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/pcie/rtl/dma_if_mux_rd.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/pcie/rtl/dma_if_mux_wr.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/pcie/rtl/dma_if_desc_mux.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/pcie/rtl/dma_ram_demux_rd.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/pcie/rtl/dma_ram_demux_wr.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/pcie/rtl/dma_psdpram.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/pcie/rtl/dma_client_axis_sink.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/pcie/rtl/dma_client_axis_source.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/pcie/rtl/pulse_merge.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/rtl/eth_phy_10g_tx_if.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/rtl/eth_phy_10g_tx.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/rtl/eth_phy_10g_rx.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/rtl/eth_phy_10g_rx_frame_sync.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/rtl/eth_phy_10g.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/rtl/eth_phy_10g_rx_if.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/rtl/eth_phy_10g_rx_ber_mon.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/rtl/eth_phy_10g_rx_watchdog.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/rtl/xgmii_baser_dec_64.v
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+ EXTERNAL_DEPS += ../../../../corundum/fpga/lib/eth/rtl/xgmii_baser_enc_64.v
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XILINX_DEPS += ../interfaces/if_ctrl_reg.xml
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XILINX_DEPS += ../interfaces/if_ctrl_reg_rtl.xml
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+ XILINX_DEPS += ../interfaces/if_csr.xml
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+ XILINX_DEPS += ../interfaces/if_csr_rtl.xml
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XILINX_DEPS += ../interfaces/if_ptp.xml
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XILINX_DEPS += ../interfaces/if_ptp_rtl.xml
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XILINX_DEPS += ../interfaces/if_flow_control_tx.xml
@@ -29,6 +126,8 @@ XILINX_DEPS += ../interfaces/if_qspi.xml
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XILINX_DEPS += ../interfaces/if_qspi_rtl.xml
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XILINX_DEPS += ../interfaces/if_qsfp.xml
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XILINX_DEPS += ../interfaces/if_qsfp_rtl.xml
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+ XILINX_DEPS += ../interfaces/if_sfp.xml
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+ XILINX_DEPS += ../interfaces/if_sfp_rtl.xml
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XILINX_DEPS += ../interfaces/if_i2c.xml
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XILINX_DEPS += ../interfaces/if_i2c_rtl.xml
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