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ad4062: de10nano: Add project
Signed-off-by: Jorge Marques <jorge.marques@analog.com>
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‎projects/ad4062_ardz/common/ad4062_qsys.tcl

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###############################################################################
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## Copyright (C) 2025 Analog Devices, Inc. All rights reserved.
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### SPDX short identifier: ADIBSD
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###############################################################################
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source $ad_hdl_dir/library/i3c_controller/scripts/i3c_controller_qsys.tcl
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# disable I2C1
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set_instance_parameter_value sys_hps {I2C1_Mode} {N/A}
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set_instance_parameter_value sys_hps {I2C1_PinMuxing} {Unused}
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set async_clk 0
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set i2c_mod 4
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set offload $ad_project_params(OFFLOAD)
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set max_devs 16
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i3c_controller_create i3c $async_clk $i2c_mod $offload $max_devs
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if {$offload} {
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# axi pwm gen
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add_instance i3c_offload_pwm axi_pwm_gen
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set_instance_parameter_value i3c_offload_pwm {N_PWMS} {1}
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set_instance_parameter_value i3c_offload_pwm {PULSE_0_PERIOD} {120}
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set_instance_parameter_value i3c_offload_pwm {PULSE_0_WIDTH} {1}
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# receive dma
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add_instance i3c_offload_dma axi_dmac
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set_instance_parameter_value i3c_offload_dma {DMA_TYPE_SRC} {1}
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set_instance_parameter_value i3c_offload_dma {DMA_TYPE_DEST} {0}
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set_instance_parameter_value i3c_offload_dma {AXI_SLICE_SRC} {0}
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set_instance_parameter_value i3c_offload_dma {AXI_SLICE_DEST} {1}
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set_instance_parameter_value i3c_offload_dma {DMA_DATA_WIDTH_SRC} {32}
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set_instance_parameter_value i3c_offload_dma {DMA_DATA_WIDTH_DEST} {64}
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}
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# clocks
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add_connection sys_clk.clk i3c_host_interface.s_axi_clock
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add_connection sys_clk.clk i3c_core.if_clk
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if {$offload} {
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add_connection sys_clk.clk i3c_offload_dma.s_axi_clock
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add_connection sys_clk.clk i3c_offload_dma.if_s_axis_aclk
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add_connection sys_clk.clk i3c_offload_dma.m_dest_axi_clock
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add_connection sys_clk.clk i3c_offload_pwm.s_axi_clock
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add_connection sys_clk.clk i3c_offload_pwm.if_ext_clk
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}
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# resets
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add_connection sys_clk.clk_reset i3c_host_interface.s_axi_reset
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if {$offload} {
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add_connection sys_clk.clk_reset i3c_offload_dma.s_axi_reset
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add_connection sys_clk.clk_reset i3c_offload_dma.m_dest_axi_reset
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add_connection sys_clk.clk_reset i3c_offload_pwm.s_axi_reset
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}
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# interfaces
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if {$offload} {
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add_connection i3c_host_interface.offload_sdi i3c_offload_dma.s_axis
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add_connection i3c_offload_pwm.if_pwm_0 i3c_host_interface.if_offload_trigger
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}
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# exported interface
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set_interface_property i3c EXPORT_OF i3c_core.i3c
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# cpu interconnects
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ad_cpu_interconnect 0x00030000 i3c_host_interface.s_axi
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if {$offload} {
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ad_cpu_interconnect 0x00020000 i3c_offload_dma.s_axi
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ad_cpu_interconnect 0x00040000 i3c_offload_pwm.s_axi
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}
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# dma interconnect
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if {$offload} {
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ad_dma_interconnect i3c_offload_dma.m_dest_axi
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}
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# interrupts
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if {$offload} {
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ad_cpu_interrupt 4 i3c_offload_dma.interrupt_sender
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}
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ad_cpu_interrupt 5 i3c_host_interface.interrupt_sender

‎projects/ad4062_ardz/de10nano/Makefile

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####################################################################################
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## Copyright (c) 2018 - 2025 Analog Devices, Inc.
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### SPDX short identifier: BSD-1-Clause
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## Auto-generated, do not modify!
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####################################################################################
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PROJECT_NAME := ad4062_ardz_de10nano
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M_DEPS += ../common/ad4062_qsys.tcl
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M_DEPS += ../../scripts/adi_pd.tcl
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M_DEPS += ../../common/de10nano/de10nano_system_qsys.tcl
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M_DEPS += ../../common/de10nano/de10nano_system_assign.tcl
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M_DEPS += ../../../library/i3c_controller/scripts/i3c_controller_qsys.tcl
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LIB_DEPS += axi_dmac
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LIB_DEPS += axi_hdmi_tx
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LIB_DEPS += axi_sysid
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LIB_DEPS += i3c_controller/i3c_controller_core
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LIB_DEPS += i3c_controller/i3c_controller_host_interface
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LIB_DEPS += sysid_rom
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include ../../scripts/project-intel.mk

‎projects/ad4062_ardz/de10nano/system_constr.sdc

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###############################################################################
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## Copyright (C) 2025 Analog Devices, Inc. All rights reserved.
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### SPDX short identifier: ADIBSD
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###############################################################################
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create_clock -period "20.000 ns" -name sys_clk [get_ports {sys_clk}]
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create_clock -period "16.666 ns" -name usb1_clk [get_ports {usb1_clk}]
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derive_pll_clocks
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derive_clock_uncertainty
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set i3c_clk sys_clk
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# Input data driven the peripherals toggles every 4 cycles max (PP) of the capture clock
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# gets registered by rx_reg
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set_multicycle_path -from [get_ports i3c_sda] -to [get_clocks $i3c_clk] -setup 4
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set_multicycle_path -from [get_ports i3c_sda] -to [get_clocks $i3c_clk] -hold 3
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# Output data toggles every 2 cycles max of the capture clock (PP)
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set_multicycle_path -from [get_clocks $i3c_clk] -to [get_ports i3c_sda] -setup 2
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set_multicycle_path -from [get_clocks $i3c_clk] -to [get_ports i3c_sda] -hold 1
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set_multicycle_path -from [get_clocks $i3c_clk] -to [get_ports i3c_scl] -setup 2
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set_multicycle_path -from [get_clocks $i3c_clk] -to [get_ports i3c_scl] -hold 1
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# Notes
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# tcr/tcf rising/fall time for SCL is 150e06 * 1 / fSCL, at fSCL = 12.5 MHz => 12ns, at fSCL = 6.25 MHz, 24ns.
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# and t_SCO has a minimum/default value of 8ns and max of 12 ns
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# The input_delay and output_delay are selected for the worst case scenario.
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# One i3c_clk clock cycle is included in the sdo signal to ensure thd_pp(min) is met.
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set tsco_max 12;
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set tsco_min 8;
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set trc_dly_max 1;
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set trc_dly_min 0;
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set_input_delay -clock $i3c_clk -max [expr $tsco_max + $trc_dly_max] [get_ports i3c_sda]
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set_input_delay -clock $i3c_clk -min [expr $tsco_min + $trc_dly_min] [get_ports i3c_sda]
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set tsu 2;
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set thd 0;
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set_output_delay -clock $i3c_clk -max [expr $trc_dly_max + $tsu] [get_ports i3c_sda]
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set_output_delay -clock $i3c_clk -min [expr $trc_dly_min - $thd] [get_ports i3c_sda]
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set_output_delay -clock $i3c_clk -max [expr $trc_dly_max + $tsu] [get_ports i3c_scl]
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set_output_delay -clock $i3c_clk -min [expr $trc_dly_min - $thd] [get_ports i3c_scl]

‎projects/ad4062_ardz/de10nano/system_project.tcl

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###############################################################################
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## Copyright (C) 2025 Analog Devices, Inc. All rights reserved.
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### SPDX short identifier: ADIBSD
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###############################################################################
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set REQUIRED_QUARTUS_VERSION 22.1std.0
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set QUARTUS_PRO_ISUSED 0
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source ../../../scripts/adi_env.tcl
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source ../../scripts/adi_project_intel.tcl
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# get_env_param retrieves parameter value from the environment if exists,
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# other case use the default value.
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#
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# How to use over-writable parameters from the environment:
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#
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# e.g.
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# make OFFLOAD=1
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#
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# Parameter description:
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#
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# OFFLOAD : Enable offload mode, includes AXI_DMAC and AXI_PWM to the design
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# 1 - enabled
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# 0 - disabled (default)
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adi_project ad4062_ardz_de10nano [list \
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OFFLOAD [get_env_param OFFLOAD 0]]
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source $ad_hdl_dir/projects/common/de10nano/de10nano_system_assign.tcl
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# I3C interface bus
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set_location_assignment PIN_AG11 -to i3c_scl ; ## Arduino_IO15
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set_location_assignment PIN_AH9 -to i3c_sda ; ## Arduino_IO14
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to i3c_scl
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to i3c_sda
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# Enable if not using an external 2.2k ohm passive pull-up
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#set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to i3c_sda
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# reset and GPIO signals
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set_location_assignment PIN_AE15 -to common_shutdown ; ## Arduino_IO9
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set_location_assignment PIN_AH8 -to common_reset_adc ; ## Arduino_IO7
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set_location_assignment PIN_U13 -to common_csb_aux ; ## Arduino_IO5
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set_location_assignment PIN_U14 -to common_sw_ff ; ## Arduino_IO4
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set_location_assignment PIN_AG9 -to common_drdy_aux ; ## Arduino_IO3
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set_location_assignment PIN_AF13 -to common_blue_led ; ## Arduino_IO1
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set_location_assignment PIN_AG13 -to common_yellow_led ; ## Arduino_IO0
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to common_shutdown
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to common_reset_adc
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to common_csb_aux
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to common_sw_ff
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to common_drdy_aux
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to common_blue_led
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to common_yellow_led
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# synchronization and timing
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set_location_assignment PIN_AG8 -to common_sync_in ; ## arduino_IO6
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set_instance_assignment -name io_standard "3.3-v lvttl" -to common_sync_in
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execute_flow -compile

‎projects/ad4062_ardz/de10nano/system_qsys.tcl

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###############################################################################
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## Copyright (C) 2025 Analog Devices, Inc. All rights reserved.
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### SPDX short identifier: ADIBSD
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###############################################################################
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source $ad_hdl_dir/projects/scripts/adi_pd.tcl
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source $ad_hdl_dir/projects/common/de10nano/de10nano_system_qsys.tcl
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# disable I2C1
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set_instance_parameter_value sys_hps {I2C1_Mode} {N/A}
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set_instance_parameter_value sys_hps {I2C1_PinMuxing} {Unused}
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# set clk to 100MHz
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set_instance_parameter_value sys_hps {S2FCLK_USER0CLK_FREQ} {100.0}
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if [info exists ad_project_dir] {
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source ../../common/ad4062_qsys.tcl
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} else {
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source ../common/ad4062_qsys.tcl
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}
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# system ID
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set_instance_parameter_value axi_sysid_0 {ROM_ADDR_BITS} {9}
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set_instance_parameter_value rom_sys_0 {ROM_ADDR_BITS} {9}
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set_instance_parameter_value rom_sys_0 {PATH_TO_FILE} "[pwd]/mem_init_sys.txt"
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sysid_gen_sys_init_file;

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