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docs: Add AD4062-ARDZ project
Describe EVAL-AD4062-ARDZ support with coraz7s and de10nano. Signed-off-by: Jorge Marques <jorge.marques@analog.com>
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docs/projects/ad4062_ardz/index.rst

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.. _ad4062-ardz:
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AD4062-ARDZ HDL project
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================================================================================
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Overview
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--------------------------------------------------------------------------------
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The HDL reference design for the :adi:`AD4060`, :adi:`AD4062`.
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They are versatile, 16-bit/12-bit, successive approximation register (SAR)
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analog-to-digital converters (ADCs) that enable low-power, high-density data
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acquisition solutions without sacrificing precision. These ADCs offer a unique
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balance of performance and power efficiency, plus innovative features for
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seamlessly switching between high-resolution and low-power modes tailored to the
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immediate needs of the system.
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The :adi:`AD4060 <eval-ad4060-eval-ad4062>`/:adi:`AD4062 <eval-ad4060-eval-ad4062>`
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evaluation boards enable quick and easy evaluation of the performance and
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features of the :adi:`AD4060` or the :adi:`AD4062`, respectively.
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This project has an :ref:`i3c_controller` instance to control and acquire data
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from the precision ADC.
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Supported boards
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-------------------------------------------------------------------------------
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- :adi:`EVAL-AD4060`
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- :adi:`EVAL-AD4062`
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Supported devices
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-------------------------------------------------------------------------------
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- :adi:`AD4060`
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- :adi:`AD4062`
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Supported carriers
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-------------------------------------------------------------------------------
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- `Cora Z7S <https://digilent.com/shop/cora-z7-zynq-7000-single-core-for-arm-fpga-soc-development>`__
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Arduino shield connector
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- :intel:`DE10-Nano <content/www/us/en/developer/topic-technology/edge-5g/hardware/fpga-de10-nano.html>`
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Arduino shield connector
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Block design
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-------------------------------------------------------------------------------
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Block diagram
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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The data path and clock domains are depicted in the below diagram:
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.. image:: ad4062_hdl.svg
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:width: 800
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:align: center
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:alt: AD4062-ARDZ block diagram
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CPU/Memory interconnects addresses
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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The addresses are dependent on the architecture of the FPGA, having an offset
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added to the base address from HDL (see more at :ref:`architecture`).
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.. table:: Cora Z7S
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============== ===========
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Instance Address
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============== ===========
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i3c_controller 0x44A0_0000
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============== ===========
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.. table:: DE10-Nano
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============== ===========
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Instance Address
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============== ===========
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i3c_controller 0x0003_0000
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============== ===========
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I3C/I2C connections
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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.. list-table:: Cora Z7s
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:header-rows: 1
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* - I2C/I3C subordinate
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- address
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- I3C manager
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* - EEPROM
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- 0x52
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- i3c_controller
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* - ADC
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- i3c_controller
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- Provisioned PID
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.. list-table:: DE10-Nano
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:header-rows: 1
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* - I2C/I3C subordinate
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- EEPROM
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- I3C manager
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* - EEPROM
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- 0x52
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- i3c_controller
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* - ADC
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- i3c_controller
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- Provisioned PID
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.. caution::
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By default, the DE10-Nano does not populate the passive pull-up in the SDA
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lane (DNI). Either populate the DE10-Nano's resistor R1 with a 2.2k ohm
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resistor, or use the ``WEAK_PULL_UP_RESISTOR`` to the ``i3c_sda`` pin.
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Device address considering the EEPROM address pins ``A0=0``, ``A1=1``, ``A2=0``.
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For the ADC, check the part datasheet and the set address pins.
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GPIOs
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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The Software GPIO number is calculated as follows:
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- Cora Z7S: the offset is 54
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.. list-table::
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:widths: 25 25 25 25
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:header-rows: 2
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* - GPIO signal
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- Direction
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- HDL GPIO EMIO
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- Software GPIO
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* -
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- (from FPGA view)
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-
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- Zynq-7000
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* - adc_gp1
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- INOUT
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- 33
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- 87
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* - adc_gp0
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- INOUT
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- 32
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- 86
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- DE10-Nano: the offset is 32
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.. list-table::
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:widths: 25 25 25 25
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:header-rows: 2
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* - GPIO signal
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- Direction
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- HDL GPIO EMIO
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- Software GPIO
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* -
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- (from FPGA view)
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-
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-
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* - adc_gp1
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- INPUT
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- 33
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- 1
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* - adc_gp0
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- INPUT
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- 32
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- 0
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Interrupts
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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Below are the Programmable Logic interrupts used in this project.
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=================== === ========== ===========
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Instance name HDL Linux Zynq Actual Zynq
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=================== === ========== ===========
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i3c_controller 12 56 88
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=================== === ========== ===========
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================ === =============== ================
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Instance name HDL Linux DE10-Nano Actual DE10-Nano
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================ === =============== ================
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i3c_controller 5 45 77
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================ === =============== ================
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Building the HDL project
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-------------------------------------------------------------------------------
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The design is built upon ADI's generic HDL reference design framework.
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ADI distributes the bit/elf files of these projects as part of the
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:dokuwiki:`ADI Kuiper Linux <resources/tools-software/linux-software/kuiper-linux>`.
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If you want to build the sources, ADI makes them available on the
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:git-hdl:`HDL repository </>`. To get the source you must
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`clone <https://git-scm.com/book/en/v2/Git-Basics-Getting-a-Git-Repository>`__
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the HDL repository, and then build the project as follows:
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**Linux/Cygwin/WSL**
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.. shell::
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$cd hdl/projects/ad4062_ardz/coraz7s
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$make
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.. shell::
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$cd hdl/projects/ad4062_ardz/de10nano
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$make
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A more comprehensive build guide can be found in the :ref:`build_hdl` user guide.
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Resources
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-------------------------------------------------------------------------------
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Hardware related
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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- Product datasheets:
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- :adi:`AD4060`
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- :adi:`AD4062`
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HDL related
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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- :git-hdl:`AD4062-ARDZ HDL project source code <projects/ad4062-ardz>`
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.. list-table::
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:widths: 30 35 35
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:header-rows: 1
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* - IP name
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- Source code link
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- Documentation link
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* - AXI_SYSID
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- :git-hdl:`library/axi_sysid <library/axi_sysid>`
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- :ref:`here <axi_sysid>`
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* - AXI_HDMI_TX
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- :git-hdl:`library/axi_hdmi_tx <library/axi_hdmi_tx>` *
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- :ref:`here <axi_hdmi_tx>`
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* - I3C_CONTROLLER_HOST_INTERFACE
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- :git-hdl:`library/i3c_controller/i3c_controller_host_interface`
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- :ref:`here <i3c_controller host_interface>`
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* - I3C_CONTROLLER_CORE
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- :git-hdl:`library/i3c_controller/i3c_controller_core`
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- :ref:`here <i3c_controller core>`
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* - SYSID_ROM
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- :git-hdl:`library/sysid_rom <library/sysid_rom>`
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- :ref:`here <axi_sysid>`
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.. admonition:: Legend
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:class: note
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- ``*`` instantiated only for DE10-Nano
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- :ref:`I3C Controller documentation <i3c_controller>`
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.. include:: ../common/more_information.rst
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.. include:: ../common/support.rst

docs/projects/index.rst

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AD353XR <ad353xr/index>
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AD35XXR-EVB <ad35xxr_evb/index>
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AD4052-ARDZ <ad4052_ardz/index>
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AD4062-ARDZ <ad4062_ardz/index>
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AD408X-FMC-EVB <ad408x_fmc_evb/index>
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AD4110-SDZ <ad4110/index>
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AD411x-AD717x <ad411x_ad717x/index>

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