Change CIFAR-10, CIFAR-100 examples to NAS-derived models (#116)

Author: MaximGorkem

gen-demos-max78000.sh

@@ -5,8 +5,8 @@ COMMON_ARGS="--device $DEVICE --compact-data --mexpress --timer 0 --display-chec
 
 ./ai8xize.py --verbose --log --test-dir $TARGET --prefix mnist --checkpoint-file trained/ai85-mnist-qat8-q.pth.tar --config-file networks/mnist-chw-ai85.yaml --softmax $COMMON_ARGS "$@"
 ./ai8xize.py --verbose --log --test-dir $TARGET --prefix mnist-riscv --checkpoint-file trained/ai85-mnist-qat8-q.pth.tar --config-file networks/mnist-chw-ai85.yaml --softmax $COMMON_ARGS --riscv --riscv-debug "$@"
-./ai8xize.py --verbose --log --test-dir $TARGET --prefix cifar-10 --checkpoint-file trained/ai85-cifar10-qat8-q.pth.tar --config-file networks/cifar10-hwc-ai85.yaml --softmax $COMMON_ARGS "$@"
-./ai8xize.py --verbose --log --test-dir $TARGET --prefix cifar-100 --checkpoint-file trained/ai85-cifar100-qat8-q.pth.tar --config-file networks/cifar100-simple.yaml --softmax $COMMON_ARGS --boost 2.5 "$@"
+./ai8xize.py --verbose --log --test-dir $TARGET --prefix cifar-10 --checkpoint-file trained/ai85-cifar10-qat8-q.pth.tar --config-file networks/cifar10-nas.yaml --sample-input tests/sample_cifar-10.npy --softmax $COMMON_ARGS "$@"
+./ai8xize.py --verbose --log --test-dir $TARGET --prefix cifar-100 --checkpoint-file trained/ai85-cifar100-qat8-q.pth.tar --config-file networks/cifar100-nas.yaml --softmax $COMMON_ARGS --boost 2.5 "$@"
 ./ai8xize.py --verbose --log --test-dir $TARGET --prefix cifar-100-mixed --checkpoint-file trained/ai85-cifar100-qat-mixed-q.pth.tar --config-file networks/cifar100-simple.yaml --softmax $COMMON_ARGS --boost 2.5 "$@"
 ./ai8xize.py --verbose --log --test-dir $TARGET --prefix cifar-100-simplewide2x-mixed --checkpoint-file trained/ai85-cifar100-simplenetwide2x-qat-mixed-q.pth.tar --config-file networks/cifar100-simplewide2x.yaml --softmax $COMMON_ARGS --boost 2.5 "$@"
 ./ai8xize.py --verbose --log --test-dir $TARGET --prefix cifar-100-residual --checkpoint-file trained/ai85-cifar100-residual-qat8-q.pth.tar --config-file networks/cifar100-ressimplenet.yaml --softmax $COMMON_ARGS --boost 2.5 "$@"

networks/cifar10-nas.yaml

@@ -0,0 +1,81 @@
+# HWC (little data) configuration for CIFAR10 NAS Model
+# Simple Model
+
+arch: ai85nascifarnet
+dataset: CIFAR10
+
+layers:
+- out_offset: 0x4000
+  processors: 0x0000000000000007 #1_1
+  operation: conv2d
+  kernel_size: 3x3
+  pad: 1
+  activate: ReLU
+  data_format: HWC
+- out_offset: 0x0000
+  processors: 0xffffffffffffffff #1_2
+  operation: conv2d
+  kernel_size: 1x1
+  pad: 0
+  activate: ReLU
+- out_offset: 0x4000
+  processors: 0x00000000ffffffff #1_3
+  operation: conv2d
+  kernel_size: 3x3
+  pad: 1
+  activate: ReLU
+- max_pool: 2
+  pool_stride: 2
+  out_offset: 0x0000
+  processors: 0xffffffffffffffff #2_1
+  operation: conv2d
+  kernel_size: 3x3
+  pad: 1
+  activate: ReLU
+- out_offset: 0x4000
+  processors: 0xffffffff00000000 #2_2
+  operation: conv2d
+  kernel_size: 1x1
+  pad: 0
+  activate: ReLU
+- max_pool: 2
+  pool_stride: 2
+  out_offset: 0x0000
+  processors: 0xffffffffffffffff #3_1
+  operation: conv2d
+  kernel_size: 3x3
+  pad: 1
+  activate: ReLU
+- out_offset: 0x4000
+  processors: 0xffffffffffffffff #3_2
+  operation: conv2d
+  kernel_size: 1x1
+  pad: 0
+  activate: ReLU
+- max_pool: 2
+  pool_stride: 2
+  out_offset: 0x0000
+  processors: 0xffffffffffffffff #4_1
+  operation: conv2d
+  kernel_size: 3x3
+  pad: 1
+  activate: ReLU
+- out_offset: 0x4000
+  processors: 0xffffffffffffffff #4_2
+  operation: conv2d
+  kernel_size: 3x3
+  pad: 1
+  activate: ReLU
+- max_pool: 2
+  pool_stride: 2
+  out_offset: 0x0000
+  processors: 0xffffffffffffffff #5_1
+  operation: conv2d
+  kernel_size: 1x1
+  pad: 0
+  activate: ReLU
+- flatten: true
+  out_offset: 0x4000
+  processors: 0xffffffffffffffff
+  operation: MLP
+  output_width: 32

networks/cifar100-nas.yaml

@@ -0,0 +1,81 @@
+# HWC (little data) configuration for CIFAR100 NAS Model
+# Simple Model
+
+arch: ai85nascifarnet
+dataset: CIFAR100
+
+layers:
+- out_offset: 0x4000
+  processors: 0x0000000000000007 #1_1
+  operation: conv2d
+  kernel_size: 3x3
+  pad: 1
+  activate: ReLU
+  data_format: HWC
+- out_offset: 0x0000
+  processors: 0xffffffffffffffff #1_2
+  operation: conv2d
+  kernel_size: 1x1
+  pad: 0
+  activate: ReLU
+- out_offset: 0x4000
+  processors: 0x00000000ffffffff #1_3
+  operation: conv2d
+  kernel_size: 3x3
+  pad: 1
+  activate: ReLU
+- max_pool: 2
+  pool_stride: 2
+  out_offset: 0x0000
+  processors: 0xffffffffffffffff #2_1
+  operation: conv2d
+  kernel_size: 3x3
+  pad: 1
+  activate: ReLU
+- out_offset: 0x4000
+  processors: 0xffffffff00000000 #2_2
+  operation: conv2d
+  kernel_size: 1x1
+  pad: 0
+  activate: ReLU
+- max_pool: 2
+  pool_stride: 2
+  out_offset: 0x0000
+  processors: 0xffffffffffffffff #3_1
+  operation: conv2d
+  kernel_size: 3x3
+  pad: 1
+  activate: ReLU
+- out_offset: 0x4000
+  processors: 0xffffffffffffffff #3_2
+  operation: conv2d
+  kernel_size: 1x1
+  pad: 0
+  activate: ReLU
+- max_pool: 2
+  pool_stride: 2
+  out_offset: 0x0000
+  processors: 0xffffffffffffffff #4_1
+  operation: conv2d
+  kernel_size: 3x3
+  pad: 1
+  activate: ReLU
+- out_offset: 0x4000
+  processors: 0xffffffffffffffff #4_2
+  operation: conv2d
+  kernel_size: 3x3
+  pad: 1
+  activate: ReLU
+- max_pool: 2
+  pool_stride: 2
+  out_offset: 0x0000
+  processors: 0xffffffffffffffff #5_1
+  operation: conv2d
+  kernel_size: 1x1
+  pad: 0
+  activate: ReLU
+- flatten: true
+  out_offset: 0x4000
+  processors: 0xffffffffffffffff
+  operation: MLP
+  output_width: 32