Skip to content

Commit d3ad191

Browse files
committed
Remove some now-unnecessary allow(clippy) lints
These were a holdover before the assembler crate inherited lint settings from the workspace.
1 parent 944ae82 commit d3ad191

File tree

4 files changed

+0
-11
lines changed

4 files changed

+0
-11
lines changed

cranelift/assembler-x64/src/fuzz.rs

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -84,7 +84,6 @@ fn pretty_print_hexadecimal(hex: &[u8]) -> String {
8484
/// See `replace_signed_immediates`.
8585
macro_rules! hex_print_signed_imm {
8686
($hex:expr, $from:ty => $to:ty) => {{
87-
#[allow(clippy::cast_possible_wrap, reason = "bit conversion is intended here")]
8887
let imm = <$from>::from_str_radix($hex, 16).unwrap() as $to;
8988
let mut simm = String::new();
9089
if imm < 0 {

cranelift/assembler-x64/src/imm.rs

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,5 @@
11
//! Immediate operands to instructions.
22
3-
#![allow(clippy::module_name_repetitions, reason = "'imm::Imm*' is fine")]
4-
53
use crate::api::CodeSink;
64
use std::fmt;
75

@@ -67,7 +65,6 @@ impl Simm8 {
6765
}
6866

6967
pub fn encode(&self, sink: &mut impl CodeSink) {
70-
#[allow(clippy::cast_sign_loss, reason = "bit conversion is intended here")]
7168
sink.put1(self.0 as u8);
7269
}
7370

@@ -127,7 +124,6 @@ impl Simm16 {
127124
}
128125

129126
pub fn encode(&self, sink: &mut impl CodeSink) {
130-
#[allow(clippy::cast_sign_loss, reason = "bit conversion is intended here")]
131127
sink.put2(self.0 as u16);
132128
}
133129

@@ -195,7 +191,6 @@ impl Simm32 {
195191
}
196192

197193
pub fn encode(&self, sink: &mut impl CodeSink) {
198-
#[allow(clippy::cast_sign_loss, reason = "bit conversion is intended here")]
199194
sink.put4(self.0 as u32);
200195
}
201196

cranelift/assembler-x64/src/mem.rs

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -384,7 +384,6 @@ pub fn emit_modrm_sib_disp<R: AsReg>(
384384
// to the end of the u32 field. So, to compensate for
385385
// this, we emit a negative extra offset in the u32 field
386386
// initially, and the relocation will add to it.
387-
#[allow(clippy::cast_sign_loss, reason = "bit conversion is intended here")]
388387
sink.put4(-(i32::from(bytes_at_end)) as u32);
389388
}
390389
}

cranelift/assembler-x64/src/rex.rs

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,5 @@
11
//! Encoding logic for REX instructions.
22
3-
// #![allow(clippy::bool_to_int_with_if)]
4-
53
use crate::api::CodeSink;
64

75
pub(crate) fn low8_will_sign_extend_to_32(xs: i32) -> bool {
@@ -151,7 +149,6 @@ impl Imm {
151149
if val % i32::from(scaling) == 0 {
152150
let scaled = val / i32::from(scaling);
153151
if low8_will_sign_extend_to_32(scaled) {
154-
#[allow(clippy::cast_possible_truncation, reason = "pre-existing code")]
155152
return Imm::Imm8(scaled as i8);
156153
}
157154
}
@@ -183,7 +180,6 @@ impl Imm {
183180
}
184181

185182
/// Emit the truncated immediate into the code sink.
186-
#[allow(clippy::cast_sign_loss, reason = "bit conversion is intended here")]
187183
pub fn emit(self, sink: &mut impl CodeSink) {
188184
match self {
189185
Imm::None => {}

0 commit comments

Comments
 (0)