update nrfx to v2.1.0

this is required for latest tinyusb

Author: hathach

cores/nRF5/nordic/nrfx/CHANGELOG.md

@@ -1,6 +1,93 @@
 # Changelog
 All notable changes to this project are documented in this file.
 
+## [2.1.0] - 2020-01-24
+### Added
+- Added HALs for DCNF, OSCILLATORS, USBREG, and VREQCTRL.
+- Added support for 1-MHz clock frequency in TWIM.
+- Introduced the NRFX_I2S_STATUS_TRANSFER_STOPPED flag in the I2S driver.
+- Introduced the nrfx_power_compat layer that allows use of the nrfx_power API with new SoC.
+- Added encryption support in the QSPI driver.
+- Added support for USBD in nRF5340.
+- Expanded HALs to cover new functions in nRF5340: GPIO, I2S, PDM, POWER, QSPI, and REGULATORS.
+- Introduced new clock management system in the CLOCK driver.
+- Introduced new audio clock configuration settings in the I2S and PDM drivers for nRF5340.
+- Implemented workaround for nRF5340 anomaly 4 in the CLOCK driver.
+- Implemented workaround for nRF5340 anomaly 10 in the CCM HAL.
+- Implemented workaround for nRF9160 anomaly 21 and nRF5340 anomaly 6 in the NVMC HAL.
+- Implemented workaround for nRF9160 anomaly 23 and nRF5340 anomaly 44 in the UARTE driver.
+- Introduced the NRFX_TWIM_NO_SPURIOUS_STOP_CHECK flag in the TWIM driver.
+- Added functions for getting shortcut configuration in the TWIM HAL.
+
+### Changed
+- Updated MDK to 8.30.2.
+- Reorganized templates of nrfx_config header files for different SoCs. Now they are included through one common file according to the selected SoC.
+- Improved the UARTE driver to consume less current after the driver uninitialization. Now all clocks are disabled properly after uninitialization.
+- Improved the GPIOTE driver robustness by setting the LATCH functionality to be used by default.
+- Changed names of the frequency divider symbols in the QSPI HAL to reflect the new frequencies in nRF5340. Old API names were preserved and are still supported.
+- Improved spurious STOP condition handling in the TWIM driver.
+- Improved sampling procedure in the advanced blocking mode in the SAADC driver.
+- Improved calibration procedure in the SAADC driver for nRF5340 and nRF9160.
+
+### Fixed
+- Fixed address assertions in NVMC driver for the nRF5340 network core.
+- Fixed an issue in the TWI driver that would make the driver stuck when a premature STOP condition was generated by a slave device. The driver now handles this situation properly and signals that a bus error occurred.
+- Fixed the stopping procedure in the PWM driver. Previously in very specific circumstances the PWM output might be not stopped at all or might be immediately restarted.
+
+## [2.0.0] - 2019-11-06
+### Added
+- Added support for nRF5340.
+- Added HALs for: CACHE, FPU, MUTEX, and RESET.
+- Added driver and HAL for IPC.
+- Added possibility to configure in UART and UARTE the number of stop bits and the type of parity, when a given SoC allows it.
+- Added function in the GPIO HAL for selecting the MCU to control the specified pin.
+- Added support for ONESHOT register in the TIMER HAL.
+- Added support for LIST feature in HALs for SPIS and TWIS.
+- Added possibility to choose TIMER instance used for workarounds in the NFCT driver.
+
+### Changed
+- Updated MDK to 8.29.0.
+- Enhanced PWM driver API: added the "p_context" parameter to the event handler.
+- Updated address and task getters in all HALs to return values as uint32_t type.
+- Updated all HAL functions to take the pointer to the structure of registers of the peripheral as their first argument.
+- Changed __STATIC_INLINE symbol to NRF_STATIC_INLINE for HALs and NRFX_STATIC_INLINE for drivers.
+- Refactored the SAADC driver and HAL.
+- Refactored the WDT driver and HAL to support multiple instances.
+- Changed nrfx_gpiote_init() function to take the interrupt priority as its parameter. Previously this priority was an nrfx_config option.
+- Changed nrf_usbd_ep_all_disable() function to disable really all endpoints. Use nrf_usbd_ep_default_config() to restore the default endpoint configuration.
+- Updated nrfx_gpiote_out_init() and nrfx_gpiote_in_init() return codes. Now NRFX_ERROR_INVALID_STATE is changed to NRFX_ERROR_BUSY.
+- Replaced the SWI/EGU driver with one for EGU only.
+- Aligned symbol names for default IRQ priority in nrfx_config. These symbols are now adhering to the following standard: NRFX_xxx_DEFAULT_CONFIG_IRQ_PRIORITY.
+- Changed the way of configuring the MISO pin pull setting in SPI and SPIM drivers. Now it can be set separately for each instance.
+
+### Removed
+- Removed deprecated functions from drivers: TWI and TWIM. See migration guide for details.
+- Removed deprecated functions from HALs: ECB, NVMC, and TEMP. See migration guide for details.
+- Removed redundant bariers in the nrfx_usbd driver.
+- Removed the default configuration values for drivers from the nrfx_config header files.
+
+## [1.8.1] - 2019-10-21
+### Added
+- Added functions in the GPIOTE driver for getting task or event for the specified GPIO pin.
+
+### Changed
+- Updated MDK to version 8.27.1.
+- Moved the nrfx_gppi helper from helpers/nrfx_gppi/ to helpers/.
+- Changed the interrupt initialization in the GPIOTE driver, so that mapping of the GPIOTEx_IRQn enumeration values is no longer needed for nRF9160.
+
+## [1.8.0] - 2019-08-27
+### Added
+- Added support for nRF52833.
+- Added bus recovery feature in the TWI and TWIM drivers.
+- Added the nrfx_gppi helper layer to facilitate developing generic code that can utilize PPI or DPPI, depending on which interface is available in a given SoC.
+
+### Changed
+- Updated MDK to version 8.27.0.
+
+### Fixed
+- Fixed an issue in the TWIM driver that would make the driver stuck when a premature STOP condition was generated by a slave device. The driver now handles this situation properly and signals that a bus error occurred.
+- Fixed a frame timing bug in the NFCT driver. Previously, the timing of the SENS_RES response could be violated after the NFCT peripheral was put to the Sleep state with the SLP_REQ command.
+
 ## [1.7.2] - 2019-07-25
 ### Added
 - Added functions in the DPPI, GPIOTE, PPI, RTC, and TIMER HALs for getting tasks and events specified by index.

cores/nRF5/nordic/nrfx/LICENSE

@@ -1,4 +1,4 @@
-Copyright (c) 2017 - 2019, Nordic Semiconductor ASA
+Copyright (c) 2017 - 2020, Nordic Semiconductor ASA
 All rights reserved.
 
 Redistribution and use in source and binary forms, with or without

cores/nRF5/nordic/nrfx/README.md

@@ -16,20 +16,23 @@ SoCs, as well as startup and initialization files for them.
 * nRF52810
 * nRF52811
 * nRF52832
+* nRF52833
 * nRF52840
+* nRF5340
 * nRF9160
 
 ## Directories
 
 ```
  .
  ├── doc             # Project documentation files
- ├── drivers         # nrfx drivers files
- │   └── include     # nrfx drivers headers
- │   └── src         # nrfx drivers sources
+ ├── drivers         # nrfx driver files
+ │   └── include     # nrfx driver headers
+ │   └── src         # nrfx driver sources
  ├── hal             # Hardware Access Layer files
- ├── mdk             # Nordic MDK files
- ├── soc             # Nordic SoC related files
+ ├── helpers         # nrfx driver helper files
+ ├── mdk             # nRF MDK files
+ ├── soc             # SoC specific files
  └── templates       # Templates of nrfx integration files
 ```
 

cores/nRF5/nordic/nrfx/drivers/include/nrf_bitmask.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016 - 2019, Nordic Semiconductor ASA
+ * Copyright (c) 2016 - 2020, Nordic Semiconductor ASA
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -57,21 +57,22 @@ extern "C" {
  * @param[in] bit    Bit index.
  * @param[in] p_mask Pointer to mask with bit fields.
  *
- * @return 0 if bit is not set, positive value otherwise.
+ * @retval true  If the specified bit is set.
+ * @retval false If the specified bit is cleared.
  */
-__STATIC_INLINE uint32_t nrf_bitmask_bit_is_set(uint32_t bit, void const * p_mask)
+__STATIC_INLINE bool nrf_bitmask_bit_is_set(uint32_t bit, void const * p_mask)
 {
     uint8_t const * p_mask8 = (uint8_t const *)p_mask;
     uint32_t byte_idx = BITMASK_BYTE_GET(bit);
     bit = BITMASK_RELBIT_GET(bit);
-    return (1 << bit) & p_mask8[byte_idx];
+    return ((1U << bit) & p_mask8[byte_idx]) != 0U;
 }
 
 /**
  * @brief Function for setting a bit in the multi-byte bit mask.
  *
- * @param[in] bit    Bit index.
- * @param[in] p_mask Pointer to mask with bit fields.
+ * @param[in]     bit    Bit index.
+ * @param[in,out] p_mask Pointer to mask with bit fields.
  */
 __STATIC_INLINE void nrf_bitmask_bit_set(uint32_t bit, void * p_mask)
 {
@@ -84,8 +85,8 @@ __STATIC_INLINE void nrf_bitmask_bit_set(uint32_t bit, void * p_mask)
 /**
  * @brief Function for clearing a bit in the multi-byte bit mask.
  *
- * @param[in] bit    Bit index.
- * @param[in] p_mask Pointer to mask with bit fields.
+ * @param[in]     bit    Bit index.
+ * @param[in,out] p_mask Pointer to mask with bit fields.
  */
 __STATIC_INLINE void nrf_bitmask_bit_clear(uint32_t bit, void * p_mask)
 {
@@ -98,21 +99,20 @@ __STATIC_INLINE void nrf_bitmask_bit_clear(uint32_t bit, void * p_mask)
 /**
  * @brief Function for performing bitwise OR operation on two multi-byte bit masks.
  *
- * @param[in] p_mask1    Pointer to the first bit mask.
- * @param[in] p_mask2    Pointer to the second bit mask.
- * @param[in] p_out_mask Pointer to the output bit mask.
- * @param[in] length     Length of output mask in bytes.
+ * @param[in]  p_mask1    Pointer to the first bit mask.
+ * @param[in]  p_mask2    Pointer to the second bit mask.
+ * @param[out] p_out_mask Pointer to the output bit mask.
+ * @param[in]  length     Length of output mask in bytes.
  */
-__STATIC_INLINE void nrf_bitmask_masks_or(void const *   p_mask1,
-                                          void const *   p_mask2,
-                                          void *         p_out_mask,
-                                          uint32_t       length)
+__STATIC_INLINE void nrf_bitmask_masks_or(void const * p_mask1,
+                                          void const * p_mask2,
+                                          void *       p_out_mask,
+                                          size_t       length)
 {
     uint8_t const * p_mask8_1 = (uint8_t const *)p_mask1;
     uint8_t const * p_mask8_2 = (uint8_t const *)p_mask2;
     uint8_t * p_mask8_out = (uint8_t *)p_out_mask;
-    uint32_t i;
-    for (i = 0; i < length; i++)
+    for (size_t i = 0; i < length; i++)
     {
         p_mask8_out[i] = p_mask8_1[i] | p_mask8_2[i];
     }
@@ -121,21 +121,20 @@ __STATIC_INLINE void nrf_bitmask_masks_or(void const *   p_mask1,
 /**
  * @brief Function for performing bitwise AND operation on two multi-byte bit masks.
  *
- * @param[in] p_mask1    Pointer to the first bit mask.
- * @param[in] p_mask2    Pointer to the second bit mask.
- * @param[in] p_out_mask Pointer to the output bit mask.
- * @param[in] length     Length of output mask in bytes.
+ * @param[in]  p_mask1    Pointer to the first bit mask.
+ * @param[in]  p_mask2    Pointer to the second bit mask.
+ * @param[out] p_out_mask Pointer to the output bit mask.
+ * @param[in]  length     Length of output mask in bytes.
  */
-__STATIC_INLINE void nrf_bitmask_masks_and(void const *   p_mask1,
-                                           void const *   p_mask2,
-                                           void *         p_out_mask,
-                                           uint32_t       length)
+__STATIC_INLINE void nrf_bitmask_masks_and(void const * p_mask1,
+                                           void const * p_mask2,
+                                           void *       p_out_mask,
+                                           size_t       length)
 {
     uint8_t const * p_mask8_1 = (uint8_t const *)p_mask1;
     uint8_t const * p_mask8_2 = (uint8_t const *)p_mask2;
     uint8_t * p_mask8_out = (uint8_t *)p_out_mask;
-    uint32_t i;
-    for (i = 0; i < length; i++)
+    for (size_t i = 0; i < length; i++)
     {
         p_mask8_out[i] = p_mask8_1[i] & p_mask8_2[i];
     }

cores/nRF5/nordic/nrfx/drivers/include/nrfx_adc.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2015 - 2019, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2020, Nordic Semiconductor ASA
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -77,18 +77,28 @@ typedef struct
     } data;                           ///< Union to store event data.
 } nrfx_adc_evt_t;
 
-/** @brief Macro for initializing the ADC channel with the default configuration. */
+/**
+ * @brief ADC channel default configuration.
+ *
+ * This configuration sets up ADC channel with the following options:
+ * - 10 bits resolution
+ * - full scale input
+ * - reference voltage: 1.2 V
+ * - external reference input disabled
+ *
+ * @param[in] analog_input Analog input.
+ */
 #define NRFX_ADC_DEFAULT_CHANNEL(analog_input)                 \
- {                                                             \
-     NULL,                                                     \
-     {                                                         \
+{                                                              \
+    NULL,                                                      \
+    {                                                          \
         .resolution = NRF_ADC_CONFIG_RES_10BIT,                \
         .scaling    = NRF_ADC_CONFIG_SCALING_INPUT_FULL_SCALE, \
         .reference  = NRF_ADC_CONFIG_REF_VBG,                  \
-        .input      = (analog_input),                          \
+        .input      = (nrf_adc_config_input_t)analog_input,    \
         .extref     = NRF_ADC_CONFIG_EXTREFSEL_NONE            \
-     }                                                         \
- }
+    }                                                          \
+}
 
 /** @brief Forward declaration of the nrfx_adc_channel_t type. */
 typedef struct nrfx_adc_channel_s nrfx_adc_channel_t;
@@ -112,9 +122,9 @@ typedef struct
 } nrfx_adc_config_t;
 
 /** @brief ADC default configuration. */
-#define NRFX_ADC_DEFAULT_CONFIG                        \
-{                                                      \
-    .interrupt_priority = NRFX_ADC_CONFIG_IRQ_PRIORITY \
+#define NRFX_ADC_DEFAULT_CONFIG                                \
+{                                                              \
+    .interrupt_priority = NRFX_ADC_DEFAULT_CONFIG_IRQ_PRIORITY \
 }
 
 /**
@@ -206,8 +216,8 @@ void nrfx_adc_sample(void);
  * @retval NRFX_SUCCESS    Conversion was successful.
  * @retval NRFX_ERROR_BUSY The ADC driver is busy.
  */
-nrfx_err_t nrfx_adc_sample_convert(nrfx_adc_channel_t const * const p_channel,
-                                   nrf_adc_value_t                * p_value);
+nrfx_err_t nrfx_adc_sample_convert(nrfx_adc_channel_t const * p_channel,
+                                   nrf_adc_value_t *          p_value);
 
 /**
  * @brief Function for converting data to the buffer.
@@ -256,16 +266,14 @@ bool nrfx_adc_is_busy(void);
  *
  * @return Start task address.
  */
-__STATIC_INLINE uint32_t nrfx_adc_start_task_get(void);
-
-#ifndef SUPPRESS_INLINE_IMPLEMENTATION
+NRFX_STATIC_INLINE uint32_t nrfx_adc_start_task_get(void);
 
-__STATIC_INLINE uint32_t nrfx_adc_start_task_get(void)
+#ifndef NRFX_DECLARE_ONLY
+NRFX_STATIC_INLINE uint32_t nrfx_adc_start_task_get(void)
 {
-    return nrf_adc_task_address_get(NRF_ADC_TASK_START);
+    return nrf_adc_task_address_get(NRF_ADC, NRF_ADC_TASK_START);
 }
-
-#endif
+#endif // NRFX_DECLARE_ONLY
 
 /** @} */