@@ -1377,7 +1377,7 @@ static inline bool ch34x_control_in(cdch_interface_t* p_cdc, uint8_t request, ui
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complete_cb , user_data );
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}
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- static bool ch34x_write_reg (cdch_interface_t * p_cdc , uint16_t reg , uint16_t reg_value , tuh_xfer_cb_t complete_cb , uintptr_t user_data ) {
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+ static inline bool ch34x_write_reg (cdch_interface_t * p_cdc , uint16_t reg , uint16_t reg_value , tuh_xfer_cb_t complete_cb , uintptr_t user_data ) {
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return ch34x_control_out (p_cdc , CH34X_REQ_WRITE_REG , reg , reg_value , complete_cb , user_data );
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}
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@@ -1390,7 +1390,7 @@ static bool ch34x_write_reg(cdch_interface_t* p_cdc, uint16_t reg, uint16_t reg_
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static bool ch34x_write_reg_baudrate (cdch_interface_t * p_cdc , uint32_t baudrate ,
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tuh_xfer_cb_t complete_cb , uintptr_t user_data ) {
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uint16_t const div_ps = ch34x_get_divisor_prescaler (baudrate );
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- TU_VERIFY (div_ps != 0 );
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+ TU_VERIFY (div_ps );
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TU_ASSERT (ch34x_write_reg (p_cdc , CH34X_REG16_DIVISOR_PRESCALER , div_ps ,
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complete_cb , user_data ));
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return true;
@@ -1411,7 +1411,7 @@ static bool ch34x_set_data_format(cdch_interface_t* p_cdc, uint8_t stop_bits, ui
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p_cdc -> requested_line_coding .data_bits = data_bits ;
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uint8_t const lcr = ch34x_get_lcr (stop_bits , parity , data_bits );
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- TU_VERIFY (lcr != 0 );
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+ TU_VERIFY (lcr );
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TU_ASSERT (ch34x_control_out (p_cdc , CH34X_REQ_WRITE_REG , CH32X_REG16_LCR2_LCR , lcr ,
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complete_cb ? ch34x_control_complete : NULL , user_data ));
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return true;
@@ -1427,6 +1427,7 @@ static bool ch34x_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate,
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}
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static void ch34x_set_line_coding_stage1_complete (tuh_xfer_t * xfer ) {
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+ // CH34x only has 1 interface and use wIndex as payload and not for bInterfaceNumber
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uint8_t const itf_num = 0 ;
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uint8_t const idx = tuh_cdc_itf_get_index (xfer -> daddr , itf_num );
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cdch_interface_t * p_cdc = get_itf (idx );
@@ -1475,7 +1476,7 @@ static bool ch34x_set_line_coding(cdch_interface_t* p_cdc, cdc_line_coding_t con
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// update transfer result, user_data is expected to point to xfer_result_t
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if (user_data ) {
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- user_data = result ;
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+ * (( xfer_result_t * ) user_data ) = result ;
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}
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}
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@@ -1545,8 +1546,7 @@ static void ch34x_process_config(tuh_xfer_t* xfer) {
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uintptr_t const state = xfer -> user_data ;
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uint8_t buffer [2 ]; // TODO remove
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TU_ASSERT (p_cdc ,);
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-
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- // TODO check xfer->result
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+ TU_ASSERT (xfer -> result == XFER_RESULT_SUCCESS ,);
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switch (state ) {
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case CONFIG_CH34X_READ_VERSION :
@@ -1563,9 +1563,9 @@ static void ch34x_process_config(tuh_xfer_t* xfer) {
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// init CH34x with line coding
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cdc_line_coding_t const line_coding = CFG_TUH_CDC_LINE_CODING_ON_ENUM_CH34X ;
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uint16_t const div_ps = ch34x_get_divisor_prescaler (line_coding .bit_rate );
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- TU_ASSERT (div_ps != 0 , );
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+ TU_ASSERT (div_ps , );
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uint8_t const lcr = ch34x_get_lcr (line_coding .stop_bits , line_coding .parity , line_coding .data_bits );
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- TU_ASSERT (lcr != 0 , );
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+ TU_ASSERT (lcr , );
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TU_ASSERT (ch34x_control_out (p_cdc , CH34X_REQ_SERIAL_INIT , tu_u16 (lcr , 0x9c ), div_ps ,
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ch34x_process_config , CONFIG_CH34X_SPECIAL_REG_WRITE ),);
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break ;
@@ -1605,7 +1605,7 @@ static uint16_t ch34x_get_divisor_prescaler(uint32_t baval) {
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uint8_t b ;
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uint32_t c ;
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- TU_VERIFY (baval != 0 , 0 );
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+ TU_VERIFY (baval != 0 && baval <= 2000000 , 0 );
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switch (baval ) {
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case 921600 :
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a = 0xf3 ;
@@ -1659,7 +1659,7 @@ static uint8_t ch34x_get_lcr(uint8_t stop_bits, uint8_t parity, uint8_t data_bit
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break ;
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case CDC_LINE_CODING_PARITY_ODD :
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- lcr |= CH34X_LCR_ENABLE_PAR ;
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+ lcr |= CH34X_LCR_ENABLE_PAR ;
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break ;
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case CDC_LINE_CODING_PARITY_EVEN :
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